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Commit a93a55044bf777da701d7251e8b4a752b993a5b2

Authored by Jagan Teki
1 parent 216800acf1
Exists in smarc_8mq_lf_v2020.04 and in 9 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

arm64: allwinner: sun50i: Sync H6 dts(i) files from Linux 

Usually the Linux dts changes were synced in specific tags in Allwinner,
to keep track for whats been synced so-far and plan for future syncs.

But this patch sync sun50i-h6* dts(i) files from Linux w/o any specific
tag since these dts(i) changes are required for new H6 boards support.

Linux commit details about the sun50i-h6* sync:
"arm64: dts: allwinner: h6: move MMC pinctrl to dtsi"
(sha1: 6ba2e45d57afdfd982d12f168edd6a79a65075d8)

Linux commit details about the sun8i-tcon-top.h sync:
"dt-bindings: display: sunxi-drm: Add TCON TOP description"
(sha1: 59a9c39544cd1e5952c2a33028d71aa8180648f8)

Part of the sync initiated by 'Clément Péron'.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Showing 4 changed files with 538 additions and 21 deletions Side-by-side Diff

arch/arm/dts/sun50i-h6-orangepi.dtsi
Diff comments   View file @ a93a550
... ... @@ -21,17 +21,55 @@
21 21 chosen {
22 22 stdout-path = "serial0:115200n8";
23 23 };
  24 +
  25 + leds {
  26 + compatible = "gpio-leds";
  27 +
  28 + power {
  29 + label = "orangepi:red:power";
  30 + gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
  31 + default-state = "on";
  32 + };
  33 +
  34 + status {
  35 + label = "orangepi:green:status";
  36 + gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
  37 + };
  38 + };
  39 +
  40 + reg_vcc5v: vcc5v {
  41 + /* board wide 5V supply directly from the DC jack */
  42 + compatible = "regulator-fixed";
  43 + regulator-name = "vcc-5v";
  44 + regulator-min-microvolt = <5000000>;
  45 + regulator-max-microvolt = <5000000>;
  46 + regulator-always-on;
  47 + };
24 48 };
25 49  
  50 +&ehci0 {
  51 + status = "okay";
  52 +};
  53 +
  54 +&ehci3 {
  55 + status = "okay";
  56 +};
  57 +
26 58 &mmc0 {
27   - pinctrl-names = "default";
28   - pinctrl-0 = <&mmc0_pins>;
29 59 vmmc-supply = <&reg_cldo1>;
30 60 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
31 61 bus-width = <4>;
32 62 status = "okay";
33 63 };
34 64  
  65 +&ohci0 {
  66 + status = "okay";
  67 +};
  68 +
  69 +&ohci3 {
  70 + status = "okay";
  71 +};
  72 +
35 73 &r_i2c {
36 74 status = "okay";
37 75  
... ... @@ -43,6 +81,14 @@
43 81 interrupt-controller;
44 82 #interrupt-cells = <1>;
45 83 x-powers,self-working-mode;
  84 + vina-supply = <&reg_vcc5v>;
  85 + vinb-supply = <&reg_vcc5v>;
  86 + vinc-supply = <&reg_vcc5v>;
  87 + vind-supply = <&reg_vcc5v>;
  88 + vine-supply = <&reg_vcc5v>;
  89 + aldoin-supply = <&reg_vcc5v>;
  90 + bldoin-supply = <&reg_vcc5v>;
  91 + cldoin-supply = <&reg_vcc5v>;
46 92  
47 93 regulators {
48 94 reg_aldo1: aldo1 {
... ... @@ -146,6 +192,18 @@
146 192 &uart0 {
147 193 pinctrl-names = "default";
148 194 pinctrl-0 = <&uart0_ph_pins>;
  195 + status = "okay";
  196 +};
  197 +
  198 +&usb2otg {
  199 + dr_mode = "otg";
  200 + status = "okay";
  201 +};
  202 +
  203 +&usb2phy {
  204 + usb0_id_det-gpios = <&pio 2 6 GPIO_ACTIVE_HIGH>; /* PC6 */
  205 + usb0_vbus-supply = <&reg_vcc5v>;
  206 + usb3_vbus-supply = <&reg_vcc5v>;
149 207 status = "okay";
150 208 };
arch/arm/dts/sun50i-h6-pine-h64.dts
Diff comments   View file @ a93a550
... ... @@ -14,6 +14,7 @@
14 14 compatible = "pine64,pine-h64", "allwinner,sun50i-h6";
15 15  
16 16 aliases {
  17 + ethernet0 = &emac;
17 18 serial0 = &uart0;
18 19 };
19 20  
... ... @@ -21,6 +22,17 @@
21 22 stdout-path = "serial0:115200n8";
22 23 };
23 24  
  25 + connector {
  26 + compatible = "hdmi-connector";
  27 + type = "a";
  28 +
  29 + port {
  30 + hdmi_con_in: endpoint {
  31 + remote-endpoint = <&hdmi_out_con>;
  32 + };
  33 + };
  34 + };
  35 +
24 36 leds {
25 37 compatible = "gpio-leds";
26 38  
27 39  
28 40  
29 41  
30 42  
31 43  
32 44  
... ... @@ -39,26 +51,82 @@
39 51 gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
40 52 };
41 53 };
  54 +
  55 + reg_usb_vbus: vbus {
  56 + compatible = "regulator-fixed";
  57 + regulator-name = "usb-vbus";
  58 + regulator-min-microvolt = <5000000>;
  59 + regulator-max-microvolt = <5000000>;
  60 + startup-delay-us = <100000>;
  61 + gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>;
  62 + enable-active-high;
  63 + };
42 64 };
43 65  
44   -&mmc0 {
  66 +&emac {
45 67 pinctrl-names = "default";
46   - pinctrl-0 = <&mmc0_pins>;
  68 + pinctrl-0 = <&ext_rgmii_pins>;
  69 + phy-mode = "rgmii";
  70 + phy-handle = <&ext_rgmii_phy>;
  71 + phy-supply = <&reg_aldo2>;
  72 + allwinner,rx-delay-ps = <200>;
  73 + allwinner,tx-delay-ps = <200>;
  74 + status = "okay";
  75 +};
  76 +
  77 +&mdio {
  78 + ext_rgmii_phy: ethernet-phy@1 {
  79 + compatible = "ethernet-phy-ieee802.3-c22";
  80 + reg = <1>;
  81 + };
  82 +};
  83 +
  84 +&de {
  85 + status = "okay";
  86 +};
  87 +
  88 +&hdmi {
  89 + status = "okay";
  90 +};
  91 +
  92 +&hdmi_out {
  93 + hdmi_out_con: endpoint {
  94 + remote-endpoint = <&hdmi_con_in>;
  95 + };
  96 +};
  97 +
  98 +&ehci0 {
  99 + status = "okay";
  100 +};
  101 +
  102 +&ehci3 {
  103 + status = "okay";
  104 +};
  105 +
  106 +&mmc0 {
47 107 vmmc-supply = <&reg_cldo1>;
48 108 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
  109 + bus-width = <4>;
49 110 status = "okay";
50 111 };
51 112  
52 113 &mmc2 {
53   - pinctrl-names = "default";
54   - pinctrl-0 = <&mmc2_pins>;
55 114 vmmc-supply = <&reg_cldo1>;
56 115 vqmmc-supply = <&reg_bldo2>;
57 116 non-removable;
58 117 cap-mmc-hw-reset;
  118 + bus-width = <8>;
59 119 status = "okay";
60 120 };
61 121  
  122 +&ohci0 {
  123 + status = "okay";
  124 +};
  125 +
  126 +&ohci3 {
  127 + status = "okay";
  128 +};
  129 +
62 130 &r_i2c {
63 131 status = "okay";
64 132  
... ... @@ -83,6 +151,7 @@
83 151 regulator-min-microvolt = <3300000>;
84 152 regulator-max-microvolt = <3300000>;
85 153 regulator-name = "vcc-ac200";
  154 + regulator-enable-ramp-delay = <100000>;
86 155 };
87 156  
88 157 reg_aldo3: aldo3 {
... ... @@ -181,6 +250,17 @@
181 250 &uart0 {
182 251 pinctrl-names = "default";
183 252 pinctrl-0 = <&uart0_ph_pins>;
  253 + status = "okay";
  254 +};
  255 +
  256 +&usb2otg {
  257 + dr_mode = "host";
  258 + status = "okay";
  259 +};
  260 +
  261 +&usb2phy {
  262 + usb0_vbus-supply = <&reg_usb_vbus>;
  263 + usb3_vbus-supply = <&reg_usb_vbus>;
184 264 status = "okay";
185 265 };
arch/arm/dts/sun50i-h6.dtsi
Diff comments   View file @ a93a550
... ... @@ -6,8 +6,11 @@
6 6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 7 #include <dt-bindings/clock/sun50i-h6-ccu.h>
8 8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
  9 +#include <dt-bindings/clock/sun8i-de2.h>
  10 +#include <dt-bindings/clock/sun8i-tcon-top.h>
9 11 #include <dt-bindings/reset/sun50i-h6-ccu.h>
10 12 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
  13 +#include <dt-bindings/reset/sun8i-de2.h>
11 14  
12 15 / {
13 16 interrupt-parent = <&gic>;
14 17  
15 18  
16 19  
17 20  
... ... @@ -19,34 +22,40 @@
19 22 #size-cells = <0>;
20 23  
21 24 cpu0: cpu@0 {
22   - compatible = "arm,cortex-a53", "arm,armv8";
  25 + compatible = "arm,cortex-a53";
23 26 device_type = "cpu";
24 27 reg = <0>;
25 28 enable-method = "psci";
26 29 };
27 30  
28 31 cpu1: cpu@1 {
29   - compatible = "arm,cortex-a53", "arm,armv8";
  32 + compatible = "arm,cortex-a53";
30 33 device_type = "cpu";
31 34 reg = <1>;
32 35 enable-method = "psci";
33 36 };
34 37  
35 38 cpu2: cpu@2 {
36   - compatible = "arm,cortex-a53", "arm,armv8";
  39 + compatible = "arm,cortex-a53";
37 40 device_type = "cpu";
38 41 reg = <2>;
39 42 enable-method = "psci";
40 43 };
41 44  
42 45 cpu3: cpu@3 {
43   - compatible = "arm,cortex-a53", "arm,armv8";
  46 + compatible = "arm,cortex-a53";
44 47 device_type = "cpu";
45 48 reg = <3>;
46 49 enable-method = "psci";
47 50 };
48 51 };
49 52  
  53 + de: display-engine {
  54 + compatible = "allwinner,sun50i-h6-display-engine";
  55 + allwinner,pipelines = <&mixer0>;
  56 + status = "disabled";
  57 + };
  58 +
50 59 iosc: internal-osc-clk {
51 60 #clock-cells = <0>;
52 61 compatible = "fixed-clock";
... ... @@ -92,6 +101,99 @@
92 101 #size-cells = <1>;
93 102 ranges;
94 103  
  104 + display-engine@1000000 {
  105 + compatible = "allwinner,sun50i-h6-de3",
  106 + "allwinner,sun50i-a64-de2";
  107 + reg = <0x1000000 0x400000>;
  108 + allwinner,sram = <&de2_sram 1>;
  109 + #address-cells = <1>;
  110 + #size-cells = <1>;
  111 + ranges = <0 0x1000000 0x400000>;
  112 +
  113 + display_clocks: clock@0 {
  114 + compatible = "allwinner,sun50i-h6-de3-clk";
  115 + reg = <0x0 0x10000>;
  116 + clocks = <&ccu CLK_DE>,
  117 + <&ccu CLK_BUS_DE>;
  118 + clock-names = "mod",
  119 + "bus";
  120 + resets = <&ccu RST_BUS_DE>;
  121 + #clock-cells = <1>;
  122 + #reset-cells = <1>;
  123 + };
  124 +
  125 + mixer0: mixer@100000 {
  126 + compatible = "allwinner,sun50i-h6-de3-mixer-0";
  127 + reg = <0x100000 0x100000>;
  128 + clocks = <&display_clocks CLK_BUS_MIXER0>,
  129 + <&display_clocks CLK_MIXER0>;
  130 + clock-names = "bus",
  131 + "mod";
  132 + resets = <&display_clocks RST_MIXER0>;
  133 +
  134 + ports {
  135 + #address-cells = <1>;
  136 + #size-cells = <0>;
  137 +
  138 + mixer0_out: port@1 {
  139 + reg = <1>;
  140 +
  141 + mixer0_out_tcon_top_mixer0: endpoint {
  142 + remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
  143 + };
  144 + };
  145 + };
  146 + };
  147 + };
  148 +
  149 + video-codec@1c0e000 {
  150 + compatible = "allwinner,sun50i-h6-video-engine";
  151 + reg = <0x01c0e000 0x2000>;
  152 + clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
  153 + <&ccu CLK_MBUS_VE>;
  154 + clock-names = "ahb", "mod", "ram";
  155 + resets = <&ccu RST_BUS_VE>;
  156 + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
  157 + allwinner,sram = <&ve_sram 1>;
  158 + };
  159 +
  160 + syscon: syscon@3000000 {
  161 + compatible = "allwinner,sun50i-h6-system-control",
  162 + "allwinner,sun50i-a64-system-control";
  163 + reg = <0x03000000 0x1000>;
  164 + #address-cells = <1>;
  165 + #size-cells = <1>;
  166 + ranges;
  167 +
  168 + sram_c: sram@28000 {
  169 + compatible = "mmio-sram";
  170 + reg = <0x00028000 0x1e000>;
  171 + #address-cells = <1>;
  172 + #size-cells = <1>;
  173 + ranges = <0 0x00028000 0x1e000>;
  174 +
  175 + de2_sram: sram-section@0 {
  176 + compatible = "allwinner,sun50i-h6-sram-c",
  177 + "allwinner,sun50i-a64-sram-c";
  178 + reg = <0x0000 0x1e000>;
  179 + };
  180 + };
  181 +
  182 + sram_c1: sram@1a00000 {
  183 + compatible = "mmio-sram";
  184 + reg = <0x01a00000 0x200000>;
  185 + #address-cells = <1>;
  186 + #size-cells = <1>;
  187 + ranges = <0 0x01a00000 0x200000>;
  188 +
  189 + ve_sram: sram-section@0 {
  190 + compatible = "allwinner,sun50i-h6-sram-c1",
  191 + "allwinner,sun4i-a10-sram-c1";
  192 + reg = <0x000000 0x200000>;
  193 + };
  194 + };
  195 + };
  196 +
95 197 ccu: clock@3001000 {
96 198 compatible = "allwinner,sun50i-h6-ccu";
97 199 reg = <0x03001000 0x1000>;
... ... @@ -101,15 +203,9 @@
101 203 #reset-cells = <1>;
102 204 };
103 205  
104   - gic: interrupt-controller@3021000 {
105   - compatible = "arm,gic-400";
106   - reg = <0x03021000 0x1000>,
107   - <0x03022000 0x2000>,
108   - <0x03024000 0x2000>,
109   - <0x03026000 0x2000>;
110   - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
111   - interrupt-controller;
112   - #interrupt-cells = <3>;
  206 + sid: sid@3006000 {
  207 + compatible = "allwinner,sun50i-h6-sid";
  208 + reg = <0x03006000 0x400>;
113 209 };
114 210  
115 211 pio: pinctrl@300b000 {
... ... @@ -126,6 +222,19 @@
126 222 interrupt-controller;
127 223 #interrupt-cells = <3>;
128 224  
  225 + ext_rgmii_pins: rgmii-pins {
  226 + pins = "PD0", "PD1", "PD2", "PD3", "PD4",
  227 + "PD5", "PD7", "PD8", "PD9", "PD10",
  228 + "PD11", "PD12", "PD13", "PD19", "PD20";
  229 + function = "emac";
  230 + drive-strength = <40>;
  231 + };
  232 +
  233 + hdmi_pins: hdmi-pins {
  234 + pins = "PH8", "PH9", "PH10";
  235 + function = "hdmi";
  236 + };
  237 +
129 238 mmc0_pins: mmc0-pins {
130 239 pins = "PF0", "PF1", "PF2", "PF3",
131 240 "PF4", "PF5";
132 241  
... ... @@ -143,12 +252,23 @@
143 252 bias-pull-up;
144 253 };
145 254  
146   - uart0_ph_pins: uart0-ph {
  255 + uart0_ph_pins: uart0-ph-pins {
147 256 pins = "PH0", "PH1";
148 257 function = "uart0";
149 258 };
150 259 };
151 260  
  261 + gic: interrupt-controller@3021000 {
  262 + compatible = "arm,gic-400";
  263 + reg = <0x03021000 0x1000>,
  264 + <0x03022000 0x2000>,
  265 + <0x03024000 0x2000>,
  266 + <0x03026000 0x2000>;
  267 + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
  268 + interrupt-controller;
  269 + #interrupt-cells = <3>;
  270 + };
  271 +
152 272 mmc0: mmc@4020000 {
153 273 compatible = "allwinner,sun50i-h6-mmc",
154 274 "allwinner,sun50i-a64-mmc";
... ... @@ -158,6 +278,8 @@
158 278 resets = <&ccu RST_BUS_MMC0>;
159 279 reset-names = "ahb";
160 280 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
  281 + pinctrl-names = "default";
  282 + pinctrl-0 = <&mmc0_pins>;
161 283 status = "disabled";
162 284 #address-cells = <1>;
163 285 #size-cells = <0>;
... ... @@ -186,6 +308,8 @@
186 308 resets = <&ccu RST_BUS_MMC2>;
187 309 reset-names = "ahb";
188 310 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
  311 + pinctrl-names = "default";
  312 + pinctrl-0 = <&mmc2_pins>;
189 313 status = "disabled";
190 314 #address-cells = <1>;
191 315 #size-cells = <0>;
... ... @@ -235,6 +359,250 @@
235 359 status = "disabled";
236 360 };
237 361  
  362 + emac: ethernet@5020000 {
  363 + compatible = "allwinner,sun50i-h6-emac",
  364 + "allwinner,sun50i-a64-emac";
  365 + syscon = <&syscon>;
  366 + reg = <0x05020000 0x10000>;
  367 + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
  368 + interrupt-names = "macirq";
  369 + resets = <&ccu RST_BUS_EMAC>;
  370 + reset-names = "stmmaceth";
  371 + clocks = <&ccu CLK_BUS_EMAC>;
  372 + clock-names = "stmmaceth";
  373 + status = "disabled";
  374 +
  375 + mdio: mdio {
  376 + compatible = "snps,dwmac-mdio";
  377 + #address-cells = <1>;
  378 + #size-cells = <0>;
  379 + };
  380 + };
  381 +
  382 + usb2otg: usb@5100000 {
  383 + compatible = "allwinner,sun50i-h6-musb",
  384 + "allwinner,sun8i-a33-musb";
  385 + reg = <0x05100000 0x0400>;
  386 + clocks = <&ccu CLK_BUS_OTG>;
  387 + resets = <&ccu RST_BUS_OTG>;
  388 + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
  389 + interrupt-names = "mc";
  390 + phys = <&usb2phy 0>;
  391 + phy-names = "usb";
  392 + extcon = <&usb2phy 0>;
  393 + status = "disabled";
  394 + };
  395 +
  396 + usb2phy: phy@5100400 {
  397 + compatible = "allwinner,sun50i-h6-usb-phy";
  398 + reg = <0x05100400 0x24>,
  399 + <0x05101800 0x4>,
  400 + <0x05311800 0x4>;
  401 + reg-names = "phy_ctrl",
  402 + "pmu0",
  403 + "pmu3";
  404 + clocks = <&ccu CLK_USB_PHY0>,
  405 + <&ccu CLK_USB_PHY3>;
  406 + clock-names = "usb0_phy",
  407 + "usb3_phy";
  408 + resets = <&ccu RST_USB_PHY0>,
  409 + <&ccu RST_USB_PHY3>;
  410 + reset-names = "usb0_reset",
  411 + "usb3_reset";
  412 + status = "disabled";
  413 + #phy-cells = <1>;
  414 + };
  415 +
  416 + ehci0: usb@5101000 {
  417 + compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
  418 + reg = <0x05101000 0x100>;
  419 + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
  420 + clocks = <&ccu CLK_BUS_OHCI0>,
  421 + <&ccu CLK_BUS_EHCI0>,
  422 + <&ccu CLK_USB_OHCI0>;
  423 + resets = <&ccu RST_BUS_OHCI0>,
  424 + <&ccu RST_BUS_EHCI0>;
  425 + status = "disabled";
  426 + };
  427 +
  428 + ohci0: usb@5101400 {
  429 + compatible = "allwinner,sun50i-h6-ohci", "generic-ohci";
  430 + reg = <0x05101400 0x100>;
  431 + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
  432 + clocks = <&ccu CLK_BUS_OHCI0>,
  433 + <&ccu CLK_USB_OHCI0>;
  434 + resets = <&ccu RST_BUS_OHCI0>;
  435 + status = "disabled";
  436 + };
  437 +
  438 + ehci3: usb@5311000 {
  439 + compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
  440 + reg = <0x05311000 0x100>;
  441 + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
  442 + clocks = <&ccu CLK_BUS_OHCI3>,
  443 + <&ccu CLK_BUS_EHCI3>,
  444 + <&ccu CLK_USB_OHCI3>;
  445 + resets = <&ccu RST_BUS_OHCI3>,
  446 + <&ccu RST_BUS_EHCI3>;
  447 + phys = <&usb2phy 3>;
  448 + phy-names = "usb";
  449 + status = "disabled";
  450 + };
  451 +
  452 + ohci3: usb@5311400 {
  453 + compatible = "allwinner,sun50i-h6-ohci", "generic-ohci";
  454 + reg = <0x05311400 0x100>;
  455 + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
  456 + clocks = <&ccu CLK_BUS_OHCI3>,
  457 + <&ccu CLK_USB_OHCI3>;
  458 + resets = <&ccu RST_BUS_OHCI3>;
  459 + phys = <&usb2phy 3>;
  460 + phy-names = "usb";
  461 + status = "disabled";
  462 + };
  463 +
  464 + hdmi: hdmi@6000000 {
  465 + compatible = "allwinner,sun50i-h6-dw-hdmi";
  466 + reg = <0x06000000 0x10000>;
  467 + reg-io-width = <1>;
  468 + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
  469 + clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
  470 + <&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>,
  471 + <&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>;
  472 + clock-names = "iahb", "isfr", "tmds", "cec", "hdcp",
  473 + "hdcp-bus";
  474 + resets = <&ccu RST_BUS_HDMI_SUB>, <&ccu RST_BUS_HDCP>;
  475 + reset-names = "ctrl", "hdcp";
  476 + phys = <&hdmi_phy>;
  477 + phy-names = "hdmi-phy";
  478 + pinctrl-names = "default";
  479 + pinctrl-0 = <&hdmi_pins>;
  480 + status = "disabled";
  481 +
  482 + ports {
  483 + #address-cells = <1>;
  484 + #size-cells = <0>;
  485 +
  486 + hdmi_in: port@0 {
  487 + reg = <0>;
  488 +
  489 + hdmi_in_tcon_top: endpoint {
  490 + remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
  491 + };
  492 + };
  493 +
  494 + hdmi_out: port@1 {
  495 + reg = <1>;
  496 + };
  497 + };
  498 + };
  499 +
  500 + hdmi_phy: hdmi-phy@6010000 {
  501 + compatible = "allwinner,sun50i-h6-hdmi-phy";
  502 + reg = <0x06010000 0x10000>;
  503 + clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>;
  504 + clock-names = "bus", "mod";
  505 + resets = <&ccu RST_BUS_HDMI>;
  506 + reset-names = "phy";
  507 + #phy-cells = <0>;
  508 + };
  509 +
  510 + tcon_top: tcon-top@6510000 {
  511 + compatible = "allwinner,sun50i-h6-tcon-top";
  512 + reg = <0x06510000 0x1000>;
  513 + clocks = <&ccu CLK_BUS_TCON_TOP>,
  514 + <&ccu CLK_TCON_TV0>;
  515 + clock-names = "bus",
  516 + "tcon-tv0";
  517 + clock-output-names = "tcon-top-tv0";
  518 + resets = <&ccu RST_BUS_TCON_TOP>;
  519 + reset-names = "rst";
  520 + #clock-cells = <1>;
  521 +
  522 + ports {
  523 + #address-cells = <1>;
  524 + #size-cells = <0>;
  525 +
  526 + tcon_top_mixer0_in: port@0 {
  527 + #address-cells = <1>;
  528 + #size-cells = <0>;
  529 + reg = <0>;
  530 +
  531 + tcon_top_mixer0_in_mixer0: endpoint@0 {
  532 + reg = <0>;
  533 + remote-endpoint = <&mixer0_out_tcon_top_mixer0>;
  534 + };
  535 + };
  536 +
  537 + tcon_top_mixer0_out: port@1 {
  538 + #address-cells = <1>;
  539 + #size-cells = <0>;
  540 + reg = <1>;
  541 +
  542 + tcon_top_mixer0_out_tcon_tv: endpoint@2 {
  543 + reg = <2>;
  544 + remote-endpoint = <&tcon_tv_in_tcon_top_mixer0>;
  545 + };
  546 + };
  547 +
  548 + tcon_top_hdmi_in: port@4 {
  549 + #address-cells = <1>;
  550 + #size-cells = <0>;
  551 + reg = <4>;
  552 +
  553 + tcon_top_hdmi_in_tcon_tv: endpoint@0 {
  554 + reg = <0>;
  555 + remote-endpoint = <&tcon_tv_out_tcon_top>;
  556 + };
  557 + };
  558 +
  559 + tcon_top_hdmi_out: port@5 {
  560 + reg = <5>;
  561 +
  562 + tcon_top_hdmi_out_hdmi: endpoint {
  563 + remote-endpoint = <&hdmi_in_tcon_top>;
  564 + };
  565 + };
  566 + };
  567 + };
  568 +
  569 + tcon_tv: lcd-controller@6515000 {
  570 + compatible = "allwinner,sun50i-h6-tcon-tv",
  571 + "allwinner,sun8i-r40-tcon-tv";
  572 + reg = <0x06515000 0x1000>;
  573 + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
  574 + clocks = <&ccu CLK_BUS_TCON_TV0>,
  575 + <&tcon_top CLK_TCON_TOP_TV0>;
  576 + clock-names = "ahb",
  577 + "tcon-ch1";
  578 + resets = <&ccu RST_BUS_TCON_TV0>;
  579 + reset-names = "lcd";
  580 +
  581 + ports {
  582 + #address-cells = <1>;
  583 + #size-cells = <0>;
  584 +
  585 + tcon_tv_in: port@0 {
  586 + reg = <0>;
  587 +
  588 + tcon_tv_in_tcon_top_mixer0: endpoint {
  589 + remote-endpoint = <&tcon_top_mixer0_out_tcon_tv>;
  590 + };
  591 + };
  592 +
  593 + tcon_tv_out: port@1 {
  594 + #address-cells = <1>;
  595 + #size-cells = <0>;
  596 + reg = <1>;
  597 +
  598 + tcon_tv_out_tcon_top: endpoint@1 {
  599 + reg = <1>;
  600 + remote-endpoint = <&tcon_top_hdmi_in_tcon_tv>;
  601 + };
  602 + };
  603 + };
  604 + };
  605 +
238 606 r_ccu: clock@7010000 {
239 607 compatible = "allwinner,sun50i-h6-r-ccu";
240 608 reg = <0x07010000 0x400>;
... ... @@ -266,7 +634,7 @@
266 634 interrupt-controller;
267 635 #interrupt-cells = <3>;
268 636  
269   - r_i2c_pins: r-i2c {
  637 + r_i2c_pins: r-i2c-pins {
270 638 pins = "PL0", "PL1";
271 639 function = "s_i2c";
272 640 };
include/dt-bindings/clock/sun8i-tcon-top.h
Diff comments   View file @ a93a550
  1 +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
  2 +/* Copyright (C) 2018 Jernej Skrabec <jernej.skrabec@siol.net> */
  3 +
  4 +#ifndef _DT_BINDINGS_CLOCK_SUN8I_TCON_TOP_H_
  5 +#define _DT_BINDINGS_CLOCK_SUN8I_TCON_TOP_H_
  6 +
  7 +#define CLK_TCON_TOP_TV0 0
  8 +#define CLK_TCON_TOP_TV1 1
  9 +#define CLK_TCON_TOP_DSI 2
  10 +
  11 +#endif /* _DT_BINDINGS_CLOCK_SUN8I_TCON_TOP_H_ */