Eric Lee / smarc-uboot

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Commit a9aa3926295df759306258e5e24cace414f53b67

Authored by Wolfgang Denk
1 parent 2e5167ccad
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

Drop support for CONFIG_SYS_ARM_WITHOUT_RELOC 

When this define was introduced, the idea was to provide a soft
migration path for ARM boards to get adapted to the new relocation
support.  However, other recent changes led to a different
implementation (ELF relocation), where this no longer works.  By now
CONFIG_SYS_ARM_WITHOUT_RELOC does not only not help any more, but it
actually hurts because it obfuscates the actual code by sprinkling it
with lots of dead and non-working debris.

So let's make a clean cut and drop CONFIG_SYS_ARM_WITHOUT_RELOC.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Reinhard Meyer <u-boot@emk-elektronik.de>

Showing 35 changed files with 10 additions and 2023 deletions Side-by-side Diff

... ... @@ -33,9 +33,6 @@
33 33 endif
34 34 endif
35 35  
36   -ifdef CONFIG_SYS_ARM_WITHOUT_RELOC
37   -PLATFORM_CPPFLAGS += -DCONFIG_SYS_ARM_WITHOUT_RELOC
38   -endif
39 36 PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
40 37  
41 38 # Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
42 39  
... ... @@ -68,10 +65,8 @@
68 65 endif
69 66 LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds
70 67  
71   -ifndef CONFIG_SYS_ARM_WITHOUT_RELOC
72 68 # needed for relocation
73 69 ifndef CONFIG_NAND_SPL
74 70 PLATFORM_LDFLAGS += -pie
75   -endif
76 71 endif
arch/arm/cpu/arm1136/start.S
Diff comments   View file @ a9aa392
... ... @@ -132,14 +132,11 @@
132 132 .word 0x0badc0de
133 133 #endif
134 134  
135   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
136 135 /* IRQ stack memory (calculated at run-time) + 8 bytes */
137 136 .globl IRQ_STACK_START_IN
138 137 IRQ_STACK_START_IN:
139 138 .word 0x0badc0de
140   -#endif
141 139  
142   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
143 140 /*
144 141 * the actual reset code
145 142 */
146 143  
... ... @@ -318,113 +315,7 @@
318 315 _dynsym_start_ofs:
319 316 .word __dynsym_start - _start
320 317  
321   -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
322 318 /*
323   - * the actual reset code
324   - */
325   -
326   -reset:
327   - /*
328   - * set the cpu to SVC32 mode
329   - */
330   - mrs r0,cpsr
331   - bic r0,r0,#0x1f
332   - orr r0,r0,#0xd3
333   - msr cpsr,r0
334   -
335   -#ifdef CONFIG_OMAP2420H4
336   - /* Copy vectors to mask ROM indirect addr */
337   - adr r0, _start /* r0 <- current position of code */
338   - add r0, r0, #4 /* skip reset vector */
339   - mov r2, #64 /* r2 <- size to copy */
340   - add r2, r0, r2 /* r2 <- source end address */
341   - mov r1, #SRAM_OFFSET0 /* build vect addr */
342   - mov r3, #SRAM_OFFSET1
343   - add r1, r1, r3
344   - mov r3, #SRAM_OFFSET2
345   - add r1, r1, r3
346   -next:
347   - ldmia r0!, {r3-r10} /* copy from source address [r0] */
348   - stmia r1!, {r3-r10} /* copy to target address [r1] */
349   - cmp r0, r2 /* until source end address [r2] */
350   - bne next /* loop until equal */
351   - bl cpy_clk_code /* put dpll adjust code behind vectors */
352   -#endif
353   - /* the mask ROM code should have PLL and others stable */
354   -#ifndef CONFIG_SKIP_LOWLEVEL_INIT
355   - bl cpu_init_crit
356   -#endif
357   -
358   -#ifndef CONFIG_SKIP_RELOCATE_UBOOT
359   -relocate: /* relocate U-Boot to RAM */
360   - adr r0, _start /* r0 <- current position of code */
361   - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
362   - cmp r0, r1 /* don't reloc during debug */
363   -#ifndef CONFIG_PRELOADER
364   - beq stack_setup
365   -#endif /* CONFIG_PRELOADER */
366   -
367   - ldr r2, _armboot_start
368   - ldr r3, _bss_start
369   - sub r2, r3, r2 /* r2 <- size of armboot */
370   - add r2, r0, r2 /* r2 <- source end address */
371   -
372   -copy_loop:
373   - ldmia r0!, {r3-r10} /* copy from source address [r0] */
374   - stmia r1!, {r3-r10} /* copy to target address [r1] */
375   - cmp r0, r2 /* until source end address [r2] */
376   - blo copy_loop
377   -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
378   -
379   - /* Set up the stack */
380   -stack_setup:
381   - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
382   -#ifdef CONFIG_PRELOADER
383   - sub sp, r0, #128 /* leave 32 words for abort-stack */
384   -#else
385   - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
386   - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
387   -#ifdef CONFIG_USE_IRQ
388   - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
389   -#endif
390   - sub sp, r0, #12 /* leave 3 words for abort-stack */
391   -#endif /* CONFIG_PRELOADER */
392   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
393   -
394   -clear_bss:
395   - adr r2, _start
396   - ldr r0, _bss_start_ofs /* find start of bss segment */
397   - add r0, r0, r2
398   - ldr r1, _bss_end_ofs /* stop here */
399   - add r1, r1, r2
400   - mov r2, #0x00000000 /* clear */
401   -
402   -#ifndef CONFIG_PRELOADER
403   -clbss_l:str r2, [r0] /* clear loop... */
404   - add r0, r0, #4
405   - cmp r0, r1
406   - bne clbss_l
407   -#endif
408   -
409   - ldr r0, _start_armboot_ofs
410   - adr r1, _start
411   - add r0, r0, r1
412   - ldr pc, r0
413   -
414   -_start_armboot_ofs:
415   -#ifdef CONFIG_NAND_SPL
416   - .word nand_boot - _start
417   -#else
418   -#ifdef CONFIG_ONENAND_IPL
419   - .word start_oneboot - _start
420   -#else
421   - .word start_armboot - _start
422   -#endif /* CONFIG_ONENAND_IPL */
423   -#endif /* CONFIG_NAND_SPL */
424   -
425   -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
426   -
427   -/*
428 319 *************************************************************************
429 320 *
430 321 * CPU_init_critical registers
431 322  
... ... @@ -508,13 +399,7 @@
508 399 sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
509 400 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
510 401  
511   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
512 402 ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort stack
513   -#else
514   - adr r2, _start
515   - sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
516   - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
517   -#endif
518 403 ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
519 404 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
520 405  
521 406  
... ... @@ -545,13 +430,7 @@
545 430 .endm
546 431  
547 432 .macro get_bad_stack
548   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
549 433 ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter in banked mode)
550   -#else
551   - adr r13, _start @ setup our mode stack (enter in banked mode)
552   - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
553   - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack
554   -#endif
555 434  
556 435 str lr, [r13] @ save caller lr in position 0 of saved stack
557 436 mrs lr, spsr @ get the spsr
558 437  
... ... @@ -567,13 +446,7 @@
567 446 .macro get_bad_stack_swi
568 447 sub r13, r13, #4 @ space on current stack for scratch reg.
569 448 str r0, [r13] @ save R0's value.
570   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
571 449 ldr r0, IRQ_STACK_START_IN @ get data regions start
572   -#else
573   - ldr r0, _armboot_start @ get data regions start
574   - sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
575   - sub r0, r0, #(GENERATED_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack
576   -#endif
577 450 str lr, [r0] @ save caller lr in position 0 of saved stack
578 451 mrs r0, spsr @ get the spsr
579 452 str lr, [r0, #4] @ save spsr in position 1 of saved stack
arch/arm/cpu/arm1176/start.S
Diff comments   View file @ a9aa392
... ... @@ -108,12 +108,6 @@
108 108 _TEXT_PHY_BASE:
109 109 .word CONFIG_SYS_PHY_UBOOT_BASE
110 110  
111   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
112   -.globl _armboot_start
113   -_armboot_start:
114   - .word _start
115   -#endif
116   -
117 111 /*
118 112 * These are defined in the board-specific linker script.
119 113 * Subtracting _start from them lets the linker put their
... ... @@ -157,7 +151,6 @@
157 151 _dynsym_start_ofs:
158 152 .word __dynsym_start - _start
159 153  
160   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
161 154 /* IRQ stack memory (calculated at run-time) + 8 bytes */
162 155 .globl IRQ_STACK_START_IN
163 156 IRQ_STACK_START_IN:
164 157  
... ... @@ -419,189 +412,7 @@
419 412 .word board_init_r - _start
420 413 #endif
421 414  
422   -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
423   -
424   -/*
425   - * the actual reset code
426   - */
427   -
428   -reset:
429   - /*
430   - * set the cpu to SVC32 mode
431   - */
432   - mrs r0, cpsr
433   - bic r0, r0, #0x3f
434   - orr r0, r0, #0xd3
435   - msr cpsr, r0
436   -
437   -/*
438   - *************************************************************************
439   - *
440   - * CPU_init_critical registers
441   - *
442   - * setup important registers
443   - * setup memory timing
444   - *
445   - *************************************************************************
446   - */
447   - /*
448   - * we do sys-critical inits only at reboot,
449   - * not when booting from ram!
450   - */
451   -cpu_init_crit:
452   - /*
453   - * When booting from NAND - it has definitely been a reset, so, no need
454   - * to flush caches and disable the MMU
455   - */
456   -#ifndef CONFIG_NAND_SPL
457   - /*
458   - * flush v4 I/D caches
459   - */
460   - mov r0, #0
461   - mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
462   - mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
463   -
464   - /*
465   - * disable MMU stuff and caches
466   - */
467   - mrc p15, 0, r0, c1, c0, 0
468   - bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
469   - bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
470   - orr r0, r0, #0x00000002 @ set bit 2 (A) Align
471   - orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
472   -
473   - /* Prepare to disable the MMU */
474   - adr r2, mmu_disable_phys
475   - sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
476   - b mmu_disable
477   -
478   - .align 5
479   - /* Run in a single cache-line */
480   -mmu_disable:
481   - mcr p15, 0, r0, c1, c0, 0
482   - nop
483   - nop
484   - mov pc, r2
485   -mmu_disable_phys:
486   -
487   -#ifdef CONFIG_DISABLE_TCM
488   - /*
489   - * Disable the TCMs
490   - */
491   - mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */
492   - cmp r0, #0
493   - beq skip_tcmdisable
494   - mov r1, #0
495   - mov r2, #1
496   - tst r0, r2
497   - mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/
498   - tst r0, r2, LSL #16
499   - mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/
500   -skip_tcmdisable:
501   -#endif
502   -#endif
503   -
504   -#ifdef CONFIG_PERIPORT_REMAP
505   - /* Peri port setup */
506   - ldr r0, =CONFIG_PERIPORT_BASE
507   - orr r0, r0, #CONFIG_PERIPORT_SIZE
508   - mcr p15,0,r0,c15,c2,4
509   -#endif
510   -
511   - /*
512   - * Go setup Memory and board specific bits prior to relocation.
513   - */
514   - bl lowlevel_init /* go setup pll,mux,memory */
515   -
516   -#ifndef CONFIG_SKIP_RELOCATE_UBOOT
517   -relocate: /* relocate U-Boot to RAM */
518   - adr r0, _start /* r0 <- current position of code */
519   - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
520   - cmp r0, r1 /* don't reloc during debug */
521   - beq stack_setup
522   -
523   - ldr r2, _armboot_start
524   - ldr r3, _bss_start
525   - sub r2, r3, r2 /* r2 <- size of armboot */
526   - add r2, r0, r2 /* r2 <- source end address */
527   -
528   -copy_loop:
529   - ldmia r0!, {r3-r10} /* copy from source address [r0] */
530   - stmia r1!, {r3-r10} /* copy to target address [r1] */
531   - cmp r0, r2 /* until source end address [r2] */
532   - blo copy_loop
533   -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
534   -
535 415 #ifdef CONFIG_ENABLE_MMU
536   -enable_mmu:
537   - /* enable domain access */
538   - ldr r5, =0x0000ffff
539   - mcr p15, 0, r5, c3, c0, 0 /* load domain access register */
540   -
541   - /* Set the TTB register */
542   - ldr r0, _mmu_table_base
543   - ldr r1, =CONFIG_SYS_PHY_UBOOT_BASE
544   - ldr r2, =0xfff00000
545   - bic r0, r0, r2
546   - orr r1, r0, r1
547   - mcr p15, 0, r1, c2, c0, 0
548   -
549   - /* Enable the MMU */
550   - mrc p15, 0, r0, c1, c0, 0
551   - orr r0, r0, #1 /* Set CR_M to enable MMU */
552   -
553   - /* Prepare to enable the MMU */
554   - adr r1, skip_hw_init
555   - and r1, r1, #0x3fc
556   - ldr r2, _TEXT_BASE
557   - ldr r3, =0xfff00000
558   - and r2, r2, r3
559   - orr r2, r2, r1
560   - b mmu_enable
561   -
562   - .align 5
563   - /* Run in a single cache-line */
564   -mmu_enable:
565   -
566   - mcr p15, 0, r0, c1, c0, 0
567   - nop
568   - nop
569   - mov pc, r2
570   -skip_hw_init:
571   -#endif
572   -
573   - /* Set up the stack */
574   -stack_setup:
575   - ldr r0, =CONFIG_SYS_UBOOT_BASE /* base of copy in DRAM */
576   - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
577   - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
578   - sub sp, r0, #12 /* leave 3 words for abort-stack */
579   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
580   -
581   -clear_bss:
582   - ldr r0, _bss_start /* find start of bss segment */
583   - ldr r1, _bss_end /* stop here */
584   - mov r2, #0 /* clear */
585   -
586   -clbss_l:
587   - str r2, [r0] /* clear loop... */
588   - add r0, r0, #4
589   - cmp r0, r1
590   - blo clbss_l
591   -
592   -#ifndef CONFIG_NAND_SPL
593   - ldr pc, _start_armboot
594   -
595   -_start_armboot:
596   - .word start_armboot
597   -#else
598   - b nand_boot
599   -/* .word nand_boot*/
600   -#endif
601   -
602   -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
603   -
604   -#ifdef CONFIG_ENABLE_MMU
605 416 _mmu_table_base:
606 417 .word mmu_table
607 418 #endif
608 419  
... ... @@ -687,14 +498,7 @@
687 498 /* Save user registers (now in svc mode) r0-r12 */
688 499 stmia sp, {r0 - r12}
689 500  
690   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
691   - ldr r2, _armboot_start
692   - sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
693   - /* set base 2 words into abort stack */
694   - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8)
695   -#else
696 501 ldr r2, IRQ_STACK_START_IN
697   -#endif
698 502 /* get values for "aborted" pc and cpsr (into parm regs) */
699 503 ldmia r2, {r2 - r3}
700 504 /* grab pointer to old stack */
701 505  
... ... @@ -709,16 +513,7 @@
709 513 .endm
710 514  
711 515 .macro get_bad_stack
712   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
713   - /* setup our mode stack (enter in banked mode) */
714   - ldr r13, _armboot_start
715   - /* move past malloc pool */
716   - sub r13, r13, #(CONFIG_SYS_MALLOC_LEN)
717   - /* move to reserved a couple spots for abort stack */
718   - sub r13, r13, #(GENERATED_GBL_DATA_SIZE + 8)
719   -#else
720 516 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
721   -#endif
722 517  
723 518 /* save caller lr in position 0 of saved stack */
724 519 str lr, [r13]
725 520  
... ... @@ -743,16 +538,7 @@
743 538 sub r13, r13, #4
744 539 /* save R0's value. */
745 540 str r0, [r13]
746   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
747   - /* get data regions start */
748   - ldr r0, _armboot_start
749   - /* move past malloc pool */
750   - sub r0, r0, #(CONFIG_SYS_MALLOC_LEN)
751   - /* move past gbl and a couple spots for abort stack */
752   - sub r0, r0, #(GENERATED_GBL_DATA_SIZE + 8)
753   -#else
754 541 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
755   -#endif
756 542 /* save caller lr in position 0 of saved stack */
757 543 str lr, [r0]
758 544 /* get the spsr */
arch/arm/cpu/arm720t/start.S
Diff comments   View file @ a9aa392
... ... @@ -79,12 +79,6 @@
79 79 _TEXT_BASE:
80 80 .word CONFIG_SYS_TEXT_BASE
81 81  
82   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
83   -.globl _armboot_start
84   -_armboot_start:
85   - .word _start
86   -#endif
87   -
88 82 /*
89 83 * These are defined in the board-specific linker script.
90 84 */
... ... @@ -108,7 +102,6 @@
108 102 .word 0x0badc0de
109 103 #endif
110 104  
111   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
112 105 /* IRQ stack memory (calculated at run-time) + 8 bytes */
113 106 .globl IRQ_STACK_START_IN
114 107 IRQ_STACK_START_IN:
115 108  
... ... @@ -264,93 +257,7 @@
264 257  
265 258 _board_init_r: .word board_init_r
266 259  
267   -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
268   -
269 260 /*
270   - * the actual reset code
271   - */
272   -
273   -reset:
274   - /*
275   - * set the cpu to SVC32 mode
276   - */
277   - mrs r0,cpsr
278   - bic r0,r0,#0x1f
279   - orr r0,r0,#0x13
280   - msr cpsr,r0
281   -
282   - /*
283   - * we do sys-critical inits only at reboot,
284   - * not when booting from ram!
285   - */
286   -#ifndef CONFIG_SKIP_LOWLEVEL_INIT
287   - bl cpu_init_crit
288   -#endif
289   -
290   -#ifdef CONFIG_LPC2292
291   - bl lowlevel_init
292   -#endif
293   -
294   -#ifndef CONFIG_SKIP_RELOCATE_UBOOT
295   -relocate: /* relocate U-Boot to RAM */
296   - adr r0, _start /* r0 <- current position of code */
297   - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
298   - cmp r0, r1 /* don't reloc during debug */
299   - beq stack_setup
300   -
301   -#if CONFIG_SYS_TEXT_BASE
302   -#ifndef CONFIG_LPC2292 /* already done in lowlevel_init */
303   - ldr r2, =0x0 /* Relocate the exception vectors */
304   - cmp r1, r2 /* and associated data to address */
305   - ldmneia r0!, {r3-r10} /* 0x0. Do nothing if CONFIG_SYS_TEXT_BASE is */
306   - stmneia r2!, {r3-r10} /* 0x0. Copy the first 15 words. */
307   - ldmneia r0, {r3-r9}
308   - stmneia r2, {r3-r9}
309   - adrne r0, _start /* restore r0 */
310   -#endif /* !CONFIG_LPC2292 */
311   -#endif
312   -
313   - ldr r2, _armboot_start
314   - ldr r3, _bss_start
315   - sub r2, r3, r2 /* r2 <- size of armboot */
316   - add r2, r0, r2 /* r2 <- source end address */
317   -
318   -copy_loop:
319   - ldmia r0!, {r3-r10} /* copy from source address [r0] */
320   - stmia r1!, {r3-r10} /* copy to target address [r1] */
321   - cmp r0, r2 /* until source end address [r2] */
322   - blo copy_loop
323   -
324   -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
325   -
326   - /* Set up the stack */
327   -stack_setup:
328   - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
329   - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
330   - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
331   -#ifdef CONFIG_USE_IRQ
332   - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
333   -#endif
334   - sub sp, r0, #12 /* leave 3 words for abort-stack */
335   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
336   -
337   -clear_bss:
338   - ldr r0, _bss_start /* find start of bss segment */
339   - ldr r1, _bss_end /* stop here */
340   - mov r2, #0x00000000 /* clear */
341   -
342   -clbss_l:str r2, [r0] /* clear loop... */
343   - add r0, r0, #4
344   - cmp r0, r1
345   - blo clbss_l
346   -
347   - ldr pc, _start_armboot
348   -
349   -_start_armboot: .word start_armboot
350   -
351   -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
352   -
353   -/*
354 261 *************************************************************************
355 262 *
356 263 * CPU_init_critical registers
357 264  
... ... @@ -606,13 +513,7 @@
606 513 stmia sp, {r0 - r12} @ Calling r0-r12
607 514 add r8, sp, #S_PC
608 515  
609   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
610   - ldr r2, _armboot_start
611   - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
612   - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
613   -#else
614 516 ldr r2, IRQ_STACK_START_IN
615   -#endif
616 517 ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
617 518 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
618 519  
619 520  
... ... @@ -643,13 +544,7 @@
643 544 .endm
644 545  
645 546 .macro get_bad_stack
646   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
647   - ldr r13, _armboot_start @ setup our mode stack
648   - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
649   - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
650   -#else
651 547 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
652   -#endif
653 548  
654 549 str lr, [r13] @ save caller lr / spsr
655 550 mrs lr, spsr
arch/arm/cpu/arm920t/start.S
Diff comments   View file @ a9aa392
... ... @@ -75,12 +75,6 @@
75 75 _TEXT_BASE:
76 76 .word CONFIG_SYS_TEXT_BASE
77 77  
78   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
79   -.globl _armboot_start
80   -_armboot_start:
81   - .word _start
82   -#endif
83   -
84 78 /*
85 79 * These are defined in the board-specific linker script.
86 80 */
... ... @@ -104,7 +98,6 @@
104 98 .word 0x0badc0de
105 99 #endif
106 100  
107   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
108 101 /* IRQ stack memory (calculated at run-time) + 8 bytes */
109 102 .globl IRQ_STACK_START_IN
110 103 IRQ_STACK_START_IN:
111 104  
... ... @@ -316,128 +309,7 @@
316 309 _board_init_r: .word board_init_r
317 310 #endif
318 311  
319   -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
320 312 /*
321   - * the actual start code
322   - */
323   -
324   -start_code:
325   - /*
326   - * set the cpu to SVC32 mode
327   - */
328   - mrs r0, cpsr
329   - bic r0, r0, #0x1f
330   - orr r0, r0, #0xd3
331   - msr cpsr, r0
332   -
333   - bl coloured_LED_init
334   - bl red_LED_on
335   -
336   -#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
337   - /*
338   - * relocate exception table
339   - */
340   - ldr r0, =_start
341   - ldr r1, =0x0
342   - mov r2, #16
343   -copyex:
344   - subs r2, r2, #1
345   - ldr r3, [r0], #4
346   - str r3, [r1], #4
347   - bne copyex
348   -#endif
349   -
350   -#ifdef CONFIG_S3C24X0
351   - /* turn off the watchdog */
352   -
353   -# if defined(CONFIG_S3C2400)
354   -# define pWTCON 0x15300000
355   -# define INTMSK 0x14400008 /* Interupt-Controller base addresses */
356   -# define CLKDIVN 0x14800014 /* clock divisor register */
357   -#else
358   -# define pWTCON 0x53000000
359   -# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
360   -# define INTSUBMSK 0x4A00001C
361   -# define CLKDIVN 0x4C000014 /* clock divisor register */
362   -# endif
363   -
364   - ldr r0, =pWTCON
365   - mov r1, #0x0
366   - str r1, [r0]
367   -
368   - /*
369   - * mask all IRQs by setting all bits in the INTMR - default
370   - */
371   - mov r1, #0xffffffff
372   - ldr r0, =INTMSK
373   - str r1, [r0]
374   -# if defined(CONFIG_S3C2410)
375   - ldr r1, =0x3ff
376   - ldr r0, =INTSUBMSK
377   - str r1, [r0]
378   -# endif
379   -
380   - /* FCLK:HCLK:PCLK = 1:2:4 */
381   - /* default FCLK is 120 MHz ! */
382   - ldr r0, =CLKDIVN
383   - mov r1, #3
384   - str r1, [r0]
385   -#endif /* CONFIG_S3C24X0 */
386   -
387   - /*
388   - * we do sys-critical inits only at reboot,
389   - * not when booting from ram!
390   - */
391   -#ifndef CONFIG_SKIP_LOWLEVEL_INIT
392   - bl cpu_init_crit
393   -#endif
394   -
395   -#ifndef CONFIG_SKIP_RELOCATE_UBOOT
396   -relocate: /* relocate U-Boot to RAM */
397   - adr r0, _start /* r0 <- current position of code */
398   - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
399   - cmp r0, r1 /* don't reloc during debug */
400   - beq stack_setup
401   -
402   - ldr r2, _armboot_start
403   - ldr r3, _bss_start
404   - sub r2, r3, r2 /* r2 <- size of armboot */
405   - add r2, r0, r2 /* r2 <- source end address */
406   -
407   -copy_loop:
408   - ldmia r0!, {r3-r10} /* copy from source address [r0] */
409   - stmia r1!, {r3-r10} /* copy to target address [r1] */
410   - cmp r0, r2 /* until source end address [r2] */
411   - blo copy_loop
412   -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
413   -
414   - /* Set up the stack */
415   -stack_setup:
416   - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
417   - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
418   - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
419   -#ifdef CONFIG_USE_IRQ
420   - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
421   -#endif
422   - sub sp, r0, #12 /* leave 3 words for abort-stack */
423   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
424   -
425   -clear_bss:
426   - ldr r0, _bss_start /* find start of bss segment */
427   - ldr r1, _bss_end /* stop here */
428   - mov r2, #0x00000000 /* clear */
429   -
430   -clbss_l:str r2, [r0] /* clear loop... */
431   - add r0, r0, #4
432   - cmp r0, r1
433   - blo clbss_l
434   -
435   - ldr pc, _start_armboot
436   -
437   -_start_armboot: .word start_armboot
438   -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
439   -
440   -/*
441 313 *************************************************************************
442 314 *
443 315 * CPU_init_critical registers
444 316  
... ... @@ -525,15 +397,7 @@
525 397 .macro bad_save_user_regs
526 398 sub sp, sp, #S_FRAME_SIZE
527 399 stmia sp, {r0 - r12} @ Calling r0-r12
528   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
529   - ldr r2, _armboot_start
530   - sub r2, r2, #(CONFIG_STACKSIZE)
531   - sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
532   - /* set base 2 words into abort stack */
533   - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8)
534   -#else
535 400 ldr r2, IRQ_STACK_START_IN
536   -#endif
537 401 ldmia r2, {r2 - r3} @ get pc, cpsr
538 402 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
539 403  
540 404  
... ... @@ -565,15 +429,7 @@
565 429 .endm
566 430  
567 431 .macro get_bad_stack
568   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
569   - ldr r13, _armboot_start @ setup our mode stack
570   - sub r13, r13, #(CONFIG_STACKSIZE)
571   - sub r13, r13, #(CONFIG_SYS_MALLOC_LEN)
572   - /* reserve a couple spots in abort stack */
573   - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8)
574   -#else
575 432 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
576   -#endif
577 433  
578 434 str lr, [r13] @ save caller lr / spsr
579 435 mrs lr, spsr
arch/arm/cpu/arm925t/start.S
Diff comments   View file @ a9aa392
... ... @@ -85,12 +85,6 @@
85 85 _TEXT_BASE:
86 86 .word CONFIG_SYS_TEXT_BASE
87 87  
88   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
89   -.globl _armboot_start
90   -_armboot_start:
91   - .word _start
92   -#endif
93   -
94 88 /*
95 89 * These are defined in the board-specific linker script.
96 90 */
... ... @@ -114,7 +108,6 @@
114 108 .word 0x0badc0de
115 109 #endif
116 110  
117   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
118 111 /* IRQ stack memory (calculated at run-time) + 8 bytes */
119 112 .globl IRQ_STACK_START_IN
120 113 IRQ_STACK_START_IN:
121 114  
... ... @@ -305,109 +298,7 @@
305 298 _board_init_r: .word board_init_r
306 299 #endif
307 300  
308   -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
309 301 /*
310   - * the actual reset code
311   - */
312   -
313   -reset:
314   - /*
315   - * set the cpu to SVC32 mode
316   - */
317   - mrs r0,cpsr
318   - bic r0,r0,#0x1f
319   - orr r0,r0,#0xd3
320   - msr cpsr,r0
321   -
322   - /*
323   - * Set up 925T mode
324   - */
325   - mov r1, #0x81 /* Set ARM925T configuration. */
326   - mcr p15, 0, r1, c15, c1, 0 /* Write ARM925T configuration register. */
327   -
328   - /*
329   - * turn off the watchdog, unlock/diable sequence
330   - */
331   - mov r1, #0xF5
332   - ldr r0, =WDTIM_MODE
333   - strh r1, [r0]
334   - mov r1, #0xA0
335   - strh r1, [r0]
336   -
337   - /*
338   - * mask all IRQs by setting all bits in the INTMR - default
339   - */
340   - mov r1, #0xffffffff
341   - ldr r0, =REG_IHL1_MIR
342   - str r1, [r0]
343   - ldr r0, =REG_IHL2_MIR
344   - str r1, [r0]
345   -
346   - /*
347   - * wait for dpll to lock
348   - */
349   - ldr r0, =CK_DPLL1
350   - mov r1, #0x10
351   - strh r1, [r0]
352   -poll1:
353   - ldrh r1, [r0]
354   - ands r1, r1, #0x01
355   - beq poll1
356   -
357   - /*
358   - * we do sys-critical inits only at reboot,
359   - * not when booting from ram!
360   - */
361   -#ifndef CONFIG_SKIP_LOWLEVEL_INIT
362   - bl cpu_init_crit
363   -#endif
364   -
365   -#ifndef CONFIG_SKIP_RELOCATE_UBOOT
366   -relocate: /* relocate U-Boot to RAM */
367   - adr r0, _start /* r0 <- current position of code */
368   - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
369   - cmp r0, r1 /* don't reloc during debug */
370   - beq stack_setup
371   -
372   - ldr r2, _armboot_start
373   - ldr r3, _bss_start
374   - sub r2, r3, r2 /* r2 <- size of armboot */
375   - add r2, r0, r2 /* r2 <- source end address */
376   -
377   -copy_loop:
378   - ldmia r0!, {r3-r10} /* copy from source address [r0] */
379   - stmia r1!, {r3-r10} /* copy to target address [r1] */
380   - cmp r0, r2 /* until source end address [r2] */
381   - blo copy_loop
382   -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
383   -
384   - /* Set up the stack */
385   -stack_setup:
386   - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
387   - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
388   - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
389   -#ifdef CONFIG_USE_IRQ
390   - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
391   -#endif
392   - sub sp, r0, #12 /* leave 3 words for abort-stack */
393   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
394   -
395   -clear_bss:
396   - ldr r0, _bss_start /* find start of bss segment */
397   - ldr r1, _bss_end /* stop here */
398   - mov r2, #0x00000000 /* clear */
399   -
400   -clbss_l:str r2, [r0] /* clear loop... */
401   - add r0, r0, #4
402   - cmp r0, r1
403   - blo clbss_l
404   -
405   - ldr pc, _start_armboot
406   -
407   -_start_armboot: .word start_armboot
408   -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
409   -
410   -/*
411 302 *************************************************************************
412 303 *
413 304 * CPU_init_critical registers
414 305  
... ... @@ -489,13 +380,7 @@
489 380 sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
490 381 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
491 382  
492   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
493   - ldr r2, _armboot_start
494   - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
495   - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
496   -#else
497 383 ldr r2, IRQ_STACK_START_IN
498   -#endif
499 384 ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
500 385 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
501 386  
502 387  
... ... @@ -526,13 +411,7 @@
526 411 .endm
527 412  
528 413 .macro get_bad_stack
529   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
530   - ldr r13, _armboot_start @ setup our mode stack
531   - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
532   - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
533   -#else
534 414 ldr r13, IRQ_STACK_START_IN
535   -#endif
536 415  
537 416 str lr, [r13] @ save caller lr in position 0 of saved stack
538 417 mrs lr, spsr @ get the spsr
arch/arm/cpu/arm926ejs/orion5x/dram.c
Diff comments   View file @ a9aa392
... ... @@ -49,20 +49,6 @@
49 49 result = winregs[bank].base;
50 50 return result;
51 51 }
52   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
53   -int dram_init(void)
54   -{
55   - int i;
56   -
57   - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
58   - gd->bd->bi_dram[i].start = orion5x_sdram_bar(i);
59   - gd->bd->bi_dram[i].size = get_ram_size(
60   - (volatile long *) (gd->bd->bi_dram[i].start),
61   - CONFIG_MAX_RAM_BANK_SIZE);
62   - }
63   - return 0;
64   -}
65   -#else
66 52 int dram_init (void)
67 53 {
68 54 /* dram_init must store complete ramsize in gd->ram_size */
... ... @@ -83,5 +69,4 @@
83 69 CONFIG_MAX_RAM_BANK_SIZE);
84 70 }
85 71 }
86   -#endif
arch/arm/cpu/arm926ejs/start.S
Diff comments   View file @ a9aa392
... ... @@ -145,7 +145,6 @@
145 145 .word 0x0badc0de
146 146 #endif
147 147  
148   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
149 148 /* IRQ stack memory (calculated at run-time) + 8 bytes */
150 149 .globl IRQ_STACK_START_IN
151 150 IRQ_STACK_START_IN:
152 151  
... ... @@ -307,90 +306,7 @@
307 306 _dynsym_start_ofs:
308 307 .word __dynsym_start - _start
309 308  
310   -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
311 309 /*
312   - * the actual reset code
313   - */
314   -
315   -reset:
316   - /*
317   - * set the cpu to SVC32 mode
318   - */
319   - mrs r0,cpsr
320   - bic r0,r0,#0x1f
321   - orr r0,r0,#0xd3
322   - msr cpsr,r0
323   -
324   - /*
325   - * we do sys-critical inits only at reboot,
326   - * not when booting from ram!
327   - */
328   -#ifndef CONFIG_SKIP_LOWLEVEL_INIT
329   - bl cpu_init_crit
330   -#endif
331   -
332   -#ifndef CONFIG_SKIP_RELOCATE_UBOOT
333   -relocate: /* relocate U-Boot to RAM */
334   - adr r0, _start /* r0 <- current position of code */
335   - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
336   - cmp r0, r1 /* don't reloc during debug */
337   - beq stack_setup
338   - ldr r3, _bss_start_ofs /* r3 <- _bss_start - _start */
339   - add r2, r0, r3 /* r2 <- source end address */
340   -
341   -copy_loop:
342   - ldmia r0!, {r3-r10} /* copy from source address [r0] */
343   - stmia r1!, {r3-r10} /* copy to target address [r1] */
344   - cmp r0, r2 /* until source end address [r2] */
345   - blo copy_loop
346   -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
347   -
348   - /* Set up the stack */
349   -stack_setup:
350   - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
351   - sub sp, r0, #128 /* leave 32 words for abort-stack */
352   -#ifndef CONFIG_PRELOADER
353   - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
354   - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
355   -#ifdef CONFIG_USE_IRQ
356   - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
357   -#endif
358   -#endif /* CONFIG_PRELOADER */
359   - sub sp, r0, #12 /* leave 3 words for abort-stack */
360   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
361   -
362   -clear_bss:
363   - adr r2, _start
364   - ldr r0, _bss_start_ofs /* find start of bss segment */
365   - add r0, r0, r2
366   - ldr r1, _bss_end_ofs /* stop here */
367   - add r1, r1, r2
368   - mov r2, #0x00000000 /* clear */
369   -
370   -#ifndef CONFIG_PRELOADER
371   -clbss_l:str r2, [r0] /* clear loop... */
372   - add r0, r0, #4
373   - cmp r0, r1
374   - blo clbss_l
375   -
376   - bl coloured_LED_init
377   - bl red_LED_on
378   -#endif /* CONFIG_PRELOADER */
379   -
380   - ldr r0, _start_armboot_ofs
381   - adr r1, _start
382   - add r0, r0, r1
383   - ldr pc, r0
384   -
385   -_start_armboot_ofs:
386   -#ifdef CONFIG_NAND_SPL
387   - .word nand_boot - _start
388   -#else
389   - .word start_armboot - _start
390   -#endif /* CONFIG_NAND_SPL */
391   -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
392   -
393   -/*
394 310 *************************************************************************
395 311 *
396 312 * CPU_init_critical registers
397 313  
... ... @@ -474,13 +390,7 @@
474 390 @ carve out a frame on current user stack
475 391 sub sp, sp, #S_FRAME_SIZE
476 392 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
477   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
478   - adr r2, _start
479   - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
480   - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
481   -#else
482 393 ldr r2, IRQ_STACK_START_IN
483   -#endif
484 394 @ get values for "aborted" pc and cpsr (into parm regs)
485 395 ldmia r2, {r2 - r3}
486 396 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
487 397  
... ... @@ -512,13 +422,7 @@
512 422 .endm
513 423  
514 424 .macro get_bad_stack
515   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
516   - adr r13, _start @ setup our mode stack
517   - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
518   - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
519   -#else
520 425 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
521   -#endif
522 426  
523 427 str lr, [r13] @ save caller lr in position 0 of saved stack
524 428 mrs lr, spsr @ get the spsr
arch/arm/cpu/arm946es/start.S
Diff comments   View file @ a9aa392
... ... @@ -89,12 +89,6 @@
89 89 _TEXT_BASE:
90 90 .word CONFIG_SYS_TEXT_BASE
91 91  
92   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
93   -.globl _armboot_start
94   -_armboot_start:
95   - .word _start
96   -#endif
97   -
98 92 /*
99 93 * These are defined in the board-specific linker script.
100 94 */
... ... @@ -118,7 +112,6 @@
118 112 .word 0x0badc0de
119 113 #endif
120 114  
121   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
122 115 /* IRQ stack memory (calculated at run-time) + 8 bytes */
123 116 .globl IRQ_STACK_START_IN
124 117 IRQ_STACK_START_IN:
125 118  
... ... @@ -273,73 +266,7 @@
273 266 _board_init_r: .word board_init_r
274 267 #endif
275 268  
276   -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
277 269 /*
278   - * the actual reset code
279   - */
280   -
281   -reset:
282   - /*
283   - * set the cpu to SVC32 mode
284   - */
285   - mrs r0,cpsr
286   - bic r0,r0,#0x1f
287   - orr r0,r0,#0xd3
288   - msr cpsr,r0
289   -
290   - /*
291   - * we do sys-critical inits only at reboot,
292   - * not when booting from ram!
293   - */
294   -#ifndef CONFIG_SKIP_LOWLEVEL_INIT
295   - bl cpu_init_crit
296   -#endif
297   -
298   -relocate: /* relocate U-Boot to RAM */
299   - adr r0, _start /* r0 <- current position of code */
300   - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
301   - cmp r0, r1 /* don't reloc during debug */
302   - beq stack_setup
303   -
304   - ldr r2, _armboot_start
305   - ldr r3, _bss_start
306   - sub r2, r3, r2 /* r2 <- size of armboot */
307   - add r2, r0, r2 /* r2 <- source end address */
308   -
309   -copy_loop:
310   - ldmia r0!, {r3-r10} /* copy from source address [r0] */
311   - stmia r1!, {r3-r10} /* copy to target address [r1] */
312   - cmp r0, r2 /* until source end address [r2] */
313   - blo copy_loop
314   -
315   - /* Set up the stack */
316   -stack_setup:
317   - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
318   - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
319   - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
320   -#ifdef CONFIG_USE_IRQ
321   - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
322   -#endif
323   - sub sp, r0, #12 /* leave 3 words for abort-stack */
324   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
325   -
326   -clear_bss:
327   - ldr r0, _bss_start /* find start of bss segment */
328   - ldr r1, _bss_end /* stop here */
329   - mov r2, #0x00000000 /* clear */
330   -
331   -clbss_l:str r2, [r0] /* clear loop... */
332   - add r0, r0, #4
333   - cmp r0, r1
334   - bne clbss_l
335   -
336   - ldr pc, _start_armboot
337   -
338   -_start_armboot:
339   - .word start_armboot
340   -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
341   -
342   -/*
343 270 *************************************************************************
344 271 *
345 272 * CPU_init_critical registers
346 273  
... ... @@ -424,13 +351,7 @@
424 351 sub sp, sp, #S_FRAME_SIZE
425 352 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
426 353  
427   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
428   - ldr r2, _armboot_start
429   - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
430   - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
431   -#else
432 354 ldr r2, IRQ_STACK_START_IN
433   -#endif
434 355 @ get values for "aborted" pc and cpsr (into parm regs)
435 356 ldmia r2, {r2 - r3}
436 357 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
437 358  
... ... @@ -462,13 +383,7 @@
462 383 .endm
463 384  
464 385 .macro get_bad_stack
465   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
466   - ldr r13, _armboot_start @ setup our mode stack
467   - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
468   - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
469   -#else
470 386 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
471   -#endif
472 387  
473 388 str lr, [r13] @ save caller lr in position 0 of saved stack
474 389 mrs lr, spsr @ get the spsr
arch/arm/cpu/arm_intcm/start.S
Diff comments   View file @ a9aa392
... ... @@ -87,12 +87,6 @@
87 87 _TEXT_BASE:
88 88 .word CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */
89 89  
90   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
91   -.globl _armboot_start
92   -_armboot_start:
93   - .word _start
94   -#endif
95   -
96 90 /*
97 91 * These are defined in the board-specific linker script.
98 92 */
... ... @@ -116,7 +110,6 @@
116 110 .word 0x0badc0de
117 111 #endif
118 112  
119   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
120 113 /* IRQ stack memory (calculated at run-time) + 8 bytes */
121 114 .globl IRQ_STACK_START_IN
122 115 IRQ_STACK_START_IN:
123 116  
... ... @@ -268,75 +261,7 @@
268 261  
269 262 _board_init_r: .word board_init_r
270 263  
271   -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
272   -
273 264 /*
274   - * the actual reset code
275   - */
276   -.globl reset
277   -reset:
278   - /*
279   - * set the cpu to SVC32 mode
280   - */
281   - mrs r0,cpsr
282   - bic r0,r0,#0x1f
283   - orr r0,r0,#0xd3
284   - msr cpsr,r0
285   -
286   - /*
287   - * we do sys-critical inits only at reboot,
288   - * not when booting from ram!
289   - */
290   -#ifndef CONFIG_SKIP_LOWLEVEL_INIT
291   - bl cpu_init_crit
292   -#endif
293   -
294   -relocate: /* relocate U-Boot to RAM */
295   - adr r0, _start /* pc relative address of label */
296   - ldr r1, _TEXT_BASE /* linked image address of label */
297   - cmp r0, r1 /* test if we run from flash or RAM */
298   - beq stack_setup /* ifeq we are in the RAM copy */
299   -
300   - ldr r2, _armboot_start
301   - ldr r3, _bss_start
302   - sub r2, r3, r2 /* r2 <- size of armboot */
303   - add r2, r0, r2 /* r2 <- source end address */
304   -
305   -copy_loop:
306   - ldmia r0!, {r3-r10} /* copy from source address [r0] */
307   - stmia r1!, {r3-r10} /* copy to target address [r1] */
308   - cmp r0, r2 /* until source end address [r2] */
309   - blo copy_loop
310   -
311   - /* Set up the stack */
312   -stack_setup:
313   - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
314   - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
315   - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
316   -#ifdef CONFIG_USE_IRQ
317   - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
318   -#endif
319   - sub sp, r0, #12 /* leave 3 words for abort-stack */
320   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
321   -
322   -clear_bss:
323   - ldr r0, _bss_start /* find start of bss segment */
324   - ldr r1, _bss_end /* stop here */
325   - mov r2, #0x00000000 /* clear */
326   -
327   -clbss_l:str r2, [r0] /* clear loop... */
328   - add r0, r0, #4
329   - cmp r0, r1
330   - blo clbss_l
331   -
332   - ldr pc, _start_armboot
333   -
334   -_start_armboot:
335   - .word start_armboot
336   -
337   -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
338   -
339   -/*
340 265 *************************************************************************
341 266 *
342 267 * CPU_init_critical registers
343 268  
... ... @@ -400,13 +325,7 @@
400 325 sub sp, sp, #S_FRAME_SIZE
401 326 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
402 327  
403   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
404   - ldr r2, _armboot_start
405   - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
406   - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
407   -#else
408 328 ldr r2, IRQ_STACK_START_IN
409   -#endif
410 329 @ get values for "aborted" pc and cpsr (into parm regs)
411 330 ldmia r2, {r2 - r3}
412 331 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
413 332  
... ... @@ -438,13 +357,7 @@
438 357 .endm
439 358  
440 359 .macro get_bad_stack
441   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
442   - ldr r13, _armboot_start @ setup our mode stack
443   - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
444   - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
445   -#else
446 360 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
447   -#endif
448 361  
449 362 str lr, [r13] @ save caller lr in position 0 of saved stack
450 363 mrs lr, spsr @ get the spsr
arch/arm/cpu/armv7/omap3/emif4.c
Diff comments   View file @ a9aa392
... ... @@ -136,7 +136,6 @@
136 136 * dram_init -
137 137 * - Sets uboots idea of sdram size
138 138 */
139   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
140 139 int dram_init(void)
141 140 {
142 141 DECLARE_GLOBAL_DATA_PTR;
... ... @@ -151,28 +150,6 @@
151 150 if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED))
152 151 size1 = get_sdr_cs_size(CS1);
153 152  
154   - gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
155   - gd->bd->bi_dram[0].size = size0;
156   - gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
157   - gd->bd->bi_dram[1].size = size1;
158   -
159   - return 0;
160   -}
161   -#else
162   -int dram_init(void)
163   -{
164   - DECLARE_GLOBAL_DATA_PTR;
165   - unsigned int size0 = 0, size1 = 0;
166   -
167   - size0 = get_sdr_cs_size(CS0);
168   - /*
169   - * If a second bank of DDR is attached to CS1 this is
170   - * where it can be started. Early init code will init
171   - * memory on CS0.
172   - */
173   - if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED))
174   - size1 = get_sdr_cs_size(CS1);
175   -
176 153 gd->ram_size = size0 + size1;
177 154 return 0;
178 155 }
... ... @@ -190,7 +167,6 @@
190 167 gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
191 168 gd->bd->bi_dram[1].size = size1;
192 169 }
193   -#endif
194 170  
195 171 /*
196 172 * mem_init() -
arch/arm/cpu/armv7/omap3/sdrc.c
Diff comments   View file @ a9aa392
... ... @@ -163,7 +163,6 @@
163 163 * dram_init -
164 164 * - Sets uboots idea of sdram size
165 165 */
166   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
167 166 int dram_init(void)
168 167 {
169 168 DECLARE_GLOBAL_DATA_PTR;
... ... @@ -181,32 +180,6 @@
181 180  
182 181 size1 = get_sdr_cs_size(CS1);
183 182 }
184   -
185   - gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
186   - gd->bd->bi_dram[0].size = size0;
187   - gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
188   - gd->bd->bi_dram[1].size = size1;
189   -
190   - return 0;
191   -}
192   -#else
193   -int dram_init(void)
194   -{
195   - DECLARE_GLOBAL_DATA_PTR;
196   - unsigned int size0 = 0, size1 = 0;
197   -
198   - size0 = get_sdr_cs_size(CS0);
199   - /*
200   - * If a second bank of DDR is attached to CS1 this is
201   - * where it can be started. Early init code will init
202   - * memory on CS0.
203   - */
204   - if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) {
205   - do_sdrc_init(CS1, NOT_EARLY);
206   - make_cs1_contiguous();
207   -
208   - size1 = get_sdr_cs_size(CS1);
209   - }
210 183 gd->ram_size = size0 + size1;
211 184  
212 185 return 0;
... ... @@ -225,7 +198,6 @@
225 198 gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
226 199 gd->bd->bi_dram[1].size = size1;
227 200 }
228   -#endif
229 201  
230 202 /*
231 203 * mem_init -
arch/arm/cpu/armv7/omap4/board.c
Diff comments   View file @ a9aa392
... ... @@ -102,12 +102,7 @@
102 102 {
103 103 DECLARE_GLOBAL_DATA_PTR;
104 104  
105   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
106   - gd->bd->bi_dram[0].start = 0x80000000;
107   - gd->bd->bi_dram[0].size = sdram_size();
108   -#else
109 105 gd->ram_size = sdram_size();
110   -#endif
111 106  
112 107 return 0;
113 108 }
arch/arm/cpu/armv7/start.S
Diff comments   View file @ a9aa392
... ... @@ -70,12 +70,6 @@
70 70 _TEXT_BASE:
71 71 .word CONFIG_SYS_TEXT_BASE
72 72  
73   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
74   -.globl _armboot_start
75   -_armboot_start:
76   - .word _start
77   -#endif
78   -
79 73 /*
80 74 * These are defined in the board-specific linker script.
81 75 */
... ... @@ -99,7 +93,6 @@
99 93 .word 0x0badc0de
100 94 #endif
101 95  
102   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
103 96 /* IRQ stack memory (calculated at run-time) + 8 bytes */
104 97 .globl IRQ_STACK_START_IN
105 98 IRQ_STACK_START_IN:
... ... @@ -295,94 +288,6 @@
295 288 _dynsym_start_ofs:
296 289 .word __dynsym_start - _start
297 290  
298   -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
299   -/*
300   - * the actual reset code
301   - */
302   -
303   -reset:
304   - /*
305   - * set the cpu to SVC32 mode
306   - */
307   - mrs r0, cpsr
308   - bic r0, r0, #0x1f
309   - orr r0, r0, #0xd3
310   - msr cpsr,r0
311   -
312   -#if (CONFIG_OMAP34XX)
313   - /* Copy vectors to mask ROM indirect addr */
314   - adr r0, _start @ r0 <- current position of code
315   - add r0, r0, #4 @ skip reset vector
316   - mov r2, #64 @ r2 <- size to copy
317   - add r2, r0, r2 @ r2 <- source end address
318   - mov r1, #SRAM_OFFSET0 @ build vect addr
319   - mov r3, #SRAM_OFFSET1
320   - add r1, r1, r3
321   - mov r3, #SRAM_OFFSET2
322   - add r1, r1, r3
323   -next:
324   - ldmia r0!, {r3 - r10} @ copy from source address [r0]
325   - stmia r1!, {r3 - r10} @ copy to target address [r1]
326   - cmp r0, r2 @ until source end address [r2]
327   - bne next @ loop until equal */
328   -#if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_ONENAND_BOOT)
329   - /* No need to copy/exec the clock code - DPLL adjust already done
330   - * in NAND/oneNAND Boot.
331   - */
332   - bl cpy_clk_code @ put dpll adjust code behind vectors
333   -#endif /* NAND Boot */
334   -#endif
335   - /* the mask ROM code should have PLL and others stable */
336   -#ifndef CONFIG_SKIP_LOWLEVEL_INIT
337   - bl cpu_init_crit
338   -#endif
339   -
340   -#ifndef CONFIG_SKIP_RELOCATE_UBOOT
341   -relocate: @ relocate U-Boot to RAM
342   - adr r0, _start @ r0 <- current position of code
343   - ldr r1, _TEXT_BASE @ test if we run from flash or RAM
344   - cmp r0, r1 @ don't reloc during debug
345   - beq stack_setup
346   -
347   - ldr r2, _armboot_start
348   - ldr r3, _bss_start
349   - sub r2, r3, r2 @ r2 <- size of armboot
350   - add r2, r0, r2 @ r2 <- source end address
351   -
352   -copy_loop: @ copy 32 bytes at a time
353   - ldmia r0!, {r3 - r10} @ copy from source address [r0]
354   - stmia r1!, {r3 - r10} @ copy to target address [r1]
355   - cmp r0, r2 @ until source end address [r2]
356   - blo copy_loop
357   -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
358   -
359   - /* Set up the stack */
360   -stack_setup:
361   - ldr r0, _TEXT_BASE @ upper 128 KiB: relocated uboot
362   - sub r0, r0, #CONFIG_SYS_MALLOC_LEN @ malloc area
363   - sub r0, r0, #GENERATED_GBL_DATA_SIZE @ bdinfo
364   -#ifdef CONFIG_USE_IRQ
365   - sub r0, r0, #(CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ)
366   -#endif
367   - sub sp, r0, #12 @ leave 3 words for abort-stack
368   - bic sp, sp, #7 @ 8-byte alignment for ABI compliance
369   -
370   - /* Clear BSS (if any). Is below tx (watch load addr - need space) */
371   -clear_bss:
372   - ldr r0, _bss_start @ find start of bss segment
373   - ldr r1, _bss_end @ stop here
374   - mov r2, #0x00000000 @ clear value
375   -clbss_l:
376   - str r2, [r0] @ clear BSS location
377   - cmp r0, r1 @ are we at the end yet
378   - add r0, r0, #4 @ increment clear index pointer
379   - bne clbss_l @ keep clearing till at end
380   -
381   - ldr pc, _start_armboot @ jump to C code
382   -
383   -_start_armboot: .word start_armboot
384   -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
385   -
386 291 /*************************************************************************
387 292 *
388 293 * CPU_init_critical registers
389 294  
... ... @@ -464,14 +369,8 @@
464 369 @ user stack
465 370 stmia sp, {r0 - r12} @ Save user registers (now in
466 371 @ svc mode) r0-r12
467   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
468   - ldr r2, _armboot_start
469   - sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
470   - sub r2, r2, #(GENERATED_GBL_DATA_SIZE + 8) @ set base 2 words into abort
471   -#else
472 372 ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort
473 373 @ stack
474   -#endif
475 374 ldmia r2, {r2 - r3} @ get values for "aborted" pc
476 375 @ and cpsr (into parm regs)
477 376 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
478 377  
... ... @@ -507,14 +406,8 @@
507 406 .endm
508 407  
509 408 .macro get_bad_stack
510   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
511   - ldr r13, _armboot_start @ setup our mode stack (enter
512   - sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
513   - sub r13, r13, #(GENERATED_GBL_DATA_SIZE + 8) @ move to reserved a couple
514   -#else
515 409 ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter
516 410 @ in banked mode)
517   -#endif
518 411  
519 412 str lr, [r13] @ save caller lr in position 0
520 413 @ of saved stack
521 414  
... ... @@ -535,14 +428,8 @@
535 428 sub r13, r13, #4 @ space on current stack for
536 429 @ scratch reg.
537 430 str r0, [r13] @ save R0's value.
538   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
539   - ldr r0, _armboot_start @ get data regions start
540   - sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
541   - sub r0, r0, #(GENERATED_GBL_DATA_SIZE + 8) @ move past gbl and a couple
542   -#else
543 431 ldr r0, IRQ_STACK_START_IN @ get data regions start
544 432 @ spots for abort stack
545   -#endif
546 433 str lr, [r0] @ save caller lr in position 0
547 434 @ of saved stack
548 435 mrs r0, spsr @ get the spsr
arch/arm/cpu/ixp/start.S
Diff comments   View file @ a9aa392
... ... @@ -98,12 +98,6 @@
98 98 _TEXT_BASE:
99 99 .word CONFIG_SYS_TEXT_BASE
100 100  
101   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
102   -.globl _armboot_start
103   -_armboot_start:
104   - .word _start
105   -#endif
106   -
107 101 /*
108 102 * These are defined in the board-specific linker script.
109 103 */
... ... @@ -127,7 +121,6 @@
127 121 .word 0x0badc0de
128 122 #endif
129 123  
130   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
131 124 /* IRQ stack memory (calculated at run-time) + 8 bytes */
132 125 .globl IRQ_STACK_START_IN
133 126 IRQ_STACK_START_IN:
134 127  
... ... @@ -394,191 +387,7 @@
394 387  
395 388 _board_init_r: .word board_init_r
396 389  
397   -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
398   -/****************************************************************************/
399   -/* */
400   -/* the actual reset code */
401   -/* */
402   -/****************************************************************************/
403 390  
404   -reset:
405   - /* disable mmu, set big-endian */
406   - mov r0, #0xf8
407   - mcr p15, 0, r0, c1, c0, 0
408   - CPWAIT r0
409   -
410   - /* invalidate I & D caches & BTB */
411   - mcr p15, 0, r0, c7, c7, 0
412   - CPWAIT r0
413   -
414   - /* invalidate I & Data TLB */
415   - mcr p15, 0, r0, c8, c7, 0
416   - CPWAIT r0
417   -
418   - /* drain write and fill buffers */
419   - mcr p15, 0, r0, c7, c10, 4
420   - CPWAIT r0
421   -
422   - /* disable write buffer coalescing */
423   - mrc p15, 0, r0, c1, c0, 1
424   - orr r0, r0, #1
425   - mcr p15, 0, r0, c1, c0, 1
426   - CPWAIT r0
427   -
428   - /* set EXP CS0 to the optimum timing */
429   - ldr r1, =CONFIG_SYS_EXP_CS0
430   - ldr r2, =IXP425_EXP_CS0
431   - str r1, [r2]
432   -
433   - /* make sure flash is visible at 0 */
434   -#if 0
435   - ldr r2, =IXP425_EXP_CFG0
436   - ldr r1, [r2]
437   - orr r1, r1, #0x80000000
438   - str r1, [r2]
439   -#endif
440   - mov r1, #CONFIG_SYS_SDR_CONFIG
441   - ldr r2, =IXP425_SDR_CONFIG
442   - str r1, [r2]
443   -
444   - /* disable refresh cycles */
445   - mov r1, #0
446   - ldr r3, =IXP425_SDR_REFRESH
447   - str r1, [r3]
448   -
449   - /* send nop command */
450   - mov r1, #3
451   - ldr r4, =IXP425_SDR_IR
452   - str r1, [r4]
453   - DELAY_FOR 0x4000, r0
454   -
455   - /* set SDRAM internal refresh val */
456   - ldr r1, =CONFIG_SYS_SDRAM_REFRESH_CNT
457   - str r1, [r3]
458   - DELAY_FOR 0x4000, r0
459   -
460   - /* send precharge-all command to close all open banks */
461   - mov r1, #2
462   - str r1, [r4]
463   - DELAY_FOR 0x4000, r0
464   -
465   - /* provide 8 auto-refresh cycles */
466   - mov r1, #4
467   - mov r5, #8
468   -111: str r1, [r4]
469   - DELAY_FOR 0x100, r0
470   - subs r5, r5, #1
471   - bne 111b
472   -
473   - /* set mode register in sdram */
474   - mov r1, #CONFIG_SYS_SDR_MODE_CONFIG
475   - str r1, [r4]
476   - DELAY_FOR 0x4000, r0
477   -
478   - /* send normal operation command */
479   - mov r1, #6
480   - str r1, [r4]
481   - DELAY_FOR 0x4000, r0
482   -
483   - /* copy */
484   - mov r0, #0
485   - mov r4, r0
486   - add r2, r0, #CONFIG_SYS_MONITOR_LEN
487   - mov r1, #0x10000000
488   - mov r5, r1
489   -
490   - 30:
491   - ldr r3, [r0], #4
492   - str r3, [r1], #4
493   - cmp r0, r2
494   - bne 30b
495   -
496   - /* invalidate I & D caches & BTB */
497   - mcr p15, 0, r0, c7, c7, 0
498   - CPWAIT r0
499   -
500   - /* invalidate I & Data TLB */
501   - mcr p15, 0, r0, c8, c7, 0
502   - CPWAIT r0
503   -
504   - /* drain write and fill buffers */
505   - mcr p15, 0, r0, c7, c10, 4
506   - CPWAIT r0
507   -
508   - /* move flash to 0x50000000 */
509   - ldr r2, =IXP425_EXP_CFG0
510   - ldr r1, [r2]
511   - bic r1, r1, #0x80000000
512   - str r1, [r2]
513   -
514   - nop
515   - nop
516   - nop
517   - nop
518   - nop
519   - nop
520   -
521   - /* invalidate I & Data TLB */
522   - mcr p15, 0, r0, c8, c7, 0
523   - CPWAIT r0
524   -
525   - /* enable I cache */
526   - mrc p15, 0, r0, c1, c0, 0
527   - orr r0, r0, #MMU_Control_I
528   - mcr p15, 0, r0, c1, c0, 0
529   - CPWAIT r0
530   -
531   - mrs r0,cpsr /* set the cpu to SVC32 mode */
532   - bic r0,r0,#0x1f /* (superviser mode, M=10011) */
533   - orr r0,r0,#0x13
534   - msr cpsr,r0
535   -
536   -#ifndef CONFIG_SKIP_RELOCATE_UBOOT
537   -relocate: /* relocate U-Boot to RAM */
538   - adr r0, _start /* r0 <- current position of code */
539   - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
540   - cmp r0, r1 /* don't reloc during debug */
541   - beq stack_setup
542   -
543   - ldr r2, _armboot_start
544   - ldr r3, _bss_start
545   - sub r2, r3, r2 /* r2 <- size of armboot */
546   - add r2, r0, r2 /* r2 <- source end address */
547   -
548   -copy_loop:
549   - ldmia r0!, {r3-r10} /* copy from source address [r0] */
550   - stmia r1!, {r3-r10} /* copy to target address [r1] */
551   - cmp r0, r2 /* until source end address [r2] */
552   - blo copy_loop
553   -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
554   -
555   - /* Set up the stack */
556   -stack_setup:
557   - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
558   - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
559   - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
560   -#ifdef CONFIG_USE_IRQ
561   - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
562   -#endif
563   - sub sp, r0, #12 /* leave 3 words for abort-stack */
564   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
565   -
566   -clear_bss:
567   - ldr r0, _bss_start /* find start of bss segment */
568   - ldr r1, _bss_end /* stop here */
569   - mov r2, #0x00000000 /* clear */
570   -
571   -clbss_l:str r2, [r0] /* clear loop... */
572   - add r0, r0, #4
573   - cmp r0, r1
574   - blo clbss_l
575   -
576   - ldr pc, _start_armboot
577   -
578   -_start_armboot: .word start_armboot
579   -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
580   -
581   -
582 391 /****************************************************************************/
583 392 /* */
584 393 /* Interrupt handling */
585 394  
... ... @@ -618,13 +427,7 @@
618 427 stmia sp, {r0 - r12} /* Calling r0-r12 */
619 428 add r8, sp, #S_PC
620 429  
621   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
622   - ldr r2, _armboot_start
623   - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
624   - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
625   -#else
626 430 ldr r2, IRQ_STACK_START_IN
627   -#endif
628 431 ldmia r2, {r2 - r4} /* get pc, cpsr, old_r0 */
629 432 add r0, sp, #S_FRAME_SIZE /* restore sp_SVC */
630 433  
631 434  
... ... @@ -659,13 +462,7 @@
659 462 .endm
660 463  
661 464 .macro get_bad_stack
662   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
663   - ldr r13, _armboot_start @ setup our mode stack
664   - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
665   - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
666   -#else
667 465 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
668   -#endif
669 466  
670 467 str lr, [r13] @ save caller lr / spsr
671 468 mrs lr, spsr
arch/arm/cpu/lh7a40x/start.S
Diff comments   View file @ a9aa392
... ... @@ -75,12 +75,6 @@
75 75 _TEXT_BASE:
76 76 .word CONFIG_SYS_TEXT_BASE
77 77  
78   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
79   -.globl _armboot_start
80   -_armboot_start:
81   - .word _start
82   -#endif
83   -
84 78 /*
85 79 * These are defined in the board-specific linker script.
86 80 */
... ... @@ -104,7 +98,6 @@
104 98 .word 0x0badc0de
105 99 #endif
106 100  
107   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
108 101 /* IRQ stack memory (calculated at run-time) + 8 bytes */
109 102 .globl IRQ_STACK_START_IN
110 103 IRQ_STACK_START_IN:
111 104  
... ... @@ -278,101 +271,7 @@
278 271  
279 272 _board_init_r: .word board_init_r
280 273  
281   -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
282 274 /*
283   - * the actual reset code
284   - */
285   -
286   -reset:
287   - /*
288   - * set the cpu to SVC32 mode
289   - */
290   - mrs r0,cpsr
291   - bic r0,r0,#0x1f
292   - orr r0,r0,#0xd3
293   - msr cpsr,r0
294   -
295   -#define pWDTCTL 0x80001400 /* Watchdog Timer control register */
296   -#define pINTENC 0x8000050C /* Interupt-Controller enable clear register */
297   -#define pCLKSET 0x80000420 /* clock divisor register */
298   -
299   - /* disable watchdog, set watchdog control register to
300   - * all zeros (default reset)
301   - */
302   - ldr r0, =pWDTCTL
303   - mov r1, #0x0
304   - str r1, [r0]
305   -
306   - /*
307   - * mask all IRQs by setting all bits in the INTENC register (default)
308   - */
309   - mov r1, #0xffffffff
310   - ldr r0, =pINTENC
311   - str r1, [r0]
312   -
313   - /* FCLK:HCLK:PCLK = 1:2:2 */
314   - /* default FCLK is 200 MHz, using 14.7456 MHz fin */
315   - ldr r0, =pCLKSET
316   - ldr r1, =0x0004ee39
317   -@ ldr r1, =0x0005ee39 @ 1: 2: 4
318   - str r1, [r0]
319   -
320   - /*
321   - * we do sys-critical inits only at reboot,
322   - * not when booting from ram!
323   - */
324   -#ifndef CONFIG_SKIP_LOWLEVEL_INIT
325   - bl cpu_init_crit
326   -#endif
327   -
328   -#ifndef CONFIG_SKIP_RELOCATE_UBOOT
329   -relocate: /* relocate U-Boot to RAM */
330   - adr r0, _start /* r0 <- current position of code */
331   - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
332   - cmp r0, r1 /* don't reloc during debug */
333   - beq stack_setup
334   -
335   - ldr r2, _armboot_start
336   - ldr r3, _bss_start
337   - sub r2, r3, r2 /* r2 <- size of armboot */
338   - add r2, r0, r2 /* r2 <- source end address */
339   -
340   -copy_loop:
341   - ldmia r0!, {r3-r10} /* copy from source address [r0] */
342   - stmia r1!, {r3-r10} /* copy to target address [r1] */
343   - cmp r0, r2 /* until source end address [r2] */
344   - blo copy_loop
345   -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
346   -
347   - /* Set up the stack */
348   -stack_setup:
349   - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
350   - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
351   - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
352   -#ifdef CONFIG_USE_IRQ
353   - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
354   -#endif
355   - sub sp, r0, #12 /* leave 3 words for abort-stack */
356   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
357   -
358   -clear_bss:
359   - ldr r0, _bss_start /* find start of bss segment */
360   - @add r0, r0, #4 /* start at first byte of bss */
361   - /* why inc. 4 bytes past then? */
362   - ldr r1, _bss_end /* stop here */
363   - mov r2, #0x00000000 /* clear */
364   -
365   -clbss_l:str r2, [r0] /* clear loop... */
366   - add r0, r0, #4
367   - cmp r0, r1
368   - blo clbss_l
369   -
370   - ldr pc, _start_armboot
371   -
372   -_start_armboot: .word start_armboot
373   -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
374   -
375   -/*
376 275 *************************************************************************
377 276 *
378 277 * CPU_init_critical registers
379 278  
... ... @@ -460,13 +359,7 @@
460 359 .macro bad_save_user_regs
461 360 sub sp, sp, #S_FRAME_SIZE
462 361 stmia sp, {r0 - r12} @ Calling r0-r12
463   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
464   - ldr r2, _armboot_start
465   - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
466   - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
467   -#else
468 362 ldr r2, IRQ_STACK_START_IN
469   -#endif
470 363 ldmia r2, {r2 - r3} @ get pc, cpsr
471 364 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
472 365  
473 366  
... ... @@ -497,13 +390,7 @@
497 390 .endm
498 391  
499 392 .macro get_bad_stack
500   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
501   - ldr r13, _armboot_start @ setup our mode stack
502   - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
503   - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
504   -#else
505 393 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
506   -#endif
507 394  
508 395 str lr, [r13] @ save caller lr / spsr
509 396 mrs lr, spsr
arch/arm/cpu/pxa/start.S
Diff comments   View file @ a9aa392
... ... @@ -299,7 +299,7 @@
299 299 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
300 300 cmp r2, r3
301 301 blo fixloop
302   -#endif
  302 +#endif /* #ifndef CONFIG_PRELOADER */
303 303 #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
304 304  
305 305 clear_bss:
... ... @@ -316,7 +316,7 @@
316 316 add r0, r0, #4
317 317 cmp r0, r1
318 318 bne clbss_l
319   -#endif
  319 +#endif /* #ifndef CONFIG_PRELOADER */
320 320  
321 321 /*
322 322 * We are done. Do not return, instead branch to second part of board
... ... @@ -343,7 +343,7 @@
343 343  
344 344 _board_init_r_ofs:
345 345 .word board_init_r - _start
346   -#endif
  346 +#endif /* CONFIG_ONENAND_IPL */
347 347  
348 348 _rel_dyn_start_ofs:
349 349 .word __rel_dyn_start - _start
... ... @@ -352,7 +352,7 @@
352 352 _dynsym_start_ofs:
353 353 .word __dynsym_start - _start
354 354  
355   -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
  355 +#else /* CONFIG_PRELOADER */
356 356  
357 357 /****************************************************************************/
358 358 /* */
... ... @@ -377,7 +377,7 @@
377 377 /* Start OneNAND IPL */
378 378 ldr pc, =start_oneboot
379 379  
380   -#endif /* #if !defined(CONFIG_ONENAND_IPL) */
  380 +#endif /* CONFIG_PRELOADER */
381 381  
382 382 #ifndef CONFIG_PRELOADER
383 383 /****************************************************************************/
384 384  
... ... @@ -419,13 +419,7 @@
419 419 stmia sp, {r0 - r12} /* Calling r0-r12 */
420 420 add r8, sp, #S_PC
421 421  
422   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
423   - ldr r2, _armboot_start
424   - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
425   - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
426   -#else
427 422 ldr r2, IRQ_STACK_START_IN
428   -#endif
429 423 ldmia r2, {r2 - r4} /* get pc, cpsr, old_r0 */
430 424 add r0, sp, #S_FRAME_SIZE /* restore sp_SVC */
431 425  
432 426  
... ... @@ -460,13 +454,7 @@
460 454 .endm
461 455  
462 456 .macro get_bad_stack
463   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
464   - ldr r13, _armboot_start @ setup our mode stack
465   - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
466   - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
467   -#else
468 457 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
469   -#endif
470 458  
471 459 str lr, [r13] @ save caller lr / spsr
472 460 mrs lr, spsr
... ... @@ -485,7 +473,7 @@
485 473 .macro get_fiq_stack @ setup FIQ stack
486 474 ldr sp, FIQ_STACK_START
487 475 .endm
488   -#endif /* CONFIG_PRELOADER */
  476 +#endif /* CONFIG_PRELOADER
489 477  
490 478  
491 479 /****************************************************************************/
... ... @@ -499,7 +487,7 @@
499 487 do_hang:
500 488 ldr sp, _TEXT_BASE /* use 32 words abort stack */
501 489 bl hang /* hang and never return */
502   -#else /* !CONFIG_PRELOADER */
  490 +#else
503 491 .align 5
504 492 undefined_instruction:
505 493 get_bad_stack
... ... @@ -618,5 +606,5 @@
618 606 .word (__base << 20) | 0xc12
619 607 .set __base, __base + 1
620 608 .endr
621   -#endif
  609 +#endif /* CONFIG_PRELOADER */
arch/arm/cpu/s3c44b0/start.S
Diff comments   View file @ a9aa392
... ... @@ -66,12 +66,6 @@
66 66 _TEXT_BASE:
67 67 .word CONFIG_SYS_TEXT_BASE
68 68  
69   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
70   -.globl _armboot_start
71   -_armboot_start:
72   - .word _start
73   -#endif
74   -
75 69 /*
76 70 * These are defined in the board-specific linker script.
77 71 */
... ... @@ -95,7 +89,6 @@
95 89 .word 0x0badc0de
96 90 #endif
97 91  
98   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
99 92 /* IRQ stack memory (calculated at run-time) + 8 bytes */
100 93 .globl IRQ_STACK_START_IN
101 94 IRQ_STACK_START_IN:
... ... @@ -264,84 +257,6 @@
264 257 mov pc, lr
265 258  
266 259 _board_init_r: .word board_init_r
267   -
268   -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
269   -/*
270   - * the actual reset code
271   - */
272   -
273   -reset:
274   - /*
275   - * set the cpu to SVC32 mode
276   - */
277   - mrs r0,cpsr
278   - bic r0,r0,#0x1f
279   - orr r0,r0,#0x13
280   - msr cpsr,r0
281   -
282   - /*
283   - * we do sys-critical inits only at reboot,
284   - * not when booting from ram!
285   - */
286   -
287   -#ifndef CONFIG_SKIP_LOWLEVEL_INIT
288   - bl cpu_init_crit
289   - /*
290   - * before relocating, we have to setup RAM timing
291   - * because memory timing is board-dependend, you will
292   - * find a lowlevel_init.S in your board directory.
293   - */
294   - bl lowlevel_init
295   -#endif
296   -
297   -#ifndef CONFIG_SKIP_RELOCATE_UBOOT
298   -relocate: /* relocate U-Boot to RAM */
299   - adr r0, _start /* r0 <- current position of code */
300   - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
301   - cmp r0, r1 /* don't reloc during debug */
302   - beq stack_setup
303   -
304   - ldr r2, _armboot_start
305   - ldr r3, _bss_start
306   - sub r2, r3, r2 /* r2 <- size of armboot */
307   - add r2, r0, r2 /* r2 <- source end address */
308   -
309   -copy_loop:
310   - ldmia r0!, {r3-r10} /* copy from source address [r0] */
311   - stmia r1!, {r3-r10} /* copy to target address [r1] */
312   - cmp r0, r2 /* until source end address [r2] */
313   - blo copy_loop
314   -
315   -/*
316   - now copy to sram the interrupt vector
317   -*/
318   - adr r0, real_vectors
319   - add r2, r0, #1024
320   - ldr r1, =0x0c000000
321   - add r1, r1, #0x08
322   -vector_copy_loop:
323   - ldmia r0!, {r3-r10}
324   - stmia r1!, {r3-r10}
325   - cmp r0, r2
326   - blo vector_copy_loop
327   -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
328   -
329   - /* Set up the stack */
330   -stack_setup:
331   - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
332   - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
333   - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
334   -#ifdef CONFIG_USE_IRQ
335   - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
336   -#endif
337   - sub sp, r0, #12 /* leave 3 words for abort-stack */
338   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
339   -
340   - ldr pc, _start_armboot
341   -
342   -_start_armboot: .word start_armboot
343   -
344   -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
345 260  
346 261 /*
347 262 *************************************************************************
arch/arm/cpu/sa1100/start.S
Diff comments   View file @ a9aa392
... ... @@ -76,12 +76,6 @@
76 76 _TEXT_BASE:
77 77 .word CONFIG_SYS_TEXT_BASE
78 78  
79   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
80   -.globl _armboot_start
81   -_armboot_start:
82   - .word _start
83   -#endif
84   -
85 79 /*
86 80 * These are defined in the board-specific linker script.
87 81 */
... ... @@ -105,7 +99,6 @@
105 99 .word 0x0badc0de
106 100 #endif
107 101  
108   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
109 102 /* IRQ stack memory (calculated at run-time) + 8 bytes */
110 103 .globl IRQ_STACK_START_IN
111 104 IRQ_STACK_START_IN:
112 105  
... ... @@ -254,76 +247,7 @@
254 247  
255 248 _board_init_r: .word board_init_r
256 249  
257   -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
258   -
259 250 /*
260   - * the actual reset code
261   - */
262   -
263   -reset:
264   - /*
265   - * set the cpu to SVC32 mode
266   - */
267   - mrs r0,cpsr
268   - bic r0,r0,#0x1f
269   - orr r0,r0,#0x13
270   - msr cpsr,r0
271   -
272   - /*
273   - * we do sys-critical inits only at reboot,
274   - * not when booting from ram!
275   - */
276   -#ifndef CONFIG_SKIP_LOWLEVEL_INIT
277   - bl cpu_init_crit
278   -#endif
279   -
280   -#ifndef CONFIG_SKIP_RELOCATE_UBOOT
281   -relocate: /* relocate U-Boot to RAM */
282   - adr r0, _start /* r0 <- current position of code */
283   - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
284   - cmp r0, r1 /* don't reloc during debug */
285   - beq stack_setup
286   -
287   - ldr r2, _armboot_start
288   - ldr r3, _bss_start
289   - sub r2, r3, r2 /* r2 <- size of armboot */
290   - add r2, r0, r2 /* r2 <- source end address */
291   -
292   -copy_loop:
293   - ldmia r0!, {r3-r10} /* copy from source address [r0] */
294   - stmia r1!, {r3-r10} /* copy to target address [r1] */
295   - cmp r0, r2 /* until source end address [r2] */
296   - blo copy_loop
297   -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
298   -
299   - /* Set up the stack */
300   -stack_setup:
301   - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
302   - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
303   - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
304   -#ifdef CONFIG_USE_IRQ
305   - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
306   -#endif
307   - sub sp, r0, #12 /* leave 3 words for abort-stack */
308   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
309   -
310   -clear_bss:
311   - ldr r0, _bss_start /* find start of bss segment */
312   - ldr r1, _bss_end /* stop here */
313   - mov r2, #0x00000000 /* clear */
314   -
315   -clbss_l:str r2, [r0] /* clear loop... */
316   - add r0, r0, #4
317   - cmp r0, r1
318   - blo clbss_l
319   -
320   - ldr pc, _start_armboot
321   -
322   -_start_armboot: .word start_armboot
323   -
324   -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
325   -
326   -/*
327 251 *************************************************************************
328 252 *
329 253 * CPU_init_critical registers
330 254  
... ... @@ -441,13 +365,7 @@
441 365 stmia sp, {r0 - r12} @ Calling r0-r12
442 366 add r8, sp, #S_PC
443 367  
444   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
445   - ldr r2, _armboot_start
446   - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
447   - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
448   -#else
449 368 ldr r2, IRQ_STACK_START_IN
450   -#endif
451 369 ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
452 370 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
453 371  
454 372  
... ... @@ -478,13 +396,7 @@
478 396 .endm
479 397  
480 398 .macro get_bad_stack
481   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
482   - ldr r13, _armboot_start @ setup our mode stack
483   - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
484   - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
485   -#else
486 399 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
487   -#endif
488 400  
489 401 str lr, [r13] @ save caller lr / spsr
490 402 mrs lr, spsr
arch/arm/include/asm/global_data.h
Diff comments   View file @ a9aa392
... ... @@ -61,7 +61,6 @@
61 61 unsigned long tbu;
62 62 unsigned long long timer_reset_value;
63 63 #endif
64   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
65 64 unsigned long relocaddr; /* Start address of U-Boot in RAM */
66 65 phys_size_t ram_size; /* RAM size */
67 66 unsigned long mon_len; /* monitor len */
... ... @@ -70,7 +69,6 @@
70 69 unsigned long reloc_off;
71 70 #if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
72 71 unsigned long tlb_addr;
73   -#endif
74 72 #endif
75 73 void **jt; /* jump table */
76 74 char env_buf[32]; /* buffer for getenv() before reloc. */
arch/arm/include/asm/u-boot-arm.h
Diff comments   View file @ a9aa392
... ... @@ -34,16 +34,12 @@
34 34 extern ulong _bss_end_ofs; /* BSS end relative to _start */
35 35 extern ulong IRQ_STACK_START; /* top of IRQ stack */
36 36 extern ulong FIQ_STACK_START; /* top of FIQ stack */
37   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
38   -extern ulong _armboot_start_ofs; /* code start */
39   -#else
40 37 extern ulong _TEXT_BASE; /* code start */
41 38 extern ulong _datarel_start_ofs;
42 39 extern ulong _datarelrolocal_start_ofs;
43 40 extern ulong _datarellocal_start_ofs;
44 41 extern ulong _datarelro_start_ofs;
45 42 extern ulong IRQ_STACK_START_IN; /* 8 bytes in IRQ stack */
46   -#endif
47 43  
48 44 /* cpu/.../cpu.c */
49 45 int cpu_init(void);
50 46  
... ... @@ -56,9 +52,7 @@
56 52 /* board/.../... */
57 53 int board_init(void);
58 54 int dram_init (void);
59   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
60 55 void dram_init_banksize (void);
61   -#endif
62 56 void setup_serial_tag (struct tag **params);
63 57 void setup_revision_tag (struct tag **params);
64 58  
arch/arm/lib/board.c
Diff comments   View file @ a9aa392
... ... @@ -127,11 +127,7 @@
127 127 char tmp[64]; /* long enough for environment variables */
128 128 int i = getenv_f("baudrate", tmp, sizeof (tmp));
129 129  
130   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
131 130 gd->baudrate = (i > 0)
132   -#else
133   - gd->bd->bi_baudrate = gd->baudrate = (i > 0)
134   -#endif
135 131 ? (int) simple_strtoul (tmp, NULL, 10)
136 132 : CONFIG_BAUDRATE;
137 133  
138 134  
... ... @@ -142,11 +138,7 @@
142 138 {
143 139 printf ("\n\n%s\n\n", version_string);
144 140 debug ("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
145   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
146 141 _TEXT_BASE,
147   -#else
148   - _armboot_start,
149   -#endif
150 142 _bss_start_ofs+_TEXT_BASE, _bss_end_ofs+_TEXT_BASE);
151 143 #ifdef CONFIG_MODEM_SUPPORT
152 144 debug ("Modem Support enabled\n");
... ... @@ -190,16 +182,6 @@
190 182 return (0);
191 183 }
192 184  
193   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
194   -#ifndef CONFIG_SYS_NO_FLASH
195   -static void display_flash_config (ulong size)
196   -{
197   - puts ("Flash: ");
198   - print_size (size, "\n");
199   -}
200   -#endif /* CONFIG_SYS_NO_FLASH */
201   -#endif
202   -
203 185 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
204 186 static int init_func_i2c (void)
205 187 {
... ... @@ -246,214 +228,6 @@
246 228  
247 229 int print_cpuinfo (void);
248 230  
249   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
250   -init_fnc_t *init_sequence[] = {
251   -#if defined(CONFIG_ARCH_CPU_INIT)
252   - arch_cpu_init, /* basic arch cpu dependent setup */
253   -#endif
254   - board_init, /* basic board dependent setup */
255   -#if defined(CONFIG_USE_IRQ)
256   - interrupt_init, /* set up exceptions */
257   -#endif
258   - timer_init, /* initialize timer */
259   -#ifdef CONFIG_FSL_ESDHC
260   - get_clocks,
261   -#endif
262   - env_init, /* initialize environment */
263   - init_baudrate, /* initialze baudrate settings */
264   - serial_init, /* serial communications setup */
265   - console_init_f, /* stage 1 init of console */
266   - display_banner, /* say that we are here */
267   -#if defined(CONFIG_DISPLAY_CPUINFO)
268   - print_cpuinfo, /* display cpu info (and speed) */
269   -#endif
270   -#if defined(CONFIG_DISPLAY_BOARDINFO)
271   - checkboard, /* display board info */
272   -#endif
273   -#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
274   - init_func_i2c,
275   -#endif
276   - dram_init, /* configure available RAM banks */
277   -#if defined(CONFIG_CMD_PCI) || defined (CONFIG_PCI)
278   - arm_pci_init,
279   -#endif
280   - display_dram_config,
281   - NULL,
282   -};
283   -
284   -void start_armboot (void)
285   -{
286   - init_fnc_t **init_fnc_ptr;
287   - char *s;
288   -#if defined(CONFIG_VFD) || defined(CONFIG_LCD)
289   - unsigned long addr;
290   -#endif
291   -
292   - /* Pointer is writable since we allocated a register for it */
293   - gd = (gd_t*)(_armboot_start - CONFIG_SYS_MALLOC_LEN - sizeof(gd_t));
294   - /* compiler optimization barrier needed for GCC >= 3.4 */
295   - __asm__ __volatile__("": : :"memory");
296   -
297   - memset ((void*)gd, 0, sizeof (gd_t));
298   - gd->bd = (bd_t*)((char*)gd - sizeof(bd_t));
299   - memset (gd->bd, 0, sizeof (bd_t));
300   -
301   - gd->flags |= GD_FLG_RELOC;
302   -
303   - monitor_flash_len = _bss_start - _armboot_start;
304   -
305   - for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
306   - if ((*init_fnc_ptr)() != 0) {
307   - hang ();
308   - }
309   - }
310   -
311   - /* armboot_start is defined in the board-specific linker script */
312   - mem_malloc_init (_armboot_start - CONFIG_SYS_MALLOC_LEN,
313   - CONFIG_SYS_MALLOC_LEN);
314   -
315   -#ifndef CONFIG_SYS_NO_FLASH
316   - /* configure available FLASH banks */
317   - display_flash_config (flash_init ());
318   -#endif /* CONFIG_SYS_NO_FLASH */
319   -
320   -#ifdef CONFIG_VFD
321   -# ifndef PAGE_SIZE
322   -# define PAGE_SIZE 4096
323   -# endif
324   - /*
325   - * reserve memory for VFD display (always full pages)
326   - */
327   - /* bss_end is defined in the board-specific linker script */
328   - addr = (_bss_end + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
329   - vfd_setmem (addr);
330   - gd->fb_base = addr;
331   -#endif /* CONFIG_VFD */
332   -
333   -#ifdef CONFIG_LCD
334   - /* board init may have inited fb_base */
335   - if (!gd->fb_base) {
336   -# ifndef PAGE_SIZE
337   -# define PAGE_SIZE 4096
338   -# endif
339   - /*
340   - * reserve memory for LCD display (always full pages)
341   - */
342   - /* bss_end is defined in the board-specific linker script */
343   - addr = (_bss_end + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
344   - lcd_setmem (addr);
345   - gd->fb_base = addr;
346   - }
347   -#endif /* CONFIG_LCD */
348   -
349   -#if defined(CONFIG_CMD_NAND)
350   - puts ("NAND: ");
351   - nand_init(); /* go init the NAND */
352   -#endif
353   -
354   -#if defined(CONFIG_CMD_ONENAND)
355   - onenand_init();
356   -#endif
357   -
358   -#ifdef CONFIG_HAS_DATAFLASH
359   - AT91F_DataflashInit();
360   - dataflash_print_info();
361   -#endif
362   -
363   -#ifdef CONFIG_GENERIC_MMC
364   -/*
365   - * MMC initialization is called before relocating env.
366   - * Thus It is required that operations like pin multiplexer
367   - * be put in board_init.
368   - */
369   - puts ("MMC: ");
370   - mmc_initialize (gd->bd);
371   -#endif
372   -
373   - /* initialize environment */
374   - env_relocate ();
375   -
376   -#ifdef CONFIG_VFD
377   - /* must do this after the framebuffer is allocated */
378   - drv_vfd_init();
379   -#endif /* CONFIG_VFD */
380   -
381   -#ifdef CONFIG_SERIAL_MULTI
382   - serial_initialize();
383   -#endif
384   -
385   - /* IP Address */
386   - gd->bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
387   -
388   - stdio_init (); /* get the devices list going. */
389   -
390   - jumptable_init ();
391   -
392   -#if defined(CONFIG_API)
393   - /* Initialize API */
394   - api_init ();
395   -#endif
396   -
397   - console_init_r (); /* fully init console as a device */
398   -
399   -#if defined(CONFIG_ARCH_MISC_INIT)
400   - /* miscellaneous arch dependent initialisations */
401   - arch_misc_init ();
402   -#endif
403   -#if defined(CONFIG_MISC_INIT_R)
404   - /* miscellaneous platform dependent initialisations */
405   - misc_init_r ();
406   -#endif
407   -
408   - /* enable exceptions */
409   - enable_interrupts ();
410   -
411   - /* Perform network card initialisation if necessary */
412   -
413   -#if defined(CONFIG_DRIVER_SMC91111) || defined (CONFIG_DRIVER_LAN91C96)
414   - /* XXX: this needs to be moved to board init */
415   - if (getenv ("ethaddr")) {
416   - uchar enetaddr[6];
417   - eth_getenv_enetaddr("ethaddr", enetaddr);
418   - smc_set_mac_addr(enetaddr);
419   - }
420   -#endif /* CONFIG_DRIVER_SMC91111 || CONFIG_DRIVER_LAN91C96 */
421   -
422   - /* Initialize from environment */
423   - if ((s = getenv ("loadaddr")) != NULL) {
424   - load_addr = simple_strtoul (s, NULL, 16);
425   - }
426   -#if defined(CONFIG_CMD_NET)
427   - if ((s = getenv ("bootfile")) != NULL) {
428   - copy_filename (BootFile, s, sizeof (BootFile));
429   - }
430   -#endif
431   -
432   -#ifdef BOARD_LATE_INIT
433   - board_late_init ();
434   -#endif
435   -
436   -#ifdef CONFIG_BITBANGMII
437   - bb_miiphy_init();
438   -#endif
439   -#if defined(CONFIG_CMD_NET)
440   -#if defined(CONFIG_NET_MULTI)
441   - puts ("Net: ");
442   -#endif
443   - eth_initialize(gd->bd);
444   -#if defined(CONFIG_RESET_PHY_R)
445   - debug ("Reset Ethernet PHY\n");
446   - reset_phy();
447   -#endif
448   -#endif
449   - /* main_loop() can return to retry autoboot, if so just run it again. */
450   - for (;;) {
451   - main_loop ();
452   - }
453   -
454   - /* NOTREACHED - no way out of command loop except booting */
455   -}
456   -#else
457 231 void __dram_init_banksize(void)
458 232 {
459 233 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
... ... @@ -867,8 +641,6 @@
867 641  
868 642 /* NOTREACHED - no way out of command loop except booting */
869 643 }
870   -
871   -#endif /* defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
872 644  
873 645 void hang (void)
874 646 {
arch/arm/lib/cache-cp15.c
Diff comments   View file @ a9aa392
... ... @@ -44,7 +44,6 @@
44 44 asm volatile("" : : : "memory");
45 45 }
46 46  
47   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
48 47 static inline void dram_bank_mmu_setup(int bank)
49 48 {
50 49 u32 *page_table = (u32 *)gd->tlb_addr;
51 50  
52 51  
... ... @@ -58,18 +57,11 @@
58 57 page_table[i] = i << 20 | (3 << 10) | CACHE_SETUP;
59 58 }
60 59 }
61   -#endif
62 60  
63 61 /* to activate the MMU we need to set up virtual memory: use 1M areas */
64 62 static inline void mmu_setup(void)
65 63 {
66   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
67 64 u32 *page_table = (u32 *)gd->tlb_addr;
68   -#else
69   - static u32 __attribute__((aligned(16384))) page_table[4096];
70   - bd_t *bd = gd->bd;
71   - int j;
72   -#endif
73 65 int i;
74 66 u32 reg;
75 67  
76 68  
... ... @@ -77,20 +69,9 @@
77 69 for (i = 0; i < 4096; i++)
78 70 page_table[i] = i << 20 | (3 << 10) | 0x12;
79 71  
80   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
81 72 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
82 73 dram_bank_mmu_setup(i);
83 74 }
84   -#else
85   - /* Then, enable cacheable and bufferable for RAM only */
86   - for (j = 0; j < CONFIG_NR_DRAM_BANKS; j++) {
87   - for (i = bd->bi_dram[j].start >> 20;
88   - i < (bd->bi_dram[j].start + bd->bi_dram[j].size) >> 20;
89   - i++) {
90   - page_table[i] = i << 20 | (3 << 10) | CACHE_SETUP;
91   - }
92   - }
93   -#endif
94 75  
95 76 /* Copy the page table address to cp15 */
96 77 asm volatile("mcr p15, 0, %0, c2, c0, 0"
arch/arm/lib/interrupts.c
Diff comments   View file @ a9aa392
... ... @@ -46,12 +46,8 @@
46 46 /*
47 47 * setup up stacks if necessary
48 48 */
49   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
50 49 IRQ_STACK_START = gd->irq_sp - 4;
51 50 IRQ_STACK_START_IN = gd->irq_sp + 8;
52   -#else
53   - IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - GENERATED_GBL_DATA_SIZE - 4;
54   -#endif
55 51 FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
56 52  
57 53 return arch_interrupt_init();
... ... @@ -86,7 +82,6 @@
86 82 return (old & 0x80) == 0;
87 83 }
88 84 #else
89   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
90 85 int interrupt_init (void)
91 86 {
92 87 /*
... ... @@ -96,7 +91,6 @@
96 91  
97 92 return 0;
98 93 }
99   -#endif
100 94  
101 95 void enable_interrupts (void)
102 96 {
board/davinci/common/misc.c
Diff comments   View file @ a9aa392
... ... @@ -33,17 +33,8 @@
33 33  
34 34 DECLARE_GLOBAL_DATA_PTR;
35 35  
36   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
37 36 int dram_init(void)
38 37 {
39   - gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
40   - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
41   -
42   - return(0);
43   -}
44   -#else
45   -int dram_init(void)
46   -{
47 38 /* dram_init must store complete ramsize in gd->ram_size */
48 39 gd->ram_size = get_ram_size(
49 40 (volatile void *)CONFIG_SYS_SDRAM_BASE,
... ... @@ -56,7 +47,6 @@
56 47 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
57 48 gd->bd->bi_dram[0].size = gd->ram_size;
58 49 }
59   -#endif
60 50  
61 51 #ifdef CONFIG_DRIVER_TI_EMAC
62 52  
board/keymile/km_arm/km_arm.c
Diff comments   View file @ a9aa392
... ... @@ -225,22 +225,8 @@
225 225 );
226 226 #endif
227 227  
228   -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
229 228 int dram_init(void)
230 229 {
231   - int i;
232   -
233   - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
234   - gd->bd->bi_dram[i].start = kw_sdram_bar(i);
235   - gd->bd->bi_dram[i].size = get_ram_size((long *)kw_sdram_bar(i),
236   - kw_sdram_bs(i));
237   - }
238   -
239   - return 0;
240   -}
241   -#else
242   -int dram_init(void)
243   -{
244 230 /* dram_init must store complete ramsize in gd->ram_size */
245 231 /* Fix this */
246 232 gd->ram_size = get_ram_size((volatile void *)kw_sdram_bar(0),
... ... @@ -259,7 +245,6 @@
259 245 kw_sdram_bs(i));
260 246 }
261 247 }
262   -#endif
263 248  
264 249 /* Configure and enable MV88E1118 PHY */
265 250 void reset_phy(void)
board/ttcontrol/vision2/vision2.c
Diff comments   View file @ a9aa392
... ... @@ -160,19 +160,8 @@
160 160  
161 161 int dram_init(void)
162 162 {
163   -#ifdef CONFIG_SYS_ARM_WITHOUT_RELOC
164   - gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
165   - gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
166   - PHYS_SDRAM_1_SIZE);
167   -#if (CONFIG_NR_DRAM_BANKS > 1)
168   - gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
169   - gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2,
170   - PHYS_SDRAM_2_SIZE);
171   -#endif
172   -#else
173 163 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1,
174 164 PHYS_SDRAM_1_SIZE);
175   -#endif
176 165  
177 166 return 0;
178 167 }
... ... @@ -682,9 +671,6 @@
682 671  
683 672 int board_init(void)
684 673 {
685   -#ifdef CONFIG_SYS_ARM_WITHOUT_RELOC
686   - board_early_init_f();
687   -#endif
688 674 gd->bd->bi_arch_number = MACH_TYPE_TTC_VISION2; /* board id for linux */
689 675 /* address of boot parameters */
690 676 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
... ... @@ -343,7 +343,6 @@
343 343 printf ("ip_addr = %pI4\n", &bd->bi_ip_addr);
344 344 #endif
345 345 printf ("baudrate = %d bps\n", bd->bi_baudrate);
346   -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
347 346 #if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
348 347 print_num ("TLB addr", gd->tlb_addr);
349 348 #endif
... ... @@ -352,7 +351,6 @@
352 351 print_num ("irq_sp", gd->irq_sp); /* irq stack pointer */
353 352 print_num ("sp start ", gd->start_addr_sp);
354 353 print_num ("FB base ", gd->fb_base);
355   -#endif
356 354 return 0;
357 355 }
358 356  
doc/README.arm-relocation
Diff comments   View file @ a9aa392
... ... @@ -34,16 +34,9 @@
34 34  
35 35 Board.c code is adapted from ppc code
36 36  
37   -At config level:
38   -
39   - Undefine CONFIG_SYS_ARM_WITHOUT_RELOC
40   -
41 37 * WARNING ** WARNING ** WARNING ** WARNING ** WARNING ** WARNING ** WARNING *
42 38  
43 39 Boards which are not fixed to support relocation will be REMOVED!
44   -
45   -Eventually, CONFIG_SYS_ARM_WITHOUT_RELOC will disappear and boards
46   -which have to migrated to relocation will disappear too.
47 40  
48 41 -----------------------------------------------------------------------------
49 42  
doc/feature-removal-schedule.txt
Diff comments   View file @ a9aa392
... ... @@ -6,33 +6,6 @@
6 6 file.
7 7  
8 8 ---------------------------
9   -What: CONFIG_SYS_ARM_WITHOUT_RELOC option
10   -When: After Release 2011.03
11   -
12   -Why: The implementation of U-Boot for the ARM architecture has
13   - been reworked to support relocation. This allows to
14   - efficiently use the same U-Boot binary image on systems with
15   - different RAM sizes, and brings the implementation much more
16   - in line with the code used for example on Power Architecture
17   - systems (eventually allowing to merge into common code). This
18   - seems especailly interesting now that ARM is getting Device
19   - Tree support as well.
20   -
21   - All ARM boards need to be adapted to this new code, which
22   - requires testing on the actual hardware, so this is a task
23   - for the respective board maintainers or other users.
24   -
25   - Please see the commit message of commit f1d2b31 for details:
26   -
27   - http://git.denx.de/?p=u-boot.git;a=commit;h=f1d2b31
28   -
29   - Support for CONFIG_SYS_ARM_WITHOUT_RELOC will be removed
30   - after release v2011.03; all boards that have not been
31   - converted by then, i. e. that are still broken then, are
32   - considered unmaintained and without interest for the
33   - community and will be removed as well.
34   -
35   ----------------------------
36 9  
37 10 What: CONFIG_NET_MULTI option
38 11 When: Release 2009-11
include/configs/imx31_litekit.h
Diff comments   View file @ a9aa392
... ... @@ -146,7 +146,6 @@
146 146 #define PHYS_SDRAM_1 CSD0_BASE
147 147 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
148 148  
149   -#undef CONFIG_SYS_ARM_WITHOUT_RELOC
150 149 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE
151 150 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
152 151 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
include/configs/jornada.h
Diff comments   View file @ a9aa392
... ... @@ -28,7 +28,6 @@
28 28 #define CONFIG_SA1110 1 /* This is an SA110 CPU */
29 29 #define CONFIG_JORNADA700 1 /* on an HP Jornada 700 series */
30 30 #define CONFIG_SYS_FLASH_PROTECTION 1
31   -#define CONFIG_SYS_ARM_WITHOUT_RELOC 1
32 31  
33 32 #define CONFIG_SYS_TEXT_BASE 0xC1F00000
34 33  
include/configs/vision2.h
Diff comments   View file @ a9aa392
... ... @@ -190,17 +190,12 @@
190 190 #define CONFIG_SYS_SDRAM_BASE 0x90000000
191 191 #define CONFIG_SYS_INIT_RAM_ADDR 0x1FFE8000
192 192  
193   -#ifndef CONFIG_SYS_ARM_WITHOUT_RELOC
194 193 #define CONFIG_SYS_INIT_RAM_SIZE (64 * 1024)
195 194 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
196 195 GENERATED_GBL_DATA_SIZE)
197 196 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
198 197 CONFIG_SYS_GBL_DATA_OFFSET)
199 198 #undef CONFIG_SKIP_RELOCATE_UBOOT
200   -#else
201   -#define CONFIG_SKIP_RELOCATE_UBOOT
202   -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + 0x2000)
203   -#endif
204 199  
205 200 #define CONFIG_BOARD_EARLY_INIT_F
206 201  
nand_spl/nand_boot.c
Diff comments   View file @ a9aa392
... ... @@ -221,7 +221,7 @@
221 221 return 0;
222 222 }
223 223  
224   -#if defined(CONFIG_ARM) && !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
  224 +#if defined(CONFIG_ARM)
225 225 void board_init_f (ulong bootflag)
226 226 {
227 227 relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
nand_spl/nand_boot_fsl_nfc.c
Diff comments   View file @ a9aa392
... ... @@ -263,7 +263,7 @@
263 263 return 0;
264 264 }
265 265  
266   -#if defined(CONFIG_ARM) && !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
  266 +#if defined(CONFIG_ARM)
267 267 void board_init_f (ulong bootflag)
268 268 {
269 269 relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,