Eric Lee / smarc-uboot

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Commit aaa4ba930ca3bbc98f33651b175480ba86aa4dd2

Authored by Ludovic Desroches
Committed by Tom Rini
1 parent 48e4851f49
Exists in smarc_8mq_lf_v2020.04 and in 17 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

board: atmel: add sama5d2_ptc_ek board 

Add the SAMA5D2 PTC EK board and remove the SAMA5D2 PTC ENGI board
which was a prototype.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>

Showing 18 changed files with 566 additions and 500 deletions Inline Diff

arch/arm/dts/Makefile
Diff comments   View file @ aaa4ba9
1 # 1 #
2 # SPDX-License-Identifier: GPL-2.0+ 2 # SPDX-License-Identifier: GPL-2.0+
3 # 3 #
4 4
5 dtb-$(CONFIG_AT91FAMILY) += at91sam9260-smartweb.dtb \ 5 dtb-$(CONFIG_AT91FAMILY) += at91sam9260-smartweb.dtb \
6 at91sam9g20-taurus.dtb \ 6 at91sam9g20-taurus.dtb \
7 at91sam9g45-corvus.dtb \ 7 at91sam9g45-corvus.dtb \
8 at91sam9g45-gurnard.dtb 8 at91sam9g45-gurnard.dtb
9 9
10 dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb 10 dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb
11 dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb 11 dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb
12 dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \ 12 dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
13 exynos4210-smdkv310.dtb \ 13 exynos4210-smdkv310.dtb \
14 exynos4210-universal_c210.dtb \ 14 exynos4210-universal_c210.dtb \
15 exynos4210-trats.dtb \ 15 exynos4210-trats.dtb \
16 exynos4412-trats2.dtb \ 16 exynos4412-trats2.dtb \
17 exynos4412-odroid.dtb 17 exynos4412-odroid.dtb
18 18
19 dtb-$(CONFIG_TARGET_HIKEY) += hi6220-hikey.dtb 19 dtb-$(CONFIG_TARGET_HIKEY) += hi6220-hikey.dtb
20 20
21 dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \ 21 dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
22 exynos5250-snow.dtb \ 22 exynos5250-snow.dtb \
23 exynos5250-spring.dtb \ 23 exynos5250-spring.dtb \
24 exynos5250-smdk5250.dtb \ 24 exynos5250-smdk5250.dtb \
25 exynos5420-smdk5420.dtb \ 25 exynos5420-smdk5420.dtb \
26 exynos5420-peach-pit.dtb \ 26 exynos5420-peach-pit.dtb \
27 exynos5800-peach-pi.dtb \ 27 exynos5800-peach-pi.dtb \
28 exynos5422-odroidxu3.dtb 28 exynos5422-odroidxu3.dtb
29 dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb 29 dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
30 dtb-$(CONFIG_ARCH_ROCKCHIP) += \ 30 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
31 rk3036-sdk.dtb \ 31 rk3036-sdk.dtb \
32 rk3188-radxarock.dtb \ 32 rk3188-radxarock.dtb \
33 rk3288-evb.dtb \ 33 rk3288-evb.dtb \
34 rk3288-fennec.dtb \ 34 rk3288-fennec.dtb \
35 rk3288-firefly.dtb \ 35 rk3288-firefly.dtb \
36 rk3288-miqi.dtb \ 36 rk3288-miqi.dtb \
37 rk3288-phycore-rdk.dtb \ 37 rk3288-phycore-rdk.dtb \
38 rk3288-popmetal.dtb \ 38 rk3288-popmetal.dtb \
39 rk3288-rock2-square.dtb \ 39 rk3288-rock2-square.dtb \
40 rk3288-tinker.dtb \ 40 rk3288-tinker.dtb \
41 rk3288-veyron-jerry.dtb \ 41 rk3288-veyron-jerry.dtb \
42 rk3288-veyron-mickey.dtb \ 42 rk3288-veyron-mickey.dtb \
43 rk3288-veyron-minnie.dtb \ 43 rk3288-veyron-minnie.dtb \
44 rk3288-vyasa.dtb \ 44 rk3288-vyasa.dtb \
45 rk3328-evb.dtb \ 45 rk3328-evb.dtb \
46 rk3368-lion.dtb \ 46 rk3368-lion.dtb \
47 rk3368-sheep.dtb \ 47 rk3368-sheep.dtb \
48 rk3368-geekbox.dtb \ 48 rk3368-geekbox.dtb \
49 rk3368-px5-evb.dtb \ 49 rk3368-px5-evb.dtb \
50 rk3399-evb.dtb \ 50 rk3399-evb.dtb \
51 rk3399-firefly.dtb \ 51 rk3399-firefly.dtb \
52 rk3399-puma-ddr1333.dtb \ 52 rk3399-puma-ddr1333.dtb \
53 rk3399-puma-ddr1600.dtb \ 53 rk3399-puma-ddr1600.dtb \
54 rk3399-puma-ddr1866.dtb \ 54 rk3399-puma-ddr1866.dtb \
55 rv1108-evb.dtb 55 rv1108-evb.dtb
56 dtb-$(CONFIG_ARCH_MESON) += \ 56 dtb-$(CONFIG_ARCH_MESON) += \
57 meson-gxbb-odroidc2.dtb \ 57 meson-gxbb-odroidc2.dtb \
58 meson-gxl-s905x-p212.dtb 58 meson-gxl-s905x-p212.dtb
59 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ 59 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
60 tegra20-medcom-wide.dtb \ 60 tegra20-medcom-wide.dtb \
61 tegra20-paz00.dtb \ 61 tegra20-paz00.dtb \
62 tegra20-plutux.dtb \ 62 tegra20-plutux.dtb \
63 tegra20-seaboard.dtb \ 63 tegra20-seaboard.dtb \
64 tegra20-tec.dtb \ 64 tegra20-tec.dtb \
65 tegra20-trimslice.dtb \ 65 tegra20-trimslice.dtb \
66 tegra20-ventana.dtb \ 66 tegra20-ventana.dtb \
67 tegra20-colibri.dtb \ 67 tegra20-colibri.dtb \
68 tegra30-apalis.dtb \ 68 tegra30-apalis.dtb \
69 tegra30-beaver.dtb \ 69 tegra30-beaver.dtb \
70 tegra30-cardhu.dtb \ 70 tegra30-cardhu.dtb \
71 tegra30-colibri.dtb \ 71 tegra30-colibri.dtb \
72 tegra30-tec-ng.dtb \ 72 tegra30-tec-ng.dtb \
73 tegra114-dalmore.dtb \ 73 tegra114-dalmore.dtb \
74 tegra124-apalis.dtb \ 74 tegra124-apalis.dtb \
75 tegra124-jetson-tk1.dtb \ 75 tegra124-jetson-tk1.dtb \
76 tegra124-nyan-big.dtb \ 76 tegra124-nyan-big.dtb \
77 tegra124-cei-tk1-som.dtb \ 77 tegra124-cei-tk1-som.dtb \
78 tegra124-venice2.dtb \ 78 tegra124-venice2.dtb \
79 tegra186-p2771-0000-000.dtb \ 79 tegra186-p2771-0000-000.dtb \
80 tegra186-p2771-0000-500.dtb \ 80 tegra186-p2771-0000-500.dtb \
81 tegra210-e2220-1170.dtb \ 81 tegra210-e2220-1170.dtb \
82 tegra210-p2371-0000.dtb \ 82 tegra210-p2371-0000.dtb \
83 tegra210-p2371-2180.dtb \ 83 tegra210-p2371-2180.dtb \
84 tegra210-p2571.dtb 84 tegra210-p2571.dtb
85 85
86 dtb-$(CONFIG_ARCH_MVEBU) += \ 86 dtb-$(CONFIG_ARCH_MVEBU) += \
87 armada-3720-db.dtb \ 87 armada-3720-db.dtb \
88 armada-3720-espressobin.dtb \ 88 armada-3720-espressobin.dtb \
89 armada-375-db.dtb \ 89 armada-375-db.dtb \
90 armada-388-clearfog.dtb \ 90 armada-388-clearfog.dtb \
91 armada-388-gp.dtb \ 91 armada-388-gp.dtb \
92 armada-385-amc.dtb \ 92 armada-385-amc.dtb \
93 armada-7040-db.dtb \ 93 armada-7040-db.dtb \
94 armada-7040-db-nand.dtb \ 94 armada-7040-db-nand.dtb \
95 armada-8040-db.dtb \ 95 armada-8040-db.dtb \
96 armada-8040-mcbin.dtb \ 96 armada-8040-mcbin.dtb \
97 armada-xp-gp.dtb \ 97 armada-xp-gp.dtb \
98 armada-xp-maxbcm.dtb \ 98 armada-xp-maxbcm.dtb \
99 armada-xp-synology-ds414.dtb \ 99 armada-xp-synology-ds414.dtb \
100 armada-xp-theadorable.dtb \ 100 armada-xp-theadorable.dtb \
101 armada-38x-controlcenterdc.dtb 101 armada-38x-controlcenterdc.dtb
102 102
103 dtb-$(CONFIG_ARCH_UNIPHIER_LD11) += \ 103 dtb-$(CONFIG_ARCH_UNIPHIER_LD11) += \
104 uniphier-ld11-global.dtb \ 104 uniphier-ld11-global.dtb \
105 uniphier-ld11-ref.dtb 105 uniphier-ld11-ref.dtb
106 dtb-$(CONFIG_ARCH_UNIPHIER_LD20) += \ 106 dtb-$(CONFIG_ARCH_UNIPHIER_LD20) += \
107 uniphier-ld20-global.dtb \ 107 uniphier-ld20-global.dtb \
108 uniphier-ld20-ref.dtb 108 uniphier-ld20-ref.dtb
109 dtb-$(CONFIG_ARCH_UNIPHIER_LD4) += \ 109 dtb-$(CONFIG_ARCH_UNIPHIER_LD4) += \
110 uniphier-ld4-ref.dtb 110 uniphier-ld4-ref.dtb
111 dtb-$(CONFIG_ARCH_UNIPHIER_LD6B) += \ 111 dtb-$(CONFIG_ARCH_UNIPHIER_LD6B) += \
112 uniphier-ld6b-ref.dtb 112 uniphier-ld6b-ref.dtb
113 dtb-$(CONFIG_ARCH_UNIPHIER_PRO4) += \ 113 dtb-$(CONFIG_ARCH_UNIPHIER_PRO4) += \
114 uniphier-pro4-ace.dtb \ 114 uniphier-pro4-ace.dtb \
115 uniphier-pro4-ref.dtb \ 115 uniphier-pro4-ref.dtb \
116 uniphier-pro4-sanji.dtb 116 uniphier-pro4-sanji.dtb
117 dtb-$(CONFIG_ARCH_UNIPHIER_PRO5) += \ 117 dtb-$(CONFIG_ARCH_UNIPHIER_PRO5) += \
118 uniphier-pro5-4kbox.dtb 118 uniphier-pro5-4kbox.dtb
119 dtb-$(CONFIG_ARCH_UNIPHIER_PXS2) += \ 119 dtb-$(CONFIG_ARCH_UNIPHIER_PXS2) += \
120 uniphier-pxs2-gentil.dtb \ 120 uniphier-pxs2-gentil.dtb \
121 uniphier-pxs2-vodka.dtb 121 uniphier-pxs2-vodka.dtb
122 dtb-$(CONFIG_ARCH_UNIPHIER_PXS3) += \ 122 dtb-$(CONFIG_ARCH_UNIPHIER_PXS3) += \
123 uniphier-pxs3-ref.dtb 123 uniphier-pxs3-ref.dtb
124 dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \ 124 dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \
125 uniphier-sld8-ref.dtb 125 uniphier-sld8-ref.dtb
126 126
127 dtb-$(CONFIG_ARCH_ZYNQ) += \ 127 dtb-$(CONFIG_ARCH_ZYNQ) += \
128 zynq-cc108.dtb \ 128 zynq-cc108.dtb \
129 zynq-cse-qspi-single.dtb \ 129 zynq-cse-qspi-single.dtb \
130 zynq-microzed.dtb \ 130 zynq-microzed.dtb \
131 zynq-picozed.dtb \ 131 zynq-picozed.dtb \
132 zynq-syzygy-hub.dtb \ 132 zynq-syzygy-hub.dtb \
133 zynq-topic-miami.dtb \ 133 zynq-topic-miami.dtb \
134 zynq-topic-miamilite.dtb \ 134 zynq-topic-miamilite.dtb \
135 zynq-topic-miamiplus.dtb \ 135 zynq-topic-miamiplus.dtb \
136 zynq-zc702.dtb \ 136 zynq-zc702.dtb \
137 zynq-zc706.dtb \ 137 zynq-zc706.dtb \
138 zynq-zc770-xm010.dtb \ 138 zynq-zc770-xm010.dtb \
139 zynq-zc770-xm011.dtb \ 139 zynq-zc770-xm011.dtb \
140 zynq-zc770-xm012.dtb \ 140 zynq-zc770-xm012.dtb \
141 zynq-zc770-xm013.dtb \ 141 zynq-zc770-xm013.dtb \
142 zynq-zed.dtb \ 142 zynq-zed.dtb \
143 zynq-zturn-myir.dtb \ 143 zynq-zturn-myir.dtb \
144 zynq-zybo.dtb 144 zynq-zybo.dtb
145 dtb-$(CONFIG_ARCH_ZYNQMP) += \ 145 dtb-$(CONFIG_ARCH_ZYNQMP) += \
146 zynqmp-ep108.dtb \ 146 zynqmp-ep108.dtb \
147 zynqmp-zcu102-revA.dtb \ 147 zynqmp-zcu102-revA.dtb \
148 zynqmp-zcu102-revB.dtb \ 148 zynqmp-zcu102-revB.dtb \
149 zynqmp-zcu102-rev1.0.dtb \ 149 zynqmp-zcu102-rev1.0.dtb \
150 zynqmp-zc1751-xm015-dc1.dtb \ 150 zynqmp-zc1751-xm015-dc1.dtb \
151 zynqmp-zc1751-xm016-dc2.dtb \ 151 zynqmp-zc1751-xm016-dc2.dtb \
152 zynqmp-zc1751-xm018-dc4.dtb \ 152 zynqmp-zc1751-xm018-dc4.dtb \
153 zynqmp-zc1751-xm019-dc5.dtb 153 zynqmp-zc1751-xm019-dc5.dtb
154 dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-bone.dtb \ 154 dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-bone.dtb \
155 am335x-draco.dtb \ 155 am335x-draco.dtb \
156 am335x-evm.dtb \ 156 am335x-evm.dtb \
157 am335x-evmsk.dtb \ 157 am335x-evmsk.dtb \
158 am335x-bonegreen.dtb \ 158 am335x-bonegreen.dtb \
159 am335x-icev2.dtb \ 159 am335x-icev2.dtb \
160 am335x-pxm50.dtb \ 160 am335x-pxm50.dtb \
161 am335x-rut.dtb 161 am335x-rut.dtb
162 dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb \ 162 dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb \
163 am43x-epos-evm.dtb \ 163 am43x-epos-evm.dtb \
164 am437x-idk-evm.dtb 164 am437x-idk-evm.dtb
165 dtb-$(CONFIG_TI816X) += dm8168-evm.dtb 165 dtb-$(CONFIG_TI816X) += dm8168-evm.dtb
166 dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb 166 dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb
167 167
168 dtb-$(CONFIG_ARCH_SOCFPGA) += \ 168 dtb-$(CONFIG_ARCH_SOCFPGA) += \
169 socfpga_arria10_socdk_sdmmc.dtb \ 169 socfpga_arria10_socdk_sdmmc.dtb \
170 socfpga_arria5_socdk.dtb \ 170 socfpga_arria5_socdk.dtb \
171 socfpga_cyclone5_is1.dtb \ 171 socfpga_cyclone5_is1.dtb \
172 socfpga_cyclone5_mcvevk.dtb \ 172 socfpga_cyclone5_mcvevk.dtb \
173 socfpga_cyclone5_socdk.dtb \ 173 socfpga_cyclone5_socdk.dtb \
174 socfpga_cyclone5_de0_nano_soc.dtb \ 174 socfpga_cyclone5_de0_nano_soc.dtb \
175 socfpga_cyclone5_de1_soc.dtb \ 175 socfpga_cyclone5_de1_soc.dtb \
176 socfpga_cyclone5_de10_nano.dtb \ 176 socfpga_cyclone5_de10_nano.dtb \
177 socfpga_cyclone5_sockit.dtb \ 177 socfpga_cyclone5_sockit.dtb \
178 socfpga_cyclone5_socrates.dtb \ 178 socfpga_cyclone5_socrates.dtb \
179 socfpga_cyclone5_sr1500.dtb \ 179 socfpga_cyclone5_sr1500.dtb \
180 socfpga_cyclone5_vining_fpga.dtb 180 socfpga_cyclone5_vining_fpga.dtb
181 181
182 dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb \ 182 dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb \
183 dra72-evm-revc.dtb dra71-evm.dtb dra76-evm.dtb 183 dra72-evm-revc.dtb dra71-evm.dtb dra76-evm.dtb
184 dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \ 184 dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \
185 am57xx-beagle-x15-revb1.dtb \ 185 am57xx-beagle-x15-revb1.dtb \
186 am57xx-beagle-x15-revc.dtb \ 186 am57xx-beagle-x15-revc.dtb \
187 am572x-idk.dtb \ 187 am572x-idk.dtb \
188 am571x-idk.dtb 188 am571x-idk.dtb
189 dtb-$(CONFIG_TARGET_STV0991) += stv0991.dtb 189 dtb-$(CONFIG_TARGET_STV0991) += stv0991.dtb
190 190
191 dtb-$(CONFIG_ARCH_LS1021A) += ls1021a-qds-duart.dtb \ 191 dtb-$(CONFIG_ARCH_LS1021A) += ls1021a-qds-duart.dtb \
192 ls1021a-qds-lpuart.dtb \ 192 ls1021a-qds-lpuart.dtb \
193 ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb \ 193 ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb \
194 ls1021a-iot-duart.dtb 194 ls1021a-iot-duart.dtb
195 dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ 195 dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
196 fsl-ls2080a-rdb.dtb \ 196 fsl-ls2080a-rdb.dtb \
197 fsl-ls2081a-rdb.dtb \ 197 fsl-ls2081a-rdb.dtb \
198 fsl-ls2088a-rdb-qspi.dtb \ 198 fsl-ls2088a-rdb-qspi.dtb \
199 fsl-ls1088a-rdb.dtb \ 199 fsl-ls1088a-rdb.dtb \
200 fsl-ls1088a-qds.dtb 200 fsl-ls1088a-qds.dtb
201 dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ 201 dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
202 fsl-ls1043a-qds-lpuart.dtb \ 202 fsl-ls1043a-qds-lpuart.dtb \
203 fsl-ls1043a-rdb.dtb \ 203 fsl-ls1043a-rdb.dtb \
204 fsl-ls1046a-qds-duart.dtb \ 204 fsl-ls1046a-qds-duart.dtb \
205 fsl-ls1046a-qds-lpuart.dtb \ 205 fsl-ls1046a-qds-lpuart.dtb \
206 fsl-ls1046a-rdb.dtb \ 206 fsl-ls1046a-rdb.dtb \
207 fsl-ls1012a-qds.dtb \ 207 fsl-ls1012a-qds.dtb \
208 fsl-ls1012a-rdb.dtb \ 208 fsl-ls1012a-rdb.dtb \
209 fsl-ls1012a-frdm.dtb 209 fsl-ls1012a-frdm.dtb
210 210
211 dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb 211 dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb
212 212
213 dtb-$(CONFIG_STM32F7) += stm32f746-disco.dtb \ 213 dtb-$(CONFIG_STM32F7) += stm32f746-disco.dtb \
214 stm32f769-disco.dtb 214 stm32f769-disco.dtb
215 dtb-$(CONFIG_STM32H7) += stm32h743i-disco.dtb \ 215 dtb-$(CONFIG_STM32H7) += stm32h743i-disco.dtb \
216 stm32h743i-eval.dtb 216 stm32h743i-eval.dtb
217 217
218 dtb-$(CONFIG_MACH_SUN4I) += \ 218 dtb-$(CONFIG_MACH_SUN4I) += \
219 sun4i-a10-a1000.dtb \ 219 sun4i-a10-a1000.dtb \
220 sun4i-a10-ba10-tvbox.dtb \ 220 sun4i-a10-ba10-tvbox.dtb \
221 sun4i-a10-chuwi-v7-cw0825.dtb \ 221 sun4i-a10-chuwi-v7-cw0825.dtb \
222 sun4i-a10-cubieboard.dtb \ 222 sun4i-a10-cubieboard.dtb \
223 sun4i-a10-dserve-dsrv9703c.dtb \ 223 sun4i-a10-dserve-dsrv9703c.dtb \
224 sun4i-a10-gemei-g9.dtb \ 224 sun4i-a10-gemei-g9.dtb \
225 sun4i-a10-hackberry.dtb \ 225 sun4i-a10-hackberry.dtb \
226 sun4i-a10-hyundai-a7hd.dtb \ 226 sun4i-a10-hyundai-a7hd.dtb \
227 sun4i-a10-inet1.dtb \ 227 sun4i-a10-inet1.dtb \
228 sun4i-a10-inet-3f.dtb \ 228 sun4i-a10-inet-3f.dtb \
229 sun4i-a10-inet-3w.dtb \ 229 sun4i-a10-inet-3w.dtb \
230 sun4i-a10-inet97fv2.dtb \ 230 sun4i-a10-inet97fv2.dtb \
231 sun4i-a10-inet9f-rev03.dtb \ 231 sun4i-a10-inet9f-rev03.dtb \
232 sun4i-a10-itead-iteaduino-plus.dtb \ 232 sun4i-a10-itead-iteaduino-plus.dtb \
233 sun4i-a10-jesurun-q5.dtb \ 233 sun4i-a10-jesurun-q5.dtb \
234 sun4i-a10-marsboard.dtb \ 234 sun4i-a10-marsboard.dtb \
235 sun4i-a10-mini-xplus.dtb \ 235 sun4i-a10-mini-xplus.dtb \
236 sun4i-a10-mk802.dtb \ 236 sun4i-a10-mk802.dtb \
237 sun4i-a10-mk802ii.dtb \ 237 sun4i-a10-mk802ii.dtb \
238 sun4i-a10-olinuxino-lime.dtb \ 238 sun4i-a10-olinuxino-lime.dtb \
239 sun4i-a10-pcduino.dtb \ 239 sun4i-a10-pcduino.dtb \
240 sun4i-a10-pcduino2.dtb \ 240 sun4i-a10-pcduino2.dtb \
241 sun4i-a10-pov-protab2-ips9.dtb 241 sun4i-a10-pov-protab2-ips9.dtb
242 dtb-$(CONFIG_MACH_SUN5I) += \ 242 dtb-$(CONFIG_MACH_SUN5I) += \
243 sun5i-a10s-auxtek-t003.dtb \ 243 sun5i-a10s-auxtek-t003.dtb \
244 sun5i-a10s-auxtek-t004.dtb \ 244 sun5i-a10s-auxtek-t004.dtb \
245 sun5i-a10s-mk802.dtb \ 245 sun5i-a10s-mk802.dtb \
246 sun5i-a10s-olinuxino-micro.dtb \ 246 sun5i-a10s-olinuxino-micro.dtb \
247 sun5i-a10s-r7-tv-dongle.dtb \ 247 sun5i-a10s-r7-tv-dongle.dtb \
248 sun5i-a10s-wobo-i5.dtb \ 248 sun5i-a10s-wobo-i5.dtb \
249 sun5i-a13-ampe-a76.dtb \ 249 sun5i-a13-ampe-a76.dtb \
250 sun5i-a13-difrnce-dit4350.dtb \ 250 sun5i-a13-difrnce-dit4350.dtb \
251 sun5i-a13-empire-electronix-d709.dtb \ 251 sun5i-a13-empire-electronix-d709.dtb \
252 sun5i-a13-empire-electronix-m712.dtb \ 252 sun5i-a13-empire-electronix-m712.dtb \
253 sun5i-a13-hsg-h702.dtb \ 253 sun5i-a13-hsg-h702.dtb \
254 sun5i-a13-inet-86vs.dtb \ 254 sun5i-a13-inet-86vs.dtb \
255 sun5i-a13-inet-98v-rev2.dtb \ 255 sun5i-a13-inet-98v-rev2.dtb \
256 sun5i-a13-olinuxino.dtb \ 256 sun5i-a13-olinuxino.dtb \
257 sun5i-a13-olinuxino-micro.dtb \ 257 sun5i-a13-olinuxino-micro.dtb \
258 sun5i-a13-q8-tablet.dtb \ 258 sun5i-a13-q8-tablet.dtb \
259 sun5i-a13-utoo-p66.dtb \ 259 sun5i-a13-utoo-p66.dtb \
260 sun5i-gr8-chip-pro.dtb \ 260 sun5i-gr8-chip-pro.dtb \
261 sun5i-r8-chip.dtb 261 sun5i-r8-chip.dtb
262 dtb-$(CONFIG_MACH_SUN6I) += \ 262 dtb-$(CONFIG_MACH_SUN6I) += \
263 sun6i-a31-app4-evb1.dtb \ 263 sun6i-a31-app4-evb1.dtb \
264 sun6i-a31-colombus.dtb \ 264 sun6i-a31-colombus.dtb \
265 sun6i-a31-hummingbird.dtb \ 265 sun6i-a31-hummingbird.dtb \
266 sun6i-a31-i7.dtb \ 266 sun6i-a31-i7.dtb \
267 sun6i-a31-m9.dtb \ 267 sun6i-a31-m9.dtb \
268 sun6i-a31-mele-a1000g-quad.dtb \ 268 sun6i-a31-mele-a1000g-quad.dtb \
269 sun6i-a31-mixtile-loftq.dtb \ 269 sun6i-a31-mixtile-loftq.dtb \
270 sun6i-a31s-colorfly-e708-q1.dtb \ 270 sun6i-a31s-colorfly-e708-q1.dtb \
271 sun6i-a31s-cs908.dtb \ 271 sun6i-a31s-cs908.dtb \
272 sun6i-a31s-inet-q972.dtb \ 272 sun6i-a31s-inet-q972.dtb \
273 sun6i-a31s-primo81.dtb \ 273 sun6i-a31s-primo81.dtb \
274 sun6i-a31s-sina31s.dtb \ 274 sun6i-a31s-sina31s.dtb \
275 sun6i-a31s-sinovoip-bpi-m2.dtb \ 275 sun6i-a31s-sinovoip-bpi-m2.dtb \
276 sun6i-a31s-yones-toptech-bs1078-v2.dtb 276 sun6i-a31s-yones-toptech-bs1078-v2.dtb
277 dtb-$(CONFIG_MACH_SUN7I) += \ 277 dtb-$(CONFIG_MACH_SUN7I) += \
278 sun7i-a20-ainol-aw1.dtb \ 278 sun7i-a20-ainol-aw1.dtb \
279 sun7i-a20-bananapi.dtb \ 279 sun7i-a20-bananapi.dtb \
280 sun7i-a20-bananapi-m1-plus.dtb \ 280 sun7i-a20-bananapi-m1-plus.dtb \
281 sun7i-a20-bananapro.dtb \ 281 sun7i-a20-bananapro.dtb \
282 sun7i-a20-cubieboard2.dtb \ 282 sun7i-a20-cubieboard2.dtb \
283 sun7i-a20-cubietruck.dtb \ 283 sun7i-a20-cubietruck.dtb \
284 sun7i-a20-hummingbird.dtb \ 284 sun7i-a20-hummingbird.dtb \
285 sun7i-a20-i12-tvbox.dtb \ 285 sun7i-a20-i12-tvbox.dtb \
286 sun7i-a20-icnova-swac.dtb \ 286 sun7i-a20-icnova-swac.dtb \
287 sun7i-a20-itead-ibox.dtb \ 287 sun7i-a20-itead-ibox.dtb \
288 sun7i-a20-lamobo-r1.dtb \ 288 sun7i-a20-lamobo-r1.dtb \
289 sun7i-a20-m3.dtb \ 289 sun7i-a20-m3.dtb \
290 sun7i-a20-m5.dtb \ 290 sun7i-a20-m5.dtb \
291 sun7i-a20-mk808c.dtb \ 291 sun7i-a20-mk808c.dtb \
292 sun7i-a20-olimex-som-evb.dtb \ 292 sun7i-a20-olimex-som-evb.dtb \
293 sun7i-a20-olinuxino-lime.dtb \ 293 sun7i-a20-olinuxino-lime.dtb \
294 sun7i-a20-olinuxino-lime2.dtb \ 294 sun7i-a20-olinuxino-lime2.dtb \
295 sun7i-a20-olinuxino-lime2-emmc.dtb \ 295 sun7i-a20-olinuxino-lime2-emmc.dtb \
296 sun7i-a20-olinuxino-micro.dtb \ 296 sun7i-a20-olinuxino-micro.dtb \
297 sun7i-a20-orangepi.dtb \ 297 sun7i-a20-orangepi.dtb \
298 sun7i-a20-orangepi-mini.dtb \ 298 sun7i-a20-orangepi-mini.dtb \
299 sun7i-a20-pcduino3.dtb \ 299 sun7i-a20-pcduino3.dtb \
300 sun7i-a20-pcduino3-nano.dtb \ 300 sun7i-a20-pcduino3-nano.dtb \
301 sun7i-a20-primo73.dtb \ 301 sun7i-a20-primo73.dtb \
302 sun7i-a20-wexler-tab7200.dtb \ 302 sun7i-a20-wexler-tab7200.dtb \
303 sun7i-a20-wits-pro-a20-dkt.dtb \ 303 sun7i-a20-wits-pro-a20-dkt.dtb \
304 sun7i-a20-yones-toptech-bd1078.dtb 304 sun7i-a20-yones-toptech-bd1078.dtb
305 dtb-$(CONFIG_MACH_SUN8I_A23) += \ 305 dtb-$(CONFIG_MACH_SUN8I_A23) += \
306 sun8i-a23-evb.dtb \ 306 sun8i-a23-evb.dtb \
307 sun8i-a23-gt90h-v4.dtb \ 307 sun8i-a23-gt90h-v4.dtb \
308 sun8i-a23-inet86dz.dtb \ 308 sun8i-a23-inet86dz.dtb \
309 sun8i-a23-polaroid-mid2407pxe03.dtb \ 309 sun8i-a23-polaroid-mid2407pxe03.dtb \
310 sun8i-a23-polaroid-mid2809pxe04.dtb \ 310 sun8i-a23-polaroid-mid2809pxe04.dtb \
311 sun8i-a23-q8-tablet.dtb 311 sun8i-a23-q8-tablet.dtb
312 dtb-$(CONFIG_MACH_SUN8I_A33) += \ 312 dtb-$(CONFIG_MACH_SUN8I_A33) += \
313 sun8i-a33-ga10h-v1.1.dtb \ 313 sun8i-a33-ga10h-v1.1.dtb \
314 sun8i-a33-inet-d978-rev2.dtb \ 314 sun8i-a33-inet-d978-rev2.dtb \
315 sun8i-a33-olinuxino.dtb \ 315 sun8i-a33-olinuxino.dtb \
316 sun8i-a33-q8-tablet.dtb \ 316 sun8i-a33-q8-tablet.dtb \
317 sun8i-a33-sinlinx-sina33.dtb \ 317 sun8i-a33-sinlinx-sina33.dtb \
318 sun8i-r16-bananapi-m2m.dtb \ 318 sun8i-r16-bananapi-m2m.dtb \
319 sun8i-r16-nintendo-nes-classic-edition.dtb \ 319 sun8i-r16-nintendo-nes-classic-edition.dtb \
320 sun8i-r16-parrot.dtb 320 sun8i-r16-parrot.dtb
321 dtb-$(CONFIG_MACH_SUN8I_A83T) += \ 321 dtb-$(CONFIG_MACH_SUN8I_A83T) += \
322 sun8i-a83t-allwinner-h8homlet-v2.dtb \ 322 sun8i-a83t-allwinner-h8homlet-v2.dtb \
323 sun8i-a83t-bananapi-m3.dtb \ 323 sun8i-a83t-bananapi-m3.dtb \
324 sun8i-a83t-cubietruck-plus.dtb 324 sun8i-a83t-cubietruck-plus.dtb
325 dtb-$(CONFIG_MACH_SUN8I_H3) += \ 325 dtb-$(CONFIG_MACH_SUN8I_H3) += \
326 sun8i-h2-plus-orangepi-zero.dtb \ 326 sun8i-h2-plus-orangepi-zero.dtb \
327 sun8i-h3-bananapi-m2-plus.dtb \ 327 sun8i-h3-bananapi-m2-plus.dtb \
328 sun8i-h3-orangepi-2.dtb \ 328 sun8i-h3-orangepi-2.dtb \
329 sun8i-h3-orangepi-lite.dtb \ 329 sun8i-h3-orangepi-lite.dtb \
330 sun8i-h3-orangepi-one.dtb \ 330 sun8i-h3-orangepi-one.dtb \
331 sun8i-h3-orangepi-pc.dtb \ 331 sun8i-h3-orangepi-pc.dtb \
332 sun8i-h3-orangepi-pc-plus.dtb \ 332 sun8i-h3-orangepi-pc-plus.dtb \
333 sun8i-h3-orangepi-plus.dtb \ 333 sun8i-h3-orangepi-plus.dtb \
334 sun8i-h3-orangepi-plus2e.dtb \ 334 sun8i-h3-orangepi-plus2e.dtb \
335 sun8i-h3-nanopi-m1.dtb \ 335 sun8i-h3-nanopi-m1.dtb \
336 sun8i-h3-nanopi-m1-plus.dtb \ 336 sun8i-h3-nanopi-m1-plus.dtb \
337 sun8i-h3-nanopi-neo.dtb \ 337 sun8i-h3-nanopi-neo.dtb \
338 sun8i-h3-nanopi-neo-air.dtb 338 sun8i-h3-nanopi-neo-air.dtb
339 dtb-$(CONFIG_MACH_SUN8I_R40) += \ 339 dtb-$(CONFIG_MACH_SUN8I_R40) += \
340 sun8i-r40-bananapi-m2-ultra.dtb 340 sun8i-r40-bananapi-m2-ultra.dtb
341 dtb-$(CONFIG_MACH_SUN8I_V3S) += \ 341 dtb-$(CONFIG_MACH_SUN8I_V3S) += \
342 sun8i-v3s-licheepi-zero.dtb 342 sun8i-v3s-licheepi-zero.dtb
343 dtb-$(CONFIG_MACH_SUN50I_H5) += \ 343 dtb-$(CONFIG_MACH_SUN50I_H5) += \
344 sun50i-h5-nanopi-neo2.dtb \ 344 sun50i-h5-nanopi-neo2.dtb \
345 sun50i-h5-orangepi-pc2.dtb \ 345 sun50i-h5-orangepi-pc2.dtb \
346 sun50i-h5-orangepi-prime.dtb \ 346 sun50i-h5-orangepi-prime.dtb \
347 sun50i-h5-orangepi-zero-plus2.dtb 347 sun50i-h5-orangepi-zero-plus2.dtb
348 dtb-$(CONFIG_MACH_SUN50I) += \ 348 dtb-$(CONFIG_MACH_SUN50I) += \
349 sun50i-a64-bananapi-m64.dtb \ 349 sun50i-a64-bananapi-m64.dtb \
350 sun50i-a64-nanopi-a64.dtb \ 350 sun50i-a64-nanopi-a64.dtb \
351 sun50i-a64-olinuxino.dtb \ 351 sun50i-a64-olinuxino.dtb \
352 sun50i-a64-orangepi-win.dtb \ 352 sun50i-a64-orangepi-win.dtb \
353 sun50i-a64-pine64-plus.dtb \ 353 sun50i-a64-pine64-plus.dtb \
354 sun50i-a64-pine64.dtb 354 sun50i-a64-pine64.dtb
355 dtb-$(CONFIG_MACH_SUN9I) += \ 355 dtb-$(CONFIG_MACH_SUN9I) += \
356 sun9i-a80-optimus.dtb \ 356 sun9i-a80-optimus.dtb \
357 sun9i-a80-cubieboard4.dtb \ 357 sun9i-a80-cubieboard4.dtb \
358 sun9i-a80-cx-a99.dtb 358 sun9i-a80-cx-a99.dtb
359 359
360 dtb-$(CONFIG_VF610) += vf500-colibri.dtb \ 360 dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
361 vf610-colibri.dtb \ 361 vf610-colibri.dtb \
362 vf610-twr.dtb \ 362 vf610-twr.dtb \
363 pcm052.dtb \ 363 pcm052.dtb \
364 bk4r1.dtb 364 bk4r1.dtb
365 365
366 dtb-$(CONFIG_MX53) += imx53-cx9020.dtb 366 dtb-$(CONFIG_MX53) += imx53-cx9020.dtb
367 367
368 dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ 368 dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
369 imx6sl-evk.dtb \ 369 imx6sl-evk.dtb \
370 imx6sll-evk.dtb \ 370 imx6sll-evk.dtb \
371 imx6dl-icore.dtb \ 371 imx6dl-icore.dtb \
372 imx6dl-icore-rqs.dtb \ 372 imx6dl-icore-rqs.dtb \
373 imx6q-cm-fx6.dtb \ 373 imx6q-cm-fx6.dtb \
374 imx6q-icore.dtb \ 374 imx6q-icore.dtb \
375 imx6q-icore-rqs.dtb \ 375 imx6q-icore-rqs.dtb \
376 imx6q-logicpd.dtb \ 376 imx6q-logicpd.dtb \
377 imx6sx-sabreauto.dtb \ 377 imx6sx-sabreauto.dtb \
378 imx6ul-geam-kit.dtb \ 378 imx6ul-geam-kit.dtb \
379 imx6ul-isiot-emmc.dtb \ 379 imx6ul-isiot-emmc.dtb \
380 imx6ul-isiot-mmc.dtb \ 380 imx6ul-isiot-mmc.dtb \
381 imx6ul-isiot-nand.dtb \ 381 imx6ul-isiot-nand.dtb \
382 imx6ul-opos6uldev.dtb 382 imx6ul-opos6uldev.dtb
383 383
384 dtb-$(CONFIG_MX7) += imx7-colibri.dtb \ 384 dtb-$(CONFIG_MX7) += imx7-colibri.dtb \
385 imx7d-sdb.dtb 385 imx7d-sdb.dtb
386 386
387 dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb 387 dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
388 388
389 dtb-$(CONFIG_RCAR_GEN3) += \ 389 dtb-$(CONFIG_RCAR_GEN3) += \
390 r8a7795-h3ulcb.dtb \ 390 r8a7795-h3ulcb.dtb \
391 r8a7795-salvator-x.dtb \ 391 r8a7795-salvator-x.dtb \
392 r8a7796-m3ulcb.dtb \ 392 r8a7796-m3ulcb.dtb \
393 r8a7796-salvator-x.dtb 393 r8a7796-salvator-x.dtb
394 394
395 dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \ 395 dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \
396 keystone-k2l-evm.dtb \ 396 keystone-k2l-evm.dtb \
397 keystone-k2e-evm.dtb \ 397 keystone-k2e-evm.dtb \
398 keystone-k2g-evm.dtb \ 398 keystone-k2g-evm.dtb \
399 keystone-k2g-generic.dtb \ 399 keystone-k2g-generic.dtb \
400 keystone-k2g-ice.dtb 400 keystone-k2g-ice.dtb
401 401
402 dtb-$(CONFIG_TARGET_AT91SAM9261EK) += at91sam9261ek.dtb 402 dtb-$(CONFIG_TARGET_AT91SAM9261EK) += at91sam9261ek.dtb
403 403
404 dtb-$(CONFIG_TARGET_PM9263) += at91sam9263ek.dtb 404 dtb-$(CONFIG_TARGET_PM9263) += at91sam9263ek.dtb
405 405
406 dtb-$(CONFIG_TARGET_AT91SAM9263EK) += at91sam9263ek.dtb 406 dtb-$(CONFIG_TARGET_AT91SAM9263EK) += at91sam9263ek.dtb
407 407
408 dtb-$(CONFIG_TARGET_AT91SAM9RLEK) += at91sam9rlek.dtb 408 dtb-$(CONFIG_TARGET_AT91SAM9RLEK) += at91sam9rlek.dtb
409 409
410 dtb-$(CONFIG_TARGET_AT91SAM9260EK) += \ 410 dtb-$(CONFIG_TARGET_AT91SAM9260EK) += \
411 at91sam9260ek.dtb \ 411 at91sam9260ek.dtb \
412 at91sam9g20ek.dtb \ 412 at91sam9g20ek.dtb \
413 at91sam9g20ek_2mmc.dtb 413 at91sam9g20ek_2mmc.dtb
414 414
415 dtb-$(CONFIG_TARGET_AT91SAM9M10G45EK) += at91sam9m10g45ek.dtb 415 dtb-$(CONFIG_TARGET_AT91SAM9M10G45EK) += at91sam9m10g45ek.dtb
416 416
417 dtb-$(CONFIG_TARGET_AT91SAM9X5EK) += \ 417 dtb-$(CONFIG_TARGET_AT91SAM9X5EK) += \
418 at91sam9g15ek.dtb \ 418 at91sam9g15ek.dtb \
419 at91sam9g25ek.dtb \ 419 at91sam9g25ek.dtb \
420 at91sam9g35ek.dtb \ 420 at91sam9g35ek.dtb \
421 at91sam9x25ek.dtb \ 421 at91sam9x25ek.dtb \
422 at91sam9x35ek.dtb 422 at91sam9x35ek.dtb
423 423
424 dtb-$(CONFIG_TARGET_AT91SAM9N12EK) += at91sam9n12ek.dtb 424 dtb-$(CONFIG_TARGET_AT91SAM9N12EK) += at91sam9n12ek.dtb
425 425
426 dtb-$(CONFIG_TARGET_OMAP3_LOGIC) += \ 426 dtb-$(CONFIG_TARGET_OMAP3_LOGIC) += \
427 logicpd-torpedo-37xx-devkit.dtb \ 427 logicpd-torpedo-37xx-devkit.dtb \
428 logicpd-som-lv-37xx-devkit.dtb 428 logicpd-som-lv-37xx-devkit.dtb
429 429
430 dtb-$(CONFIG_TARGET_SAMA5D2_PTC_EK) += \
431 at91-sama5d2_ptc_ek.dtb
432
430 dtb-$(CONFIG_TARGET_SAMA5D2_XPLAINED) += \ 433 dtb-$(CONFIG_TARGET_SAMA5D2_XPLAINED) += \
431 at91-sama5d2_xplained.dtb 434 at91-sama5d2_xplained.dtb
432 435
433 dtb-$(CONFIG_TARGET_SAMA5D27_SOM1_EK) += \ 436 dtb-$(CONFIG_TARGET_SAMA5D27_SOM1_EK) += \
434 at91-sama5d27_som1_ek.dtb 437 at91-sama5d27_som1_ek.dtb
435 438
436 dtb-$(CONFIG_TARGET_SAMA5D3XEK) += \ 439 dtb-$(CONFIG_TARGET_SAMA5D3XEK) += \
437 sama5d31ek.dtb \ 440 sama5d31ek.dtb \
438 sama5d33ek.dtb \ 441 sama5d33ek.dtb \
439 sama5d34ek.dtb \ 442 sama5d34ek.dtb \
440 sama5d35ek.dtb \ 443 sama5d35ek.dtb \
441 sama5d36ek.dtb \ 444 sama5d36ek.dtb \
442 sama5d36ek_cmp.dtb 445 sama5d36ek_cmp.dtb
443 446
444 dtb-$(CONFIG_TARGET_SAMA5D3_XPLAINED) += \ 447 dtb-$(CONFIG_TARGET_SAMA5D3_XPLAINED) += \
445 at91-sama5d3_xplained.dtb 448 at91-sama5d3_xplained.dtb
446 449
447 dtb-$(CONFIG_TARGET_SAMA5D4EK) += \ 450 dtb-$(CONFIG_TARGET_SAMA5D4EK) += \
448 at91-sama5d4ek.dtb 451 at91-sama5d4ek.dtb
449 452
450 dtb-$(CONFIG_TARGET_SAMA5D4_XPLAINED) += \ 453 dtb-$(CONFIG_TARGET_SAMA5D4_XPLAINED) += \
451 at91-sama5d4_xplained.dtb 454 at91-sama5d4_xplained.dtb
452 455
453 dtb-$(CONFIG_ARCH_BCM283X) += \ 456 dtb-$(CONFIG_ARCH_BCM283X) += \
454 bcm2835-rpi-a-plus.dtb \ 457 bcm2835-rpi-a-plus.dtb \
455 bcm2835-rpi-a.dtb \ 458 bcm2835-rpi-a.dtb \
456 bcm2835-rpi-b-plus.dtb \ 459 bcm2835-rpi-b-plus.dtb \
457 bcm2835-rpi-b-rev2.dtb \ 460 bcm2835-rpi-b-rev2.dtb \
458 bcm2835-rpi-b.dtb \ 461 bcm2835-rpi-b.dtb \
459 bcm2836-rpi-2-b.dtb \ 462 bcm2836-rpi-2-b.dtb \
460 bcm2837-rpi-3-b.dtb 463 bcm2837-rpi-3-b.dtb
461 464
462 dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb 465 dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
463 466
464 dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb 467 dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
465 468
466 targets += $(dtb-y) 469 targets += $(dtb-y)
467 470
468 # Add any required device tree compiler flags here 471 # Add any required device tree compiler flags here
469 DTC_FLAGS += 472 DTC_FLAGS +=
470 473
471 PHONY += dtbs 474 PHONY += dtbs
472 dtbs: $(addprefix $(obj)/, $(dtb-y)) 475 dtbs: $(addprefix $(obj)/, $(dtb-y))
473 @: 476 @:
474 477
475 clean-files := *.dtb 478 clean-files := *.dtb
476 479
arch/arm/dts/at91-sama5d2_ptc_ek.dts
Diff comments   View file @ aaa4ba9
File was created 1 /*
2 * at91-sama5d2_ptc_ek.dts - Device Tree file for SAMA5D2 PTC EK board
3 *
4 * Copyright (C) 2017 Microchip Technology Inc,
5 * Ludovic Desroches <ludovic.desroches@microchip.com>
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45 /dts-v1/;
46 #include <dt-bindings/gpio/gpio.h>
47 #include "sama5d2.dtsi"
48 #include "sama5d2-pinfunc.h"
49
50 / {
51 model = "Atmel SAMA5D2 PTC EK";
52 compatible = "atmel,sama5d2-ptc_ek", "atmel,sama5d2", "atmel,sama5";
53
54 chosen {
55 u-boot,dm-pre-reloc;
56 stdout-path = &uart0;
57 };
58
59 ahb {
60 usb0: gadget@00300000 {
61 atmel,vbus-gpio = <&pioA PIN_PA27 GPIO_ACTIVE_HIGH>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_usba_vbus>;
64 status = "okay";
65 };
66
67 usb1: ohci@00400000 {
68 num-ports = <3>;
69 atmel,vbus-gpio = <0
70 &pioA PIN_PB12 GPIO_ACTIVE_HIGH
71 0
72 >;
73 pinctrl-names = "default";
74 pinctrl-0 = <&pinctrl_usb_default>;
75 status = "okay";
76 };
77
78 usb2: ehci@00500000 {
79 status = "okay";
80 };
81
82 sdmmc0: sdio-host@a0000000 {
83 bus-width = <8>;
84 pinctrl-names = "default";
85 pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
86 status = "okay";
87 u-boot,dm-pre-reloc;
88 };
89
90 sdmmc1: sdio-host@b0000000 {
91 bus-width = <4>;
92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>;
94 status = "disabled"; /* conflicts with nand and qspi0*/
95 u-boot,dm-pre-reloc;
96 };
97
98 apb {
99 macb0: ethernet@f8008000 {
100 pinctrl-names = "default";
101 pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
102 phy-mode = "rmii";
103 status = "okay";
104
105 ethernet-phy@1 {
106 reg = <0x1>;
107 };
108 };
109
110 uart0: serial@f801c000 {
111 pinctrl-names = "default";
112 pinctrl-0 = <&pinctrl_uart0_default>;
113 status = "okay";
114 u-boot,dm-pre-reloc;
115 };
116
117 i2c1: i2c@fc028000 {
118 pinctrl-names = "default";
119 pinctrl-0 = <&pinctrl_i2c1_default>;
120 status = "okay";
121
122 i2c_eeprom: i2c_eeprom@50 {
123 compatible = "atmel,24mac402";
124 reg = <0x50>;
125 };
126 };
127
128 pioA: gpio@fc038000 {
129 pinctrl {
130 pinctrl_i2c1_default: i2c1_default {
131 pinmux = <PIN_PC6__TWD1>,
132 <PIN_PC7__TWCK1>;
133 bias-disable;
134 };
135
136 pinctrl_macb0_phy_irq: macb0_phy_irq {
137 pinmux = <PIN_PB24__GPIO>;
138 bias-disable;
139 };
140
141 pinctrl_macb0_rmii: macb0_rmii {
142 pinmux = <PIN_PB14__GTXCK>,
143 <PIN_PB15__GTXEN>,
144 <PIN_PB16__GRXDV>,
145 <PIN_PB17__GRXER>,
146 <PIN_PB18__GRX0>,
147 <PIN_PB19__GRX1>,
148 <PIN_PB20__GTX0>,
149 <PIN_PB21__GTX1>,
150 <PIN_PB22__GMDC>,
151 <PIN_PB23__GMDIO>;
152 bias-disable;
153 };
154
155 pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
156 pinmux = <PIN_PA1__SDMMC0_CMD>,
157 <PIN_PA2__SDMMC0_DAT0>,
158 <PIN_PA3__SDMMC0_DAT1>,
159 <PIN_PA4__SDMMC0_DAT2>,
160 <PIN_PA5__SDMMC0_DAT3>,
161 <PIN_PA6__SDMMC0_DAT4>,
162 <PIN_PA7__SDMMC0_DAT5>,
163 <PIN_PA8__SDMMC0_DAT6>,
164 <PIN_PA9__SDMMC0_DAT7>;
165 bias-pull-up;
166 u-boot,dm-pre-reloc;
167 };
168
169 pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
170 pinmux = <PIN_PA0__SDMMC0_CK>,
171 <PIN_PA10__SDMMC0_RSTN>,
172 <PIN_PA11__SDMMC0_VDDSEL>,
173 <PIN_PA13__SDMMC0_CD>;
174 bias-disable;
175 u-boot,dm-pre-reloc;
176 };
177
178 pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default {
179 pinmux = <PIN_PA28__SDMMC1_CMD>,
180 <PIN_PA18__SDMMC1_DAT0>,
181 <PIN_PA19__SDMMC1_DAT1>,
182 <PIN_PA20__SDMMC1_DAT2>,
183 <PIN_PA21__SDMMC1_DAT3>;
184 bias-pull-up;
185 u-boot,dm-pre-reloc;
186 };
187
188 pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default {
189 pinmux = <PIN_PA22__SDMMC1_CK>,
190 <PIN_PA30__SDMMC1_CD>;
191 bias-disable;
192 u-boot,dm-pre-reloc;
193 };
194
195 pinctrl_uart0_default: uart0_default {
196 pinmux = <PIN_PB26__URXD0>,
197 <PIN_PB27__UTXD0>;
198 bias-disable;
199 u-boot,dm-pre-reloc;
200 };
201
202 pinctrl_usb_default: usb_default {
203 pinmux = <PIN_PB12__GPIO>;
204 bias-disable;
205 };
206
207 pinctrl_usba_vbus: usba_vbus {
208 pinmux = <PIN_PB11__GPIO>;
209 bias-disable;
210 };
211 };
212 };
213 };
214 };
215 };
216
arch/arm/dts/sama5d2.dtsi
Diff comments   View file @ aaa4ba9
1 #include "skeleton.dtsi" 1 #include "skeleton.dtsi"
2 2
3 / { 3 / {
4 model = "Atmel SAMA5D2 family SoC"; 4 model = "Atmel SAMA5D2 family SoC";
5 compatible = "atmel,sama5d2"; 5 compatible = "atmel,sama5d2";
6 6
7 aliases { 7 aliases {
8 spi0 = &spi0; 8 spi0 = &spi0;
9 spi1 = &qspi0; 9 spi1 = &qspi0;
10 i2c0 = &i2c0; 10 i2c0 = &i2c0;
11 i2c1 = &i2c1; 11 i2c1 = &i2c1;
12 }; 12 };
13 13
14 clocks { 14 clocks {
15 slow_xtal: slow_xtal { 15 slow_xtal: slow_xtal {
16 compatible = "fixed-clock"; 16 compatible = "fixed-clock";
17 #clock-cells = <0>; 17 #clock-cells = <0>;
18 clock-frequency = <0>; 18 clock-frequency = <0>;
19 }; 19 };
20 20
21 main_xtal: main_xtal { 21 main_xtal: main_xtal {
22 compatible = "fixed-clock"; 22 compatible = "fixed-clock";
23 #clock-cells = <0>; 23 #clock-cells = <0>;
24 clock-frequency = <0>; 24 clock-frequency = <0>;
25 }; 25 };
26 }; 26 };
27 27
28 ahb { 28 ahb {
29 compatible = "simple-bus"; 29 compatible = "simple-bus";
30 #address-cells = <1>; 30 #address-cells = <1>;
31 #size-cells = <1>; 31 #size-cells = <1>;
32 u-boot,dm-pre-reloc; 32 u-boot,dm-pre-reloc;
33 33
34 usb1: ohci@00400000 { 34 usb1: ohci@00400000 {
35 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 35 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
36 reg = <0x00400000 0x100000>; 36 reg = <0x00400000 0x100000>;
37 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; 37 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
38 clock-names = "ohci_clk", "hclk", "uhpck"; 38 clock-names = "ohci_clk", "hclk", "uhpck";
39 status = "disabled"; 39 status = "disabled";
40 }; 40 };
41 41
42 usb2: ehci@00500000 { 42 usb2: ehci@00500000 {
43 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 43 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
44 reg = <0x00500000 0x100000>; 44 reg = <0x00500000 0x100000>;
45 clocks = <&utmi>, <&uhphs_clk>; 45 clocks = <&utmi>, <&uhphs_clk>;
46 clock-names = "usb_clk", "ehci_clk"; 46 clock-names = "usb_clk", "ehci_clk";
47 status = "disabled"; 47 status = "disabled";
48 }; 48 };
49 49
50 sdmmc0: sdio-host@a0000000 { 50 sdmmc0: sdio-host@a0000000 {
51 compatible = "atmel,sama5d2-sdhci"; 51 compatible = "atmel,sama5d2-sdhci";
52 reg = <0xa0000000 0x300>; 52 reg = <0xa0000000 0x300>;
53 clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>; 53 clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
54 clock-names = "hclock", "multclk", "baseclk"; 54 clock-names = "hclock", "multclk", "baseclk";
55 status = "disabled"; 55 status = "disabled";
56 }; 56 };
57 57
58 sdmmc1: sdio-host@b0000000 { 58 sdmmc1: sdio-host@b0000000 {
59 compatible = "atmel,sama5d2-sdhci"; 59 compatible = "atmel,sama5d2-sdhci";
60 reg = <0xb0000000 0x300>; 60 reg = <0xb0000000 0x300>;
61 clocks = <&sdmmc1_hclk>, <&sdmmc1_gclk>, <&main>; 61 clocks = <&sdmmc1_hclk>, <&sdmmc1_gclk>, <&main>;
62 clock-names = "hclock", "multclk", "baseclk"; 62 clock-names = "hclock", "multclk", "baseclk";
63 status = "disabled"; 63 status = "disabled";
64 }; 64 };
65 65
66 apb { 66 apb {
67 compatible = "simple-bus"; 67 compatible = "simple-bus";
68 #address-cells = <1>; 68 #address-cells = <1>;
69 #size-cells = <1>; 69 #size-cells = <1>;
70 u-boot,dm-pre-reloc; 70 u-boot,dm-pre-reloc;
71 71
72 hlcdc: hlcdc@f0000000 { 72 hlcdc: hlcdc@f0000000 {
73 compatible = "atmel,at91sam9x5-hlcdc"; 73 compatible = "atmel,at91sam9x5-hlcdc";
74 reg = <0xf0000000 0x2000>; 74 reg = <0xf0000000 0x2000>;
75 clocks = <&lcdc_clk>; 75 clocks = <&lcdc_clk>;
76 status = "disabled"; 76 status = "disabled";
77 }; 77 };
78 78
79 pmc: pmc@f0014000 { 79 pmc: pmc@f0014000 {
80 compatible = "atmel,sama5d2-pmc", "syscon"; 80 compatible = "atmel,sama5d2-pmc", "syscon";
81 reg = <0xf0014000 0x160>; 81 reg = <0xf0014000 0x160>;
82 #address-cells = <1>; 82 #address-cells = <1>;
83 #size-cells = <0>; 83 #size-cells = <0>;
84 #interrupt-cells = <1>; 84 #interrupt-cells = <1>;
85 u-boot,dm-pre-reloc; 85 u-boot,dm-pre-reloc;
86 86
87 main: mainck { 87 main: mainck {
88 compatible = "atmel,at91sam9x5-clk-main"; 88 compatible = "atmel,at91sam9x5-clk-main";
89 #clock-cells = <0>; 89 #clock-cells = <0>;
90 u-boot,dm-pre-reloc; 90 u-boot,dm-pre-reloc;
91 }; 91 };
92 92
93 plla: pllack@0 { 93 plla: pllack@0 {
94 compatible = "atmel,sama5d3-clk-pll"; 94 compatible = "atmel,sama5d3-clk-pll";
95 #clock-cells = <0>; 95 #clock-cells = <0>;
96 clocks = <&main>; 96 clocks = <&main>;
97 reg = <0>; 97 reg = <0>;
98 atmel,clk-input-range = <12000000 12000000>; 98 atmel,clk-input-range = <12000000 12000000>;
99 #atmel,pll-clk-output-range-cells = <4>; 99 #atmel,pll-clk-output-range-cells = <4>;
100 atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>; 100 atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
101 u-boot,dm-pre-reloc; 101 u-boot,dm-pre-reloc;
102 }; 102 };
103 103
104 plladiv: plladivck { 104 plladiv: plladivck {
105 compatible = "atmel,at91sam9x5-clk-plldiv"; 105 compatible = "atmel,at91sam9x5-clk-plldiv";
106 #clock-cells = <0>; 106 #clock-cells = <0>;
107 clocks = <&plla>; 107 clocks = <&plla>;
108 }; 108 };
109 109
110 audio_pll_frac: audiopll_fracck { 110 audio_pll_frac: audiopll_fracck {
111 compatible = "atmel,sama5d2-clk-audio-pll-frac"; 111 compatible = "atmel,sama5d2-clk-audio-pll-frac";
112 #clock-cells = <0>; 112 #clock-cells = <0>;
113 clocks = <&main>; 113 clocks = <&main>;
114 }; 114 };
115 115
116 audio_pll_pad: audiopll_padck { 116 audio_pll_pad: audiopll_padck {
117 compatible = "atmel,sama5d2-clk-audio-pll-pad"; 117 compatible = "atmel,sama5d2-clk-audio-pll-pad";
118 #clock-cells = <0>; 118 #clock-cells = <0>;
119 clocks = <&audio_pll_frac>; 119 clocks = <&audio_pll_frac>;
120 }; 120 };
121 121
122 audio_pll_pmc: audiopll_pmcck { 122 audio_pll_pmc: audiopll_pmcck {
123 compatible = "atmel,sama5d2-clk-audio-pll-pmc"; 123 compatible = "atmel,sama5d2-clk-audio-pll-pmc";
124 #clock-cells = <0>; 124 #clock-cells = <0>;
125 clocks = <&audio_pll_frac>; 125 clocks = <&audio_pll_frac>;
126 }; 126 };
127 127
128 utmi: utmick { 128 utmi: utmick {
129 compatible = "atmel,at91sam9x5-clk-utmi"; 129 compatible = "atmel,at91sam9x5-clk-utmi";
130 #clock-cells = <0>; 130 #clock-cells = <0>;
131 clocks = <&main>; 131 clocks = <&main>;
132 regmap-sfr = <&sfr>; 132 regmap-sfr = <&sfr>;
133 u-boot,dm-pre-reloc; 133 u-boot,dm-pre-reloc;
134 }; 134 };
135 135
136 mck: masterck { 136 mck: masterck {
137 compatible = "atmel,at91sam9x5-clk-master"; 137 compatible = "atmel,at91sam9x5-clk-master";
138 #clock-cells = <0>; 138 #clock-cells = <0>;
139 clocks = <&main>, <&plladiv>, <&utmi>; 139 clocks = <&main>, <&plladiv>, <&utmi>;
140 atmel,clk-output-range = <124000000 166000000>; 140 atmel,clk-output-range = <124000000 166000000>;
141 atmel,clk-divisors = <1 2 4 3>; 141 atmel,clk-divisors = <1 2 4 3>;
142 u-boot,dm-pre-reloc; 142 u-boot,dm-pre-reloc;
143 }; 143 };
144 144
145 h32ck: h32mxck { 145 h32ck: h32mxck {
146 #clock-cells = <0>; 146 #clock-cells = <0>;
147 compatible = "atmel,sama5d4-clk-h32mx"; 147 compatible = "atmel,sama5d4-clk-h32mx";
148 clocks = <&mck>; 148 clocks = <&mck>;
149 u-boot,dm-pre-reloc; 149 u-boot,dm-pre-reloc;
150 }; 150 };
151 151
152 usb: usbck { 152 usb: usbck {
153 compatible = "atmel,at91sam9x5-clk-usb"; 153 compatible = "atmel,at91sam9x5-clk-usb";
154 #clock-cells = <0>; 154 #clock-cells = <0>;
155 clocks = <&plladiv>, <&utmi>; 155 clocks = <&plladiv>, <&utmi>;
156 }; 156 };
157 157
158 prog: progck { 158 prog: progck {
159 compatible = "atmel,at91sam9x5-clk-programmable"; 159 compatible = "atmel,at91sam9x5-clk-programmable";
160 #address-cells = <1>; 160 #address-cells = <1>;
161 #size-cells = <0>; 161 #size-cells = <0>;
162 interrupt-parent = <&pmc>; 162 interrupt-parent = <&pmc>;
163 clocks = <&main>, <&plladiv>, <&utmi>, <&mck>; 163 clocks = <&main>, <&plladiv>, <&utmi>, <&mck>;
164 164
165 prog0: prog@0 { 165 prog0: prog@0 {
166 #clock-cells = <0>; 166 #clock-cells = <0>;
167 reg = <0>; 167 reg = <0>;
168 }; 168 };
169 169
170 prog1: prog@1 { 170 prog1: prog@1 {
171 #clock-cells = <0>; 171 #clock-cells = <0>;
172 reg = <1>; 172 reg = <1>;
173 }; 173 };
174 174
175 prog2: prog@2 { 175 prog2: prog@2 {
176 #clock-cells = <0>; 176 #clock-cells = <0>;
177 reg = <2>; 177 reg = <2>;
178 }; 178 };
179 }; 179 };
180 180
181 systemck { 181 systemck {
182 compatible = "atmel,at91rm9200-clk-system"; 182 compatible = "atmel,at91rm9200-clk-system";
183 #address-cells = <1>; 183 #address-cells = <1>;
184 #size-cells = <0>; 184 #size-cells = <0>;
185 185
186 ddrck: ddrck@2 { 186 ddrck: ddrck@2 {
187 #clock-cells = <0>; 187 #clock-cells = <0>;
188 reg = <2>; 188 reg = <2>;
189 clocks = <&mck>; 189 clocks = <&mck>;
190 }; 190 };
191 191
192 lcdck: lcdck@3 { 192 lcdck: lcdck@3 {
193 #clock-cells = <0>; 193 #clock-cells = <0>;
194 reg = <3>; 194 reg = <3>;
195 clocks = <&mck>; 195 clocks = <&mck>;
196 }; 196 };
197 197
198 uhpck: uhpck@6 { 198 uhpck: uhpck@6 {
199 #clock-cells = <0>; 199 #clock-cells = <0>;
200 reg = <6>; 200 reg = <6>;
201 clocks = <&usb>; 201 clocks = <&usb>;
202 }; 202 };
203 203
204 udpck: udpck@7 { 204 udpck: udpck@7 {
205 #clock-cells = <0>; 205 #clock-cells = <0>;
206 reg = <7>; 206 reg = <7>;
207 clocks = <&usb>; 207 clocks = <&usb>;
208 }; 208 };
209 209
210 pck0: pck0@8 { 210 pck0: pck0@8 {
211 #clock-cells = <0>; 211 #clock-cells = <0>;
212 reg = <8>; 212 reg = <8>;
213 clocks = <&prog0>; 213 clocks = <&prog0>;
214 }; 214 };
215 215
216 pck1: pck1@9 { 216 pck1: pck1@9 {
217 #clock-cells = <0>; 217 #clock-cells = <0>;
218 reg = <9>; 218 reg = <9>;
219 clocks = <&prog1>; 219 clocks = <&prog1>;
220 }; 220 };
221 221
222 pck2: pck2@10 { 222 pck2: pck2@10 {
223 #clock-cells = <0>; 223 #clock-cells = <0>;
224 reg = <10>; 224 reg = <10>;
225 clocks = <&prog2>; 225 clocks = <&prog2>;
226 }; 226 };
227 227
228 iscck: iscck@18 { 228 iscck: iscck@18 {
229 #clock-cells = <0>; 229 #clock-cells = <0>;
230 reg = <18>; 230 reg = <18>;
231 clocks = <&mck>; 231 clocks = <&mck>;
232 }; 232 };
233 }; 233 };
234 234
235 periph32ck { 235 periph32ck {
236 compatible = "atmel,at91sam9x5-clk-peripheral"; 236 compatible = "atmel,at91sam9x5-clk-peripheral";
237 #address-cells = <1>; 237 #address-cells = <1>;
238 #size-cells = <0>; 238 #size-cells = <0>;
239 clocks = <&h32ck>; 239 clocks = <&h32ck>;
240 u-boot,dm-pre-reloc; 240 u-boot,dm-pre-reloc;
241 241
242 macb0_clk: macb0_clk@5 { 242 macb0_clk: macb0_clk@5 {
243 #clock-cells = <0>; 243 #clock-cells = <0>;
244 reg = <5>; 244 reg = <5>;
245 atmel,clk-output-range = <0 83000000>; 245 atmel,clk-output-range = <0 83000000>;
246 }; 246 };
247 247
248 tdes_clk: tdes_clk@11 { 248 tdes_clk: tdes_clk@11 {
249 #clock-cells = <0>; 249 #clock-cells = <0>;
250 reg = <11>; 250 reg = <11>;
251 atmel,clk-output-range = <0 83000000>; 251 atmel,clk-output-range = <0 83000000>;
252 }; 252 };
253 253
254 matrix1_clk: matrix1_clk@14 { 254 matrix1_clk: matrix1_clk@14 {
255 #clock-cells = <0>; 255 #clock-cells = <0>;
256 reg = <14>; 256 reg = <14>;
257 }; 257 };
258 258
259 hsmc_clk: hsmc_clk@17 { 259 hsmc_clk: hsmc_clk@17 {
260 #clock-cells = <0>; 260 #clock-cells = <0>;
261 reg = <17>; 261 reg = <17>;
262 }; 262 };
263 263
264 pioA_clk: pioA_clk@18 { 264 pioA_clk: pioA_clk@18 {
265 #clock-cells = <0>; 265 #clock-cells = <0>;
266 reg = <18>; 266 reg = <18>;
267 atmel,clk-output-range = <0 83000000>; 267 atmel,clk-output-range = <0 83000000>;
268 u-boot,dm-pre-reloc; 268 u-boot,dm-pre-reloc;
269 }; 269 };
270 270
271 flx0_clk: flx0_clk@19 { 271 flx0_clk: flx0_clk@19 {
272 #clock-cells = <0>; 272 #clock-cells = <0>;
273 reg = <19>; 273 reg = <19>;
274 atmel,clk-output-range = <0 83000000>; 274 atmel,clk-output-range = <0 83000000>;
275 }; 275 };
276 276
277 flx1_clk: flx1_clk@20 { 277 flx1_clk: flx1_clk@20 {
278 #clock-cells = <0>; 278 #clock-cells = <0>;
279 reg = <20>; 279 reg = <20>;
280 atmel,clk-output-range = <0 83000000>; 280 atmel,clk-output-range = <0 83000000>;
281 }; 281 };
282 282
283 flx2_clk: flx2_clk@21 { 283 flx2_clk: flx2_clk@21 {
284 #clock-cells = <0>; 284 #clock-cells = <0>;
285 reg = <21>; 285 reg = <21>;
286 atmel,clk-output-range = <0 83000000>; 286 atmel,clk-output-range = <0 83000000>;
287 }; 287 };
288 288
289 flx3_clk: flx3_clk@22 { 289 flx3_clk: flx3_clk@22 {
290 #clock-cells = <0>; 290 #clock-cells = <0>;
291 reg = <22>; 291 reg = <22>;
292 atmel,clk-output-range = <0 83000000>; 292 atmel,clk-output-range = <0 83000000>;
293 }; 293 };
294 294
295 flx4_clk: flx4_clk@23 { 295 flx4_clk: flx4_clk@23 {
296 #clock-cells = <0>; 296 #clock-cells = <0>;
297 reg = <23>; 297 reg = <23>;
298 atmel,clk-output-range = <0 83000000>; 298 atmel,clk-output-range = <0 83000000>;
299 }; 299 };
300 300
301 uart0_clk: uart0_clk@24 { 301 uart0_clk: uart0_clk@24 {
302 #clock-cells = <0>; 302 #clock-cells = <0>;
303 reg = <24>; 303 reg = <24>;
304 atmel,clk-output-range = <0 83000000>; 304 atmel,clk-output-range = <0 83000000>;
305 u-boot,dm-pre-reloc;
305 }; 306 };
306 307
307 uart1_clk: uart1_clk@25 { 308 uart1_clk: uart1_clk@25 {
308 #clock-cells = <0>; 309 #clock-cells = <0>;
309 reg = <25>; 310 reg = <25>;
310 atmel,clk-output-range = <0 83000000>; 311 atmel,clk-output-range = <0 83000000>;
311 u-boot,dm-pre-reloc; 312 u-boot,dm-pre-reloc;
312 }; 313 };
313 314
314 uart2_clk: uart2_clk@26 { 315 uart2_clk: uart2_clk@26 {
315 #clock-cells = <0>; 316 #clock-cells = <0>;
316 reg = <26>; 317 reg = <26>;
317 atmel,clk-output-range = <0 83000000>; 318 atmel,clk-output-range = <0 83000000>;
319 u-boot,dm-pre-reloc;
318 }; 320 };
319 321
320 uart3_clk: uart3_clk@27 { 322 uart3_clk: uart3_clk@27 {
321 #clock-cells = <0>; 323 #clock-cells = <0>;
322 reg = <27>; 324 reg = <27>;
323 atmel,clk-output-range = <0 83000000>; 325 atmel,clk-output-range = <0 83000000>;
324 }; 326 };
325 327
326 uart4_clk: uart4_clk@28 { 328 uart4_clk: uart4_clk@28 {
327 #clock-cells = <0>; 329 #clock-cells = <0>;
328 reg = <28>; 330 reg = <28>;
329 atmel,clk-output-range = <0 83000000>; 331 atmel,clk-output-range = <0 83000000>;
330 }; 332 };
331 333
332 twi0_clk: twi0_clk@29 { 334 twi0_clk: twi0_clk@29 {
333 reg = <29>; 335 reg = <29>;
334 #clock-cells = <0>; 336 #clock-cells = <0>;
335 atmel,clk-output-range = <0 83000000>; 337 atmel,clk-output-range = <0 83000000>;
336 }; 338 };
337 339
338 twi1_clk: twi1_clk@30 { 340 twi1_clk: twi1_clk@30 {
339 #clock-cells = <0>; 341 #clock-cells = <0>;
340 reg = <30>; 342 reg = <30>;
341 atmel,clk-output-range = <0 83000000>; 343 atmel,clk-output-range = <0 83000000>;
342 }; 344 };
343 345
344 spi0_clk: spi0_clk@33 { 346 spi0_clk: spi0_clk@33 {
345 #clock-cells = <0>; 347 #clock-cells = <0>;
346 reg = <33>; 348 reg = <33>;
347 atmel,clk-output-range = <0 83000000>; 349 atmel,clk-output-range = <0 83000000>;
348 u-boot,dm-pre-reloc; 350 u-boot,dm-pre-reloc;
349 }; 351 };
350 352
351 spi1_clk: spi1_clk@34 { 353 spi1_clk: spi1_clk@34 {
352 #clock-cells = <0>; 354 #clock-cells = <0>;
353 reg = <34>; 355 reg = <34>;
354 atmel,clk-output-range = <0 83000000>; 356 atmel,clk-output-range = <0 83000000>;
355 }; 357 };
356 358
357 tcb0_clk: tcb0_clk@35 { 359 tcb0_clk: tcb0_clk@35 {
358 #clock-cells = <0>; 360 #clock-cells = <0>;
359 reg = <35>; 361 reg = <35>;
360 atmel,clk-output-range = <0 83000000>; 362 atmel,clk-output-range = <0 83000000>;
361 }; 363 };
362 364
363 tcb1_clk: tcb1_clk@36 { 365 tcb1_clk: tcb1_clk@36 {
364 #clock-cells = <0>; 366 #clock-cells = <0>;
365 reg = <36>; 367 reg = <36>;
366 atmel,clk-output-range = <0 83000000>; 368 atmel,clk-output-range = <0 83000000>;
367 }; 369 };
368 370
369 pwm_clk: pwm_clk@38 { 371 pwm_clk: pwm_clk@38 {
370 #clock-cells = <0>; 372 #clock-cells = <0>;
371 reg = <38>; 373 reg = <38>;
372 atmel,clk-output-range = <0 83000000>; 374 atmel,clk-output-range = <0 83000000>;
373 }; 375 };
374 376
375 adc_clk: adc_clk@40 { 377 adc_clk: adc_clk@40 {
376 #clock-cells = <0>; 378 #clock-cells = <0>;
377 reg = <40>; 379 reg = <40>;
378 atmel,clk-output-range = <0 83000000>; 380 atmel,clk-output-range = <0 83000000>;
379 }; 381 };
380 382
381 uhphs_clk: uhphs_clk@41 { 383 uhphs_clk: uhphs_clk@41 {
382 #clock-cells = <0>; 384 #clock-cells = <0>;
383 reg = <41>; 385 reg = <41>;
384 atmel,clk-output-range = <0 83000000>; 386 atmel,clk-output-range = <0 83000000>;
385 }; 387 };
386 388
387 udphs_clk: udphs_clk@42 { 389 udphs_clk: udphs_clk@42 {
388 #clock-cells = <0>; 390 #clock-cells = <0>;
389 reg = <42>; 391 reg = <42>;
390 atmel,clk-output-range = <0 83000000>; 392 atmel,clk-output-range = <0 83000000>;
391 }; 393 };
392 394
393 ssc0_clk: ssc0_clk@43 { 395 ssc0_clk: ssc0_clk@43 {
394 #clock-cells = <0>; 396 #clock-cells = <0>;
395 reg = <43>; 397 reg = <43>;
396 atmel,clk-output-range = <0 83000000>; 398 atmel,clk-output-range = <0 83000000>;
397 }; 399 };
398 400
399 ssc1_clk: ssc1_clk@44 { 401 ssc1_clk: ssc1_clk@44 {
400 #clock-cells = <0>; 402 #clock-cells = <0>;
401 reg = <44>; 403 reg = <44>;
402 atmel,clk-output-range = <0 83000000>; 404 atmel,clk-output-range = <0 83000000>;
403 }; 405 };
404 406
405 trng_clk: trng_clk@47 { 407 trng_clk: trng_clk@47 {
406 #clock-cells = <0>; 408 #clock-cells = <0>;
407 reg = <47>; 409 reg = <47>;
408 atmel,clk-output-range = <0 83000000>; 410 atmel,clk-output-range = <0 83000000>;
409 }; 411 };
410 412
411 pdmic_clk: pdmic_clk@48 { 413 pdmic_clk: pdmic_clk@48 {
412 #clock-cells = <0>; 414 #clock-cells = <0>;
413 reg = <48>; 415 reg = <48>;
414 atmel,clk-output-range = <0 83000000>; 416 atmel,clk-output-range = <0 83000000>;
415 }; 417 };
416 418
417 i2s0_clk: i2s0_clk@54 { 419 i2s0_clk: i2s0_clk@54 {
418 #clock-cells = <0>; 420 #clock-cells = <0>;
419 reg = <54>; 421 reg = <54>;
420 atmel,clk-output-range = <0 83000000>; 422 atmel,clk-output-range = <0 83000000>;
421 }; 423 };
422 424
423 i2s1_clk: i2s1_clk@55 { 425 i2s1_clk: i2s1_clk@55 {
424 #clock-cells = <0>; 426 #clock-cells = <0>;
425 reg = <55>; 427 reg = <55>;
426 atmel,clk-output-range = <0 83000000>; 428 atmel,clk-output-range = <0 83000000>;
427 }; 429 };
428 430
429 can0_clk: can0_clk@56 { 431 can0_clk: can0_clk@56 {
430 #clock-cells = <0>; 432 #clock-cells = <0>;
431 reg = <56>; 433 reg = <56>;
432 atmel,clk-output-range = <0 83000000>; 434 atmel,clk-output-range = <0 83000000>;
433 }; 435 };
434 436
435 can1_clk: can1_clk@57 { 437 can1_clk: can1_clk@57 {
436 #clock-cells = <0>; 438 #clock-cells = <0>;
437 reg = <57>; 439 reg = <57>;
438 atmel,clk-output-range = <0 83000000>; 440 atmel,clk-output-range = <0 83000000>;
439 }; 441 };
440 442
441 classd_clk: classd_clk@59 { 443 classd_clk: classd_clk@59 {
442 #clock-cells = <0>; 444 #clock-cells = <0>;
443 reg = <59>; 445 reg = <59>;
444 atmel,clk-output-range = <0 83000000>; 446 atmel,clk-output-range = <0 83000000>;
445 }; 447 };
446 }; 448 };
447 449
448 periph64ck { 450 periph64ck {
449 compatible = "atmel,at91sam9x5-clk-peripheral"; 451 compatible = "atmel,at91sam9x5-clk-peripheral";
450 #address-cells = <1>; 452 #address-cells = <1>;
451 #size-cells = <0>; 453 #size-cells = <0>;
452 clocks = <&mck>; 454 clocks = <&mck>;
453 u-boot,dm-pre-reloc; 455 u-boot,dm-pre-reloc;
454 456
455 dma0_clk: dma0_clk@6 { 457 dma0_clk: dma0_clk@6 {
456 #clock-cells = <0>; 458 #clock-cells = <0>;
457 reg = <6>; 459 reg = <6>;
458 }; 460 };
459 461
460 dma1_clk: dma1_clk@7 { 462 dma1_clk: dma1_clk@7 {
461 #clock-cells = <0>; 463 #clock-cells = <0>;
462 reg = <7>; 464 reg = <7>;
463 }; 465 };
464 466
465 aes_clk: aes_clk@9 { 467 aes_clk: aes_clk@9 {
466 #clock-cells = <0>; 468 #clock-cells = <0>;
467 reg = <9>; 469 reg = <9>;
468 }; 470 };
469 471
470 aesb_clk: aesb_clk@10 { 472 aesb_clk: aesb_clk@10 {
471 #clock-cells = <0>; 473 #clock-cells = <0>;
472 reg = <10>; 474 reg = <10>;
473 }; 475 };
474 476
475 sha_clk: sha_clk@12 { 477 sha_clk: sha_clk@12 {
476 #clock-cells = <0>; 478 #clock-cells = <0>;
477 reg = <12>; 479 reg = <12>;
478 }; 480 };
479 481
480 mpddr_clk: mpddr_clk@13 { 482 mpddr_clk: mpddr_clk@13 {
481 #clock-cells = <0>; 483 #clock-cells = <0>;
482 reg = <13>; 484 reg = <13>;
483 }; 485 };
484 486
485 matrix0_clk: matrix0_clk@15 { 487 matrix0_clk: matrix0_clk@15 {
486 #clock-cells = <0>; 488 #clock-cells = <0>;
487 reg = <15>; 489 reg = <15>;
488 }; 490 };
489 491
490 sdmmc0_hclk: sdmmc0_hclk@31 { 492 sdmmc0_hclk: sdmmc0_hclk@31 {
491 #clock-cells = <0>; 493 #clock-cells = <0>;
492 reg = <31>; 494 reg = <31>;
493 u-boot,dm-pre-reloc; 495 u-boot,dm-pre-reloc;
494 }; 496 };
495 497
496 sdmmc1_hclk: sdmmc1_hclk@32 { 498 sdmmc1_hclk: sdmmc1_hclk@32 {
497 #clock-cells = <0>; 499 #clock-cells = <0>;
498 reg = <32>; 500 reg = <32>;
499 u-boot,dm-pre-reloc; 501 u-boot,dm-pre-reloc;
500 }; 502 };
501 503
502 lcdc_clk: lcdc_clk@45 { 504 lcdc_clk: lcdc_clk@45 {
503 #clock-cells = <0>; 505 #clock-cells = <0>;
504 reg = <45>; 506 reg = <45>;
505 }; 507 };
506 508
507 isc_clk: isc_clk@46 { 509 isc_clk: isc_clk@46 {
508 #clock-cells = <0>; 510 #clock-cells = <0>;
509 reg = <46>; 511 reg = <46>;
510 }; 512 };
511 513
512 qspi0_clk: qspi0_clk@52 { 514 qspi0_clk: qspi0_clk@52 {
513 #clock-cells = <0>; 515 #clock-cells = <0>;
514 reg = <52>; 516 reg = <52>;
515 u-boot,dm-pre-reloc; 517 u-boot,dm-pre-reloc;
516 }; 518 };
517 519
518 qspi1_clk: qspi1_clk@53 { 520 qspi1_clk: qspi1_clk@53 {
519 #clock-cells = <0>; 521 #clock-cells = <0>;
520 reg = <53>; 522 reg = <53>;
521 u-boot,dm-pre-reloc; 523 u-boot,dm-pre-reloc;
522 }; 524 };
523 }; 525 };
524 526
525 gck { 527 gck {
526 compatible = "atmel,sama5d2-clk-generated"; 528 compatible = "atmel,sama5d2-clk-generated";
527 #address-cells = <1>; 529 #address-cells = <1>;
528 #size-cells = <0>; 530 #size-cells = <0>;
529 interrupt-parent = <&pmc>; 531 interrupt-parent = <&pmc>;
530 clocks = <&main>, <&plla>, <&utmi>, <&mck>; 532 clocks = <&main>, <&plla>, <&utmi>, <&mck>;
531 u-boot,dm-pre-reloc; 533 u-boot,dm-pre-reloc;
532 534
533 sdmmc0_gclk: sdmmc0_gclk@31 { 535 sdmmc0_gclk: sdmmc0_gclk@31 {
534 #clock-cells = <0>; 536 #clock-cells = <0>;
535 reg = <31>; 537 reg = <31>;
536 u-boot,dm-pre-reloc; 538 u-boot,dm-pre-reloc;
537 }; 539 };
538 540
539 sdmmc1_gclk: sdmmc1_gclk@32 { 541 sdmmc1_gclk: sdmmc1_gclk@32 {
540 #clock-cells = <0>; 542 #clock-cells = <0>;
541 reg = <32>; 543 reg = <32>;
542 u-boot,dm-pre-reloc; 544 u-boot,dm-pre-reloc;
543 }; 545 };
544 546
545 tcb0_gclk: tcb0_gclk@35 { 547 tcb0_gclk: tcb0_gclk@35 {
546 #clock-cells = <0>; 548 #clock-cells = <0>;
547 reg = <35>; 549 reg = <35>;
548 atmel,clk-output-range = <0 83000000>; 550 atmel,clk-output-range = <0 83000000>;
549 }; 551 };
550 552
551 tcb1_gclk: tcb1_gclk@36 { 553 tcb1_gclk: tcb1_gclk@36 {
552 #clock-cells = <0>; 554 #clock-cells = <0>;
553 reg = <36>; 555 reg = <36>;
554 atmel,clk-output-range = <0 83000000>; 556 atmel,clk-output-range = <0 83000000>;
555 }; 557 };
556 558
557 pwm_gclk: pwm_gclk@38 { 559 pwm_gclk: pwm_gclk@38 {
558 #clock-cells = <0>; 560 #clock-cells = <0>;
559 reg = <38>; 561 reg = <38>;
560 atmel,clk-output-range = <0 83000000>; 562 atmel,clk-output-range = <0 83000000>;
561 }; 563 };
562 564
563 pdmic_gclk: pdmic_gclk@48 { 565 pdmic_gclk: pdmic_gclk@48 {
564 #clock-cells = <0>; 566 #clock-cells = <0>;
565 reg = <48>; 567 reg = <48>;
566 }; 568 };
567 569
568 i2s0_gclk: i2s0_gclk@54 { 570 i2s0_gclk: i2s0_gclk@54 {
569 #clock-cells = <0>; 571 #clock-cells = <0>;
570 reg = <54>; 572 reg = <54>;
571 }; 573 };
572 574
573 i2s1_gclk: i2s1_gclk@55 { 575 i2s1_gclk: i2s1_gclk@55 {
574 #clock-cells = <0>; 576 #clock-cells = <0>;
575 reg = <55>; 577 reg = <55>;
576 }; 578 };
577 579
578 can0_gclk: can0_gclk@56 { 580 can0_gclk: can0_gclk@56 {
579 #clock-cells = <0>; 581 #clock-cells = <0>;
580 reg = <56>; 582 reg = <56>;
581 atmel,clk-output-range = <0 80000000>; 583 atmel,clk-output-range = <0 80000000>;
582 }; 584 };
583 585
584 can1_gclk: can1_gclk@57 { 586 can1_gclk: can1_gclk@57 {
585 #clock-cells = <0>; 587 #clock-cells = <0>;
586 reg = <57>; 588 reg = <57>;
587 atmel,clk-output-range = <0 80000000>; 589 atmel,clk-output-range = <0 80000000>;
588 }; 590 };
589 591
590 classd_gclk: classd_gclk@59 { 592 classd_gclk: classd_gclk@59 {
591 #clock-cells = <0>; 593 #clock-cells = <0>;
592 reg = <59>; 594 reg = <59>;
593 atmel,clk-output-range = <0 100000000>; 595 atmel,clk-output-range = <0 100000000>;
594 }; 596 };
595 }; 597 };
596 }; 598 };
597 599
598 qspi0: spi@f0020000 { 600 qspi0: spi@f0020000 {
599 compatible = "atmel,sama5d2-qspi"; 601 compatible = "atmel,sama5d2-qspi";
600 reg = <0xf0020000 0x100>, <0xd0000000 0x08000000>; 602 reg = <0xf0020000 0x100>, <0xd0000000 0x08000000>;
601 reg-names = "qspi_base", "qspi_mmap"; 603 reg-names = "qspi_base", "qspi_mmap";
602 #address-cells = <1>; 604 #address-cells = <1>;
603 #size-cells = <0>; 605 #size-cells = <0>;
604 clocks = <&qspi0_clk>; 606 clocks = <&qspi0_clk>;
605 status = "disabled"; 607 status = "disabled";
606 }; 608 };
607 609
608 qspi1: spi@f0024000 { 610 qspi1: spi@f0024000 {
609 compatible = "atmel,sama5d2-qspi"; 611 compatible = "atmel,sama5d2-qspi";
610 reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>; 612 reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
611 reg-names = "qspi_base", "qspi_mmap"; 613 reg-names = "qspi_base", "qspi_mmap";
612 #address-cells = <1>; 614 #address-cells = <1>;
613 #size-cells = <0>; 615 #size-cells = <0>;
614 clocks = <&qspi1_clk>; 616 clocks = <&qspi1_clk>;
615 status = "disabled"; 617 status = "disabled";
616 }; 618 };
617 619
618 spi0: spi@f8000000 { 620 spi0: spi@f8000000 {
619 compatible = "atmel,at91rm9200-spi"; 621 compatible = "atmel,at91rm9200-spi";
620 reg = <0xf8000000 0x100>; 622 reg = <0xf8000000 0x100>;
621 clocks = <&spi0_clk>; 623 clocks = <&spi0_clk>;
622 clock-names = "spi_clk"; 624 clock-names = "spi_clk";
623 #address-cells = <1>; 625 #address-cells = <1>;
624 #size-cells = <0>; 626 #size-cells = <0>;
625 status = "disabled"; 627 status = "disabled";
626 }; 628 };
627 629
628 macb0: ethernet@f8008000 { 630 macb0: ethernet@f8008000 {
629 compatible = "cdns,macb"; 631 compatible = "cdns,macb";
630 reg = <0xf8008000 0x1000>; 632 reg = <0xf8008000 0x1000>;
631 #address-cells = <1>; 633 #address-cells = <1>;
632 #size-cells = <0>; 634 #size-cells = <0>;
633 clocks = <&macb0_clk>, <&macb0_clk>; 635 clocks = <&macb0_clk>, <&macb0_clk>;
634 clock-names = "hclk", "pclk"; 636 clock-names = "hclk", "pclk";
635 status = "disabled"; 637 status = "disabled";
636 }; 638 };
637 639
640 uart0: serial@f801c000 {
641 compatible = "atmel,at91sam9260-usart";
642 reg = <0xf801c000 0x100>;
643 clocks = <&uart0_clk>;
644 clock-names = "usart";
645 status = "disabled";
646 };
647
638 uart1: serial@f8020000 { 648 uart1: serial@f8020000 {
639 compatible = "atmel,at91sam9260-usart"; 649 compatible = "atmel,at91sam9260-usart";
640 reg = <0xf8020000 0x100>; 650 reg = <0xf8020000 0x100>;
641 clocks = <&uart1_clk>; 651 clocks = <&uart1_clk>;
652 clock-names = "usart";
653 status = "disabled";
654 };
655
656 uart2: serial@f8024000 {
657 compatible = "atmel,at91sam9260-usart";
658 reg = <0xf8024000 0x100>;
659 clocks = <&uart2_clk>;
642 clock-names = "usart"; 660 clock-names = "usart";
643 status = "disabled"; 661 status = "disabled";
644 }; 662 };
645 663
646 i2c0: i2c@f8028000 { 664 i2c0: i2c@f8028000 {
647 compatible = "atmel,sama5d2-i2c"; 665 compatible = "atmel,sama5d2-i2c";
648 reg = <0xf8028000 0x100>; 666 reg = <0xf8028000 0x100>;
649 #address-cells = <1>; 667 #address-cells = <1>;
650 #size-cells = <0>; 668 #size-cells = <0>;
651 clocks = <&twi0_clk>; 669 clocks = <&twi0_clk>;
652 status = "disabled"; 670 status = "disabled";
653 }; 671 };
654 672
655 rstc@f8048000 { 673 rstc@f8048000 {
656 compatible = "atmel,sama5d3-rstc"; 674 compatible = "atmel,sama5d3-rstc";
657 reg = <0xf8048000 0x10>; 675 reg = <0xf8048000 0x10>;
658 clocks = <&clk32k>; 676 clocks = <&clk32k>;
659 }; 677 };
660 678
661 shdwc@f8048010 { 679 shdwc@f8048010 {
662 compatible = "atmel,sama5d2-shdwc"; 680 compatible = "atmel,sama5d2-shdwc";
663 reg = <0xf8048010 0x10>; 681 reg = <0xf8048010 0x10>;
664 clocks = <&clk32k>; 682 clocks = <&clk32k>;
665 #address-cells = <1>; 683 #address-cells = <1>;
666 #size-cells = <0>; 684 #size-cells = <0>;
667 atmel,wakeup-rtc-timer; 685 atmel,wakeup-rtc-timer;
668 }; 686 };
669 687
670 pit: timer@f8048030 { 688 pit: timer@f8048030 {
671 compatible = "atmel,at91sam9260-pit"; 689 compatible = "atmel,at91sam9260-pit";
672 reg = <0xf8048030 0x10>; 690 reg = <0xf8048030 0x10>;
673 clocks = <&h32ck>; 691 clocks = <&h32ck>;
674 }; 692 };
675 693
676 watchdog@f8048040 { 694 watchdog@f8048040 {
677 compatible = "atmel,sama5d4-wdt"; 695 compatible = "atmel,sama5d4-wdt";
678 reg = <0xf8048040 0x10>; 696 reg = <0xf8048040 0x10>;
679 clocks = <&clk32k>; 697 clocks = <&clk32k>;
680 status = "disabled"; 698 status = "disabled";
681 }; 699 };
682 700
683 sfr: sfr@f8030000 { 701 sfr: sfr@f8030000 {
684 compatible = "atmel,sama5d2-sfr", "syscon"; 702 compatible = "atmel,sama5d2-sfr", "syscon";
685 reg = <0xf8030000 0x98>; 703 reg = <0xf8030000 0x98>;
686 }; 704 };
687 705
688 sckc@f8048050 { 706 sckc@f8048050 {
689 compatible = "atmel,at91sam9x5-sckc"; 707 compatible = "atmel,at91sam9x5-sckc";
690 reg = <0xf8048050 0x4>; 708 reg = <0xf8048050 0x4>;
691 709
692 slow_rc_osc: slow_rc_osc { 710 slow_rc_osc: slow_rc_osc {
693 compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; 711 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
694 #clock-cells = <0>; 712 #clock-cells = <0>;
695 clock-frequency = <32768>; 713 clock-frequency = <32768>;
696 clock-accuracy = <250000000>; 714 clock-accuracy = <250000000>;
697 atmel,startup-time-usec = <75>; 715 atmel,startup-time-usec = <75>;
698 }; 716 };
699 717
700 slow_osc: slow_osc { 718 slow_osc: slow_osc {
701 compatible = "atmel,at91sam9x5-clk-slow-osc"; 719 compatible = "atmel,at91sam9x5-clk-slow-osc";
702 #clock-cells = <0>; 720 #clock-cells = <0>;
703 clocks = <&slow_xtal>; 721 clocks = <&slow_xtal>;
704 atmel,startup-time-usec = <1200000>; 722 atmel,startup-time-usec = <1200000>;
705 }; 723 };
706 724
707 clk32k: slowck { 725 clk32k: slowck {
708 compatible = "atmel,at91sam9x5-clk-slow"; 726 compatible = "atmel,at91sam9x5-clk-slow";
709 #clock-cells = <0>; 727 #clock-cells = <0>;
710 clocks = <&slow_rc_osc &slow_osc>; 728 clocks = <&slow_rc_osc &slow_osc>;
711 }; 729 };
712 }; 730 };
713 731
714 spi1: spi@fc000000 { 732 spi1: spi@fc000000 {
715 compatible = "atmel,at91rm9200-spi"; 733 compatible = "atmel,at91rm9200-spi";
716 reg = <0xfc000000 0x100>; 734 reg = <0xfc000000 0x100>;
717 #address-cells = <1>; 735 #address-cells = <1>;
718 #size-cells = <0>; 736 #size-cells = <0>;
719 status = "disabled"; 737 status = "disabled";
720 }; 738 };
721 739
722 uart3: serial@fc008000 { 740 uart3: serial@fc008000 {
723 compatible = "atmel,at91sam9260-usart"; 741 compatible = "atmel,at91sam9260-usart";
724 reg = <0xfc008000 0x100>; 742 reg = <0xfc008000 0x100>;
725 clocks = <&uart3_clk>; 743 clocks = <&uart3_clk>;
726 clock-names = "usart"; 744 clock-names = "usart";
727 status = "disabled"; 745 status = "disabled";
728 }; 746 };
729 747
730 i2c1: i2c@fc028000 { 748 i2c1: i2c@fc028000 {
731 compatible = "atmel,sama5d2-i2c"; 749 compatible = "atmel,sama5d2-i2c";
732 reg = <0xfc028000 0x100>; 750 reg = <0xfc028000 0x100>;
733 #address-cells = <1>; 751 #address-cells = <1>;
734 #size-cells = <0>; 752 #size-cells = <0>;
735 clocks = <&twi1_clk>; 753 clocks = <&twi1_clk>;
736 status = "disabled"; 754 status = "disabled";
737 }; 755 };
738 756
739 pioA: gpio@fc038000 { 757 pioA: gpio@fc038000 {
740 compatible = "atmel,sama5d2-gpio"; 758 compatible = "atmel,sama5d2-gpio";
741 reg = <0xfc038000 0x600>; 759 reg = <0xfc038000 0x600>;
742 clocks = <&pioA_clk>; 760 clocks = <&pioA_clk>;
743 gpio-controller; 761 gpio-controller;
744 #gpio-cells = <2>; 762 #gpio-cells = <2>;
745 u-boot,dm-pre-reloc; 763 u-boot,dm-pre-reloc;
746 764
747 pinctrl { 765 pinctrl {
748 compatible = "atmel,sama5d2-pinctrl"; 766 compatible = "atmel,sama5d2-pinctrl";
749 u-boot,dm-pre-reloc; 767 u-boot,dm-pre-reloc;
750 }; 768 };
751 }; 769 };
752 }; 770 };
753 }; 771 };
754 }; 772 };
755 773
arch/arm/mach-at91/Kconfig
Diff comments   View file @ aaa4ba9
1 if ARCH_AT91 1 if ARCH_AT91
2 2
3 config AT91FAMILY 3 config AT91FAMILY
4 def_bool y 4 def_bool y
5 5
6 config AT91SAM9260 6 config AT91SAM9260
7 bool 7 bool
8 select CPU_ARM926EJS 8 select CPU_ARM926EJS
9 9
10 config AT91SAM9G20 10 config AT91SAM9G20
11 bool 11 bool
12 select CPU_ARM926EJS 12 select CPU_ARM926EJS
13 13
14 config AT91SAM9XE 14 config AT91SAM9XE
15 bool 15 bool
16 select CPU_ARM926EJS 16 select CPU_ARM926EJS
17 17
18 config AT91SAM9261 18 config AT91SAM9261
19 bool 19 bool
20 select CPU_ARM926EJS 20 select CPU_ARM926EJS
21 21
22 config AT91SAM9263 22 config AT91SAM9263
23 bool 23 bool
24 select CPU_ARM926EJS 24 select CPU_ARM926EJS
25 25
26 config AT91SAM9G45 26 config AT91SAM9G45
27 bool 27 bool
28 select CPU_ARM926EJS 28 select CPU_ARM926EJS
29 29
30 config AT91SAM9M10G45 30 config AT91SAM9M10G45
31 bool 31 bool
32 select CPU_ARM926EJS 32 select CPU_ARM926EJS
33 33
34 config AT91SAM9N12 34 config AT91SAM9N12
35 bool 35 bool
36 select CPU_ARM926EJS 36 select CPU_ARM926EJS
37 37
38 config AT91SAM9RL 38 config AT91SAM9RL
39 bool 39 bool
40 select CPU_ARM926EJS 40 select CPU_ARM926EJS
41 41
42 config AT91SAM9X5 42 config AT91SAM9X5
43 bool 43 bool
44 select CPU_ARM926EJS 44 select CPU_ARM926EJS
45 45
46 config SAMA5D2 46 config SAMA5D2
47 bool 47 bool
48 select CPU_V7 48 select CPU_V7
49 49
50 config SAMA5D3 50 config SAMA5D3
51 bool 51 bool
52 select CPU_V7 52 select CPU_V7
53 53
54 config SAMA5D4 54 config SAMA5D4
55 bool 55 bool
56 select CPU_V7 56 select CPU_V7
57 57
58 choice 58 choice
59 prompt "Atmel AT91 board select" 59 prompt "Atmel AT91 board select"
60 optional 60 optional
61 61
62 config TARGET_AT91RM9200EK 62 config TARGET_AT91RM9200EK
63 bool "Atmel AT91RM9200 evaluation kit" 63 bool "Atmel AT91RM9200 evaluation kit"
64 select CPU_ARM920T 64 select CPU_ARM920T
65 65
66 config TARGET_AT91SAM9260EK 66 config TARGET_AT91SAM9260EK
67 bool "Atmel at91sam9260 reference board" 67 bool "Atmel at91sam9260 reference board"
68 select AT91SAM9260 68 select AT91SAM9260
69 select BOARD_EARLY_INIT_F 69 select BOARD_EARLY_INIT_F
70 70
71 config TARGET_ETHERNUT5 71 config TARGET_ETHERNUT5
72 bool "Ethernut5 board" 72 bool "Ethernut5 board"
73 select AT91SAM9XE 73 select AT91SAM9XE
74 74
75 config TARGET_SNAPPER9260 75 config TARGET_SNAPPER9260
76 bool "Support snapper9260" 76 bool "Support snapper9260"
77 select AT91SAM9260 77 select AT91SAM9260
78 select DM 78 select DM
79 select DM_SERIAL 79 select DM_SERIAL
80 select DM_GPIO 80 select DM_GPIO
81 81
82 config TARGET_GURNARD 82 config TARGET_GURNARD
83 bool "Support gurnard" 83 bool "Support gurnard"
84 select AT91SAM9G45 84 select AT91SAM9G45
85 select BOARD_LATE_INIT 85 select BOARD_LATE_INIT
86 select DM 86 select DM
87 select DM_SERIAL 87 select DM_SERIAL
88 select DM_GPIO 88 select DM_GPIO
89 select DM_ETH 89 select DM_ETH
90 90
91 config TARGET_AT91SAM9261EK 91 config TARGET_AT91SAM9261EK
92 bool "Atmel at91sam9261 reference board" 92 bool "Atmel at91sam9261 reference board"
93 select AT91SAM9261 93 select AT91SAM9261
94 select BOARD_EARLY_INIT_F 94 select BOARD_EARLY_INIT_F
95 95
96 config TARGET_PM9261 96 config TARGET_PM9261
97 bool "Ronetix pm9261 board" 97 bool "Ronetix pm9261 board"
98 select AT91SAM9261 98 select AT91SAM9261
99 99
100 config TARGET_AT91SAM9263EK 100 config TARGET_AT91SAM9263EK
101 bool "Atmel at91sam9263 reference board" 101 bool "Atmel at91sam9263 reference board"
102 select AT91SAM9263 102 select AT91SAM9263
103 select BOARD_EARLY_INIT_F 103 select BOARD_EARLY_INIT_F
104 104
105 config TARGET_USB_A9263 105 config TARGET_USB_A9263
106 bool "Caloa USB A9260 board" 106 bool "Caloa USB A9260 board"
107 select AT91SAM9263 107 select AT91SAM9263
108 108
109 config TARGET_PM9263 109 config TARGET_PM9263
110 bool "Ronetix pm9263 board" 110 bool "Ronetix pm9263 board"
111 select AT91SAM9263 111 select AT91SAM9263
112 112
113 config TARGET_AT91SAM9M10G45EK 113 config TARGET_AT91SAM9M10G45EK
114 bool "Atmel AT91SAM9M10G45-EK board" 114 bool "Atmel AT91SAM9M10G45-EK board"
115 select AT91SAM9M10G45 115 select AT91SAM9M10G45
116 select SUPPORT_SPL 116 select SUPPORT_SPL
117 select BOARD_EARLY_INIT_F 117 select BOARD_EARLY_INIT_F
118 118
119 config TARGET_PM9G45 119 config TARGET_PM9G45
120 bool "Ronetix pm9g45 board" 120 bool "Ronetix pm9g45 board"
121 select AT91SAM9G45 121 select AT91SAM9G45
122 122
123 config TARGET_PICOSAM9G45 123 config TARGET_PICOSAM9G45
124 bool "Mini-box picosam9g45 board" 124 bool "Mini-box picosam9g45 board"
125 select AT91SAM9M10G45 125 select AT91SAM9M10G45
126 select SUPPORT_SPL 126 select SUPPORT_SPL
127 127
128 config TARGET_AT91SAM9N12EK 128 config TARGET_AT91SAM9N12EK
129 bool "Atmel AT91SAM9N12-EK board" 129 bool "Atmel AT91SAM9N12-EK board"
130 select AT91SAM9N12 130 select AT91SAM9N12
131 select SUPPORT_SPL 131 select SUPPORT_SPL
132 select BOARD_EARLY_INIT_F 132 select BOARD_EARLY_INIT_F
133 133
134 config TARGET_AT91SAM9RLEK 134 config TARGET_AT91SAM9RLEK
135 bool "Atmel at91sam9rl reference board" 135 bool "Atmel at91sam9rl reference board"
136 select AT91SAM9RL 136 select AT91SAM9RL
137 select BOARD_EARLY_INIT_F 137 select BOARD_EARLY_INIT_F
138 138
139 config TARGET_AT91SAM9X5EK 139 config TARGET_AT91SAM9X5EK
140 bool "Atmel AT91SAM9X5-EK board" 140 bool "Atmel AT91SAM9X5-EK board"
141 select AT91SAM9X5 141 select AT91SAM9X5
142 select SUPPORT_SPL 142 select SUPPORT_SPL
143 select BOARD_EARLY_INIT_F 143 select BOARD_EARLY_INIT_F
144 select BOARD_LATE_INIT 144 select BOARD_LATE_INIT
145 145
146 config TARGET_SAMA5D2_PTC 146 config TARGET_SAMA5D2_PTC_EK
147 bool "SAMA5D2 PTC board" 147 bool "SAMA5D2 PTC EK board"
148 select SAMA5D2 148 select SAMA5D2
149 select SUPPORT_SPL
150 select BOARD_EARLY_INIT_F 149 select BOARD_EARLY_INIT_F
151 150
152 config TARGET_SAMA5D2_XPLAINED 151 config TARGET_SAMA5D2_XPLAINED
153 bool "SAMA5D2 Xplained board" 152 bool "SAMA5D2 Xplained board"
154 select SAMA5D2 153 select SAMA5D2
155 select SUPPORT_SPL 154 select SUPPORT_SPL
156 select BOARD_EARLY_INIT_F 155 select BOARD_EARLY_INIT_F
157 select BOARD_LATE_INIT 156 select BOARD_LATE_INIT
158 157
159 config TARGET_SAMA5D27_SOM1_EK 158 config TARGET_SAMA5D27_SOM1_EK
160 bool "SAMA5D27 SOM1 EK board" 159 bool "SAMA5D27 SOM1 EK board"
161 select CPU_V7 160 select CPU_V7
162 select SUPPORT_SPL 161 select SUPPORT_SPL
163 select BOARD_EARLY_INIT_F 162 select BOARD_EARLY_INIT_F
164 select BOARD_LATE_INIT 163 select BOARD_LATE_INIT
165 help 164 help
166 The SAMA5D27 SOM1 embeds SAMA5D2 SiP(System in Package), 165 The SAMA5D27 SOM1 embeds SAMA5D2 SiP(System in Package),
167 a 64Mbit QSPI flash, KSZ8081 Phy and a Mac-address EEPROM 166 a 64Mbit QSPI flash, KSZ8081 Phy and a Mac-address EEPROM
168 24AA02E48. The SAMA5D2 SiP integrates the ARM Cortex-A5 167 24AA02E48. The SAMA5D2 SiP integrates the ARM Cortex-A5
169 processor-based SAMA5D2 MPU with up to 1 Gbit DDR2-SDRAM 168 processor-based SAMA5D2 MPU with up to 1 Gbit DDR2-SDRAM
170 in a single package. 169 in a single package.
171 170
172 config TARGET_SAMA5D3_XPLAINED 171 config TARGET_SAMA5D3_XPLAINED
173 bool "SAMA5D3 Xplained board" 172 bool "SAMA5D3 Xplained board"
174 select SAMA5D3 173 select SAMA5D3
175 select SUPPORT_SPL 174 select SUPPORT_SPL
176 select BOARD_EARLY_INIT_F 175 select BOARD_EARLY_INIT_F
177 176
178 config TARGET_SAMA5D3XEK 177 config TARGET_SAMA5D3XEK
179 bool "SAMA5D3X-EK board" 178 bool "SAMA5D3X-EK board"
180 select SAMA5D3 179 select SAMA5D3
181 select BOARD_LATE_INIT 180 select BOARD_LATE_INIT
182 select SUPPORT_SPL 181 select SUPPORT_SPL
183 select BOARD_EARLY_INIT_F 182 select BOARD_EARLY_INIT_F
184 183
185 config TARGET_SAMA5D4_XPLAINED 184 config TARGET_SAMA5D4_XPLAINED
186 bool "SAMA5D4 Xplained board" 185 bool "SAMA5D4 Xplained board"
187 select SAMA5D4 186 select SAMA5D4
188 select SUPPORT_SPL 187 select SUPPORT_SPL
189 select BOARD_EARLY_INIT_F 188 select BOARD_EARLY_INIT_F
190 select BOARD_LATE_INIT 189 select BOARD_LATE_INIT
191 190
192 config TARGET_SAMA5D4EK 191 config TARGET_SAMA5D4EK
193 bool "SAMA5D4 Evaluation Kit" 192 bool "SAMA5D4 Evaluation Kit"
194 select SAMA5D4 193 select SAMA5D4
195 select SUPPORT_SPL 194 select SUPPORT_SPL
196 select BOARD_EARLY_INIT_F 195 select BOARD_EARLY_INIT_F
197 select BOARD_LATE_INIT 196 select BOARD_LATE_INIT
198 197
199 config TARGET_MA5D4EVK 198 config TARGET_MA5D4EVK
200 bool "Aries MA5D4EVK Evaluation Kit" 199 bool "Aries MA5D4EVK Evaluation Kit"
201 select SAMA5D4 200 select SAMA5D4
202 select SUPPORT_SPL 201 select SUPPORT_SPL
203 202
204 config TARGET_MEESC 203 config TARGET_MEESC
205 bool "Support meesc" 204 bool "Support meesc"
206 select AT91SAM9263 205 select AT91SAM9263
207 206
208 config TARGET_CORVUS 207 config TARGET_CORVUS
209 bool "Support corvus" 208 bool "Support corvus"
210 select AT91SAM9M10G45 209 select AT91SAM9M10G45
211 select SUPPORT_SPL 210 select SUPPORT_SPL
212 select DM 211 select DM
213 select DM_SERIAL 212 select DM_SERIAL
214 select DM_GPIO 213 select DM_GPIO
215 select DM_ETH 214 select DM_ETH
216 215
217 config TARGET_TAURUS 216 config TARGET_TAURUS
218 bool "Support taurus" 217 bool "Support taurus"
219 select AT91SAM9G20 218 select AT91SAM9G20
220 select SUPPORT_SPL 219 select SUPPORT_SPL
221 select DM 220 select DM
222 select DM_SERIAL 221 select DM_SERIAL
223 select DM_GPIO 222 select DM_GPIO
224 select DM_ETH 223 select DM_ETH
225 224
226 config TARGET_SMARTWEB 225 config TARGET_SMARTWEB
227 bool "Support smartweb" 226 bool "Support smartweb"
228 select AT91SAM9260 227 select AT91SAM9260
229 select SUPPORT_SPL 228 select SUPPORT_SPL
230 select DM 229 select DM
231 select DM_SERIAL 230 select DM_SERIAL
232 select DM_GPIO 231 select DM_GPIO
233 select DM_ETH 232 select DM_ETH
234 233
235 config TARGET_VINCO 234 config TARGET_VINCO
236 bool "Support VINCO" 235 bool "Support VINCO"
237 select SAMA5D4 236 select SAMA5D4
238 select SUPPORT_SPL 237 select SUPPORT_SPL
239 238
240 endchoice 239 endchoice
241 240
242 config SYS_SOC 241 config SYS_SOC
243 default "at91" 242 default "at91"
244 243
245 source "board/aries/ma5d4evk/Kconfig" 244 source "board/aries/ma5d4evk/Kconfig"
246 source "board/atmel/at91rm9200ek/Kconfig" 245 source "board/atmel/at91rm9200ek/Kconfig"
247 source "board/atmel/at91sam9260ek/Kconfig" 246 source "board/atmel/at91sam9260ek/Kconfig"
248 source "board/atmel/at91sam9261ek/Kconfig" 247 source "board/atmel/at91sam9261ek/Kconfig"
249 source "board/atmel/at91sam9263ek/Kconfig" 248 source "board/atmel/at91sam9263ek/Kconfig"
250 source "board/atmel/at91sam9m10g45ek/Kconfig" 249 source "board/atmel/at91sam9m10g45ek/Kconfig"
251 source "board/atmel/at91sam9n12ek/Kconfig" 250 source "board/atmel/at91sam9n12ek/Kconfig"
252 source "board/atmel/at91sam9rlek/Kconfig" 251 source "board/atmel/at91sam9rlek/Kconfig"
253 source "board/atmel/at91sam9x5ek/Kconfig" 252 source "board/atmel/at91sam9x5ek/Kconfig"
254 source "board/atmel/sama5d2_ptc/Kconfig" 253 source "board/atmel/sama5d2_ptc_ek/Kconfig"
255 source "board/atmel/sama5d2_xplained/Kconfig" 254 source "board/atmel/sama5d2_xplained/Kconfig"
256 source "board/atmel/sama5d27_som1_ek/Kconfig" 255 source "board/atmel/sama5d27_som1_ek/Kconfig"
257 source "board/atmel/sama5d3_xplained/Kconfig" 256 source "board/atmel/sama5d3_xplained/Kconfig"
258 source "board/atmel/sama5d3xek/Kconfig" 257 source "board/atmel/sama5d3xek/Kconfig"
259 source "board/atmel/sama5d4_xplained/Kconfig" 258 source "board/atmel/sama5d4_xplained/Kconfig"
260 source "board/atmel/sama5d4ek/Kconfig" 259 source "board/atmel/sama5d4ek/Kconfig"
261 source "board/bluewater/gurnard/Kconfig" 260 source "board/bluewater/gurnard/Kconfig"
262 source "board/bluewater/snapper9260/Kconfig" 261 source "board/bluewater/snapper9260/Kconfig"
263 source "board/calao/usb_a9263/Kconfig" 262 source "board/calao/usb_a9263/Kconfig"
264 source "board/egnite/ethernut5/Kconfig" 263 source "board/egnite/ethernut5/Kconfig"
265 source "board/esd/meesc/Kconfig" 264 source "board/esd/meesc/Kconfig"
266 source "board/l+g/vinco/Kconfig" 265 source "board/l+g/vinco/Kconfig"
267 source "board/mini-box/picosam9g45/Kconfig" 266 source "board/mini-box/picosam9g45/Kconfig"
268 source "board/ronetix/pm9261/Kconfig" 267 source "board/ronetix/pm9261/Kconfig"
269 source "board/ronetix/pm9263/Kconfig" 268 source "board/ronetix/pm9263/Kconfig"
270 source "board/ronetix/pm9g45/Kconfig" 269 source "board/ronetix/pm9g45/Kconfig"
271 source "board/siemens/corvus/Kconfig" 270 source "board/siemens/corvus/Kconfig"
272 source "board/siemens/taurus/Kconfig" 271 source "board/siemens/taurus/Kconfig"
273 source "board/siemens/smartweb/Kconfig" 272 source "board/siemens/smartweb/Kconfig"
274 273
275 config SPL_LDSCRIPT 274 config SPL_LDSCRIPT
276 default "arch/arm/mach-at91/arm926ejs/u-boot-spl.lds" if CPU_ARM926EJS 275 default "arch/arm/mach-at91/arm926ejs/u-boot-spl.lds" if CPU_ARM926EJS
277 default "arch/arm/mach-at91/armv7/u-boot-spl.lds" if CPU_V7 276 default "arch/arm/mach-at91/armv7/u-boot-spl.lds" if CPU_V7
278 277
279 endif 278 endif
280 279
board/atmel/sama5d2_ptc/Kconfig
View file @ aaa4ba9
1 if TARGET_SAMA5D2_PTC File was deleted
2
3 config SYS_BOARD
4 default "sama5d2_ptc"
5
6 config SYS_VENDOR
7 default "atmel"
8
9 config SYS_SOC
10 default "at91"
11
12 config SYS_CONFIG_NAME
13 default "sama5d2_ptc"
14
15 endif
16 1 if TARGET_SAMA5D2_PTC
board/atmel/sama5d2_ptc/MAINTAINERS
View file @ aaa4ba9
1 SAMA5D2 PTC Engineering BOARD File was deleted
2 M: Wenyou Yang <wenyou.yang@atmel.com>
3 S: Maintained
4 F: board/atmel/sama5d2_ptc/
5 F: include/configs/sama5d2_ptc.h
6 F: configs/sama5d2_ptc_spiflash_defconfig
7 F: configs/sama5d2_ptc_nandflash_defconfig
8 1 SAMA5D2 PTC Engineering BOARD
board/atmel/sama5d2_ptc/Makefile
View file @ aaa4ba9
1 # File was deleted
2 # Copyright (C) 2016 Atmel
3 # Wenyou Yang <wenyou.yang@atmel.com>
4 #
5 # SPDX-License-Identifier: GPL-2.0+
6 #
7
8 obj-y += sama5d2_ptc.o
9 1 #
board/atmel/sama5d2_ptc/sama5d2_ptc.c
View file @ aaa4ba9
1 /* File was deleted
2 * Copyright (C) 2016 Atmel
3 * Wenyou.Yang <wenyou.yang@atmel.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #include <common.h>
9 #include <atmel_hlcdc.h>
10 #include <lcd.h>
11 #include <mmc.h>
12 #include <net.h>
13 #include <netdev.h>
14 #include <spi.h>
15 #include <version.h>
16 #include <asm/io.h>
17 #include <asm/arch/at91_common.h>
18 #include <asm/arch/atmel_pio4.h>
19 #include <asm/arch/atmel_mpddrc.h>
20 #include <asm/arch/atmel_usba_udc.h>
21 #include <asm/arch/atmel_sdhci.h>
22 #include <asm/arch/clk.h>
23 #include <asm/arch/gpio.h>
24 #include <asm/arch/sama5_sfr.h>
25 #include <asm/arch/sama5d2.h>
26 #include <asm/arch/sama5d3_smc.h>
27
28 DECLARE_GLOBAL_DATA_PTR;
29
30 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
31 {
32 return bus == 0 && cs == 0;
33 }
34
35 void spi_cs_activate(struct spi_slave *slave)
36 {
37 atmel_pio4_set_pio_output(AT91_PIO_PORTA, 17, 0);
38 }
39
40 void spi_cs_deactivate(struct spi_slave *slave)
41 {
42 atmel_pio4_set_pio_output(AT91_PIO_PORTA, 17, 1);
43 }
44
45 static void board_spi0_hw_init(void)
46 {
47 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 14, 0);
48 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 15, 0);
49 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 16, 0);
50
51 atmel_pio4_set_pio_output(AT91_PIO_PORTA, 17, 1);
52
53 at91_periph_clk_enable(ATMEL_ID_SPI0);
54 }
55
56 static void board_nand_hw_init(void)
57 {
58 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
59 struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
60
61 at91_periph_clk_enable(ATMEL_ID_HSMC);
62
63 writel(AT91_SFR_EBICFG_DRIVE0_HIGH |
64 AT91_SFR_EBICFG_PULL0_NONE |
65 AT91_SFR_EBICFG_DRIVE1_HIGH |
66 AT91_SFR_EBICFG_PULL1_NONE, &sfr->ebicfg);
67
68 /* Configure SMC CS3 for NAND */
69 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
70 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1),
71 &smc->cs[3].setup);
72 writel(AT91_SMC_PULSE_NWE(2) | AT91_SMC_PULSE_NCS_WR(3) |
73 AT91_SMC_PULSE_NRD(2) | AT91_SMC_PULSE_NCS_RD(3),
74 &smc->cs[3].pulse);
75 writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
76 &smc->cs[3].cycle);
77 writel(AT91_SMC_TIMINGS_TCLR(2) | AT91_SMC_TIMINGS_TADL(7) |
78 AT91_SMC_TIMINGS_TAR(2) | AT91_SMC_TIMINGS_TRR(3) |
79 AT91_SMC_TIMINGS_TWB(7) | AT91_SMC_TIMINGS_RBNSEL(3) |
80 AT91_SMC_TIMINGS_NFSEL(1), &smc->cs[3].timings);
81 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
82 AT91_SMC_MODE_EXNW_DISABLE |
83 AT91_SMC_MODE_DBW_8 |
84 AT91_SMC_MODE_TDF_CYCLE(3),
85 &smc->cs[3].mode);
86
87 atmel_pio4_set_f_periph(AT91_PIO_PORTA, 0, 0); /* D0 */
88 atmel_pio4_set_f_periph(AT91_PIO_PORTA, 1, 0); /* D1 */
89 atmel_pio4_set_f_periph(AT91_PIO_PORTA, 2, 0); /* D2 */
90 atmel_pio4_set_f_periph(AT91_PIO_PORTA, 3, 0); /* D3 */
91 atmel_pio4_set_f_periph(AT91_PIO_PORTA, 4, 0); /* D4 */
92 atmel_pio4_set_f_periph(AT91_PIO_PORTA, 5, 0); /* D5 */
93 atmel_pio4_set_f_periph(AT91_PIO_PORTA, 6, 0); /* D6 */
94 atmel_pio4_set_f_periph(AT91_PIO_PORTA, 7, 0); /* D7 */
95 atmel_pio4_set_f_periph(AT91_PIO_PORTA, 12, 0); /* RE */
96 atmel_pio4_set_f_periph(AT91_PIO_PORTA, 8, 0); /* WE */
97 atmel_pio4_set_f_periph(AT91_PIO_PORTA, 9, 1); /* NCS */
98 atmel_pio4_set_f_periph(AT91_PIO_PORTA, 21, 1); /* RDY */
99 atmel_pio4_set_f_periph(AT91_PIO_PORTA, 10, 1); /* ALE */
100 atmel_pio4_set_f_periph(AT91_PIO_PORTA, 11, 1); /* CLE */
101 }
102
103 static void board_usb_hw_init(void)
104 {
105 atmel_pio4_set_pio_output(AT91_PIO_PORTA, 28, 1);
106 }
107
108 static void board_gmac_hw_init(void)
109 {
110 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 14, 0); /* GTXCK */
111 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 15, 0); /* GTXEN */
112 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 16, 0); /* GRXDV */
113 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 17, 0); /* GRXER */
114 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 18, 0); /* GRX0 */
115 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 19, 0); /* GRX1 */
116 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 20, 0); /* GTX0 */
117 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 21, 0); /* GTX1 */
118 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 22, 0); /* GMDC */
119 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 23, 0); /* GMDIO */
120
121 at91_periph_clk_enable(ATMEL_ID_GMAC);
122 }
123
124 static void board_uart0_hw_init(void)
125 {
126 atmel_pio4_set_c_periph(AT91_PIO_PORTB, 26, 1); /* URXD0 */
127 atmel_pio4_set_c_periph(AT91_PIO_PORTB, 27, 0); /* UTXD0 */
128
129 at91_periph_clk_enable(CONFIG_USART_ID);
130 }
131
132 int board_early_init_f(void)
133 {
134 at91_periph_clk_enable(ATMEL_ID_PIOA);
135 at91_periph_clk_enable(ATMEL_ID_PIOB);
136 at91_periph_clk_enable(ATMEL_ID_PIOC);
137 at91_periph_clk_enable(ATMEL_ID_PIOD);
138
139 board_uart0_hw_init();
140
141 return 0;
142 }
143
144 int board_init(void)
145 {
146 /* address of boot parameters */
147 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
148
149 #ifdef CONFIG_ATMEL_SPI
150 board_spi0_hw_init();
151 #endif
152 #ifdef CONFIG_NAND_ATMEL
153 board_nand_hw_init();
154 #endif
155 #ifdef CONFIG_MACB
156 board_gmac_hw_init();
157 #endif
158 #ifdef CONFIG_CMD_USB
159 board_usb_hw_init();
160 #endif
161 #ifdef CONFIG_USB_GADGET_ATMEL_USBA
162 at91_udp_hw_init();
163 #endif
164
165 return 0;
166 }
167
168 int dram_init(void)
169 {
170 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
171 CONFIG_SYS_SDRAM_SIZE);
172 return 0;
173 }
174
175 int board_eth_init(bd_t *bis)
176 {
177 int rc = 0;
178
179 #ifdef CONFIG_MACB
180 rc = macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC, 0x00);
181 if (rc)
182 printf("GMAC register failed\n");
183 #endif
184
185 #ifdef CONFIG_USB_GADGET_ATMEL_USBA
186 usba_udc_probe(&pdata);
187 #ifdef CONFIG_USB_ETH_RNDIS
188 usb_eth_initialize(bis);
189 #endif
190 #endif
191
192 return rc;
193 }
194
195 /* SPL */
196 #ifdef CONFIG_SPL_BUILD
197 void spl_board_init(void)
198 {
199 #ifdef CONFIG_SPI_BOOT
200 board_spi0_hw_init();
201 #endif
202
203 #ifdef CONFIG_NAND_BOOT
204 board_nand_hw_init();
205 #endif
206 }
207
208 static void ddrc_conf(struct atmel_mpddrc_config *ddrc)
209 {
210 ddrc->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR3_SDRAM);
211
212 ddrc->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
213 ATMEL_MPDDRC_CR_NR_ROW_14 |
214 ATMEL_MPDDRC_CR_CAS_DDR_CAS5 |
215 ATMEL_MPDDRC_CR_DIC_DS |
216 ATMEL_MPDDRC_CR_DIS_DLL |
217 ATMEL_MPDDRC_CR_NB_8BANKS |
218 ATMEL_MPDDRC_CR_DECOD_INTERLEAVED |
219 ATMEL_MPDDRC_CR_UNAL_SUPPORTED);
220
221 ddrc->rtr = 0x511;
222
223 ddrc->tpr0 = ((6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET) |
224 (3 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET) |
225 (4 << ATMEL_MPDDRC_TPR0_TWR_OFFSET) |
226 (9 << ATMEL_MPDDRC_TPR0_TRC_OFFSET) |
227 (3 << ATMEL_MPDDRC_TPR0_TRP_OFFSET) |
228 (4 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET) |
229 (4 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET) |
230 (4 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET));
231
232 ddrc->tpr1 = ((27 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET) |
233 (29 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET) |
234 (0 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET) |
235 (3 << ATMEL_MPDDRC_TPR1_TXP_OFFSET));
236
237 ddrc->tpr2 = ((0 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET) |
238 (0 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET) |
239 (0 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET) |
240 (4 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET) |
241 (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET));
242 }
243
244 void mem_init(void)
245 {
246 struct atmel_mpddr *mpddrc = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;
247 struct atmel_mpddrc_config ddrc_config;
248 u32 reg;
249
250 ddrc_conf(&ddrc_config);
251
252 at91_periph_clk_enable(ATMEL_ID_MPDDRC);
253 at91_system_clk_enable(AT91_PMC_DDR);
254
255 reg = readl(&mpddrc->io_calibr);
256 reg &= ~ATMEL_MPDDRC_IO_CALIBR_RDIV;
257 reg |= ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_55;
258 reg &= ~ATMEL_MPDDRC_IO_CALIBR_TZQIO;
259 reg |= ATMEL_MPDDRC_IO_CALIBR_TZQIO_(100);
260 writel(reg, &mpddrc->io_calibr);
261
262 writel(ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_TWO_CYCLE,
263 &mpddrc->rd_data_path);
264
265 ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config);
266
267 writel(0x3, &mpddrc->cal_mr4);
268 writel(64, &mpddrc->tim_cal);
269 }
270
271 void at91_pmc_init(void)
272 {
273 at91_plla_init(AT91_PMC_PLLAR_29 |
274 AT91_PMC_PLLXR_PLLCOUNT(0x3f) |
275 AT91_PMC_PLLXR_MUL(82) |
276 AT91_PMC_PLLXR_DIV(1));
277
278 at91_pllicpr_init(0);
279
280 at91_mck_init(AT91_PMC_MCKR_H32MXDIV |
281 AT91_PMC_MCKR_PLLADIV_2 |
282 AT91_PMC_MCKR_MDIV_3 |
283 AT91_PMC_MCKR_CSS_PLLA);
284 }
285 #endif
286 1 /*
board/atmel/sama5d2_ptc_ek/Kconfig
Diff comments   View file @ aaa4ba9
File was created 1 if TARGET_SAMA5D2_PTC_EK
2
3 config SYS_BOARD
4 default "sama5d2_ptc_ek"
5
6 config SYS_VENDOR
7 default "atmel"
8
9 config SYS_SOC
10 default "at91"
11
12 config SYS_CONFIG_NAME
13 default "sama5d2_ptc_ek"
14
15 endif
16
board/atmel/sama5d2_ptc_ek/MAINTAINERS
Diff comments   View file @ aaa4ba9
File was created 1 SAMA5D2 PTC EK BOARD
2 M: Wenyou Yang <wenyou.yang@microchip.com>
3 M: Ludovic Desroches <ludovic.desroches@microchip.com>
4 S: Maintained
5 F: board/atmel/sama5d2_ptc_ek/
6 F: include/configs/sama5d2_ptc_ek.h
7 F: configs/sama5d2_ptc_ek_mmc_defconfig
8 F: configs/sama5d2_ptc_ek_nandflash_defconfig
9
board/atmel/sama5d2_ptc_ek/Makefile
Diff comments   View file @ aaa4ba9
File was created 1 #
2 # Copyright (C) 2017 Microchip Corporation
3 # Wenyou Yang <wenyou.yang@microchip.com>
4 #
5 # SPDX-License-Identifier: GPL-2.0+
6 #
7
8 obj-y += sama5d2_ptc_ek.o
9
board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
Diff comments   View file @ aaa4ba9
File was created 1 /*
2 * Copyright (C) 2017 Microchip Corporation
3 * Wenyou Yang <wenyou.yang@microchip.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #include <common.h>
9 #include <debug_uart.h>
10 #include <dm.h>
11 #include <i2c.h>
12 #include <nand.h>
13 #include <version.h>
14 #include <asm/io.h>
15 #include <asm/arch/at91_common.h>
16 #include <asm/arch/atmel_pio4.h>
17 #include <asm/arch/atmel_mpddrc.h>
18 #include <asm/arch/atmel_sdhci.h>
19 #include <asm/arch/clk.h>
20 #include <asm/arch/gpio.h>
21 #include <asm/arch/sama5d2.h>
22 #include <asm/arch/sama5d2_smc.h>
23
24 DECLARE_GLOBAL_DATA_PTR;
25
26 #ifdef CONFIG_NAND_ATMEL
27 static void board_nand_hw_init(void)
28 {
29 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
30
31 at91_periph_clk_enable(ATMEL_ID_HSMC);
32
33 /* Configure SMC CS3 for NAND */
34 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
35 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1),
36 &smc->cs[3].setup);
37 writel(AT91_SMC_PULSE_NWE(2) | AT91_SMC_PULSE_NCS_WR(3) |
38 AT91_SMC_PULSE_NRD(2) | AT91_SMC_PULSE_NCS_RD(3),
39 &smc->cs[3].pulse);
40 writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
41 &smc->cs[3].cycle);
42 writel(AT91_SMC_TIMINGS_TCLR(2) | AT91_SMC_TIMINGS_TADL(7) |
43 AT91_SMC_TIMINGS_TAR(2) | AT91_SMC_TIMINGS_TRR(3) |
44 AT91_SMC_TIMINGS_TWB(7) | AT91_SMC_TIMINGS_RBNSEL(3) |
45 AT91_SMC_TIMINGS_NFSEL(1), &smc->cs[3].timings);
46 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
47 AT91_SMC_MODE_EXNW_DISABLE |
48 AT91_SMC_MODE_DBW_8 |
49 AT91_SMC_MODE_TDF_CYCLE(3),
50 &smc->cs[3].mode);
51
52 atmel_pio4_set_b_periph(AT91_PIO_PORTA, 22, 0); /* D0 */
53 atmel_pio4_set_b_periph(AT91_PIO_PORTA, 23, 0); /* D1 */
54 atmel_pio4_set_b_periph(AT91_PIO_PORTA, 24, 0); /* D2 */
55 atmel_pio4_set_b_periph(AT91_PIO_PORTA, 25, 0); /* D3 */
56 atmel_pio4_set_b_periph(AT91_PIO_PORTA, 26, 0); /* D4 */
57 atmel_pio4_set_b_periph(AT91_PIO_PORTA, 27, 0); /* D5 */
58 atmel_pio4_set_b_periph(AT91_PIO_PORTA, 28, 0); /* D6 */
59 atmel_pio4_set_b_periph(AT91_PIO_PORTA, 29, 0); /* D7 */
60 atmel_pio4_set_b_periph(AT91_PIO_PORTB, 2, 0); /* RE */
61 atmel_pio4_set_b_periph(AT91_PIO_PORTA, 30, 0); /* WE */
62 atmel_pio4_set_b_periph(AT91_PIO_PORTA, 31, 1); /* NCS */
63 atmel_pio4_set_b_periph(AT91_PIO_PORTC, 8, 1); /* RDY */
64 atmel_pio4_set_b_periph(AT91_PIO_PORTB, 0, 1); /* ALE */
65 atmel_pio4_set_b_periph(AT91_PIO_PORTB, 1, 1); /* CLE */
66 }
67 #endif
68
69 static void board_usb_hw_init(void)
70 {
71 atmel_pio4_set_pio_output(AT91_PIO_PORTB, 12, 1);
72 }
73
74 #ifdef CONFIG_DEBUG_UART_BOARD_INIT
75 static void board_uart0_hw_init(void)
76 {
77 atmel_pio4_set_c_periph(AT91_PIO_PORTB, 26, 1); /* URXD0 */
78 atmel_pio4_set_c_periph(AT91_PIO_PORTB, 27, 0); /* UTXD0 */
79
80 at91_periph_clk_enable(ATMEL_ID_UART0);
81 }
82
83 void board_debug_uart_init(void)
84 {
85 board_uart0_hw_init();
86 }
87 #endif
88
89 #ifdef CONFIG_BOARD_EARLY_INIT_F
90 int board_early_init_f(void)
91 {
92 #ifdef CONFIG_DEBUG_UART
93 debug_uart_init();
94 #endif
95 return 0;
96 }
97 #endif
98
99 int board_init(void)
100 {
101 /* address of boot parameters */
102 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
103
104 #ifdef CONFIG_NAND_ATMEL
105 board_nand_hw_init();
106 #endif
107 #ifdef CONFIG_CMD_USB
108 board_usb_hw_init();
109 #endif
110 return 0;
111 }
112
113 int dram_init(void)
114 {
115 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
116 CONFIG_SYS_SDRAM_SIZE);
117 return 0;
118 }
119
120 #define AT24MAC_MAC_OFFSET 0xfa
121
122 #ifdef CONFIG_MISC_INIT_R
123 int misc_init_r(void)
124 {
125 #ifdef CONFIG_I2C_EEPROM
126 at91_set_ethaddr(AT24MAC_MAC_OFFSET);
127 #endif
128 return 0;
129 }
130 #endif
131
configs/sama5d2_ptc_ek_mmc_defconfig
Diff comments   View file @ aaa4ba9
File was created 1 CONFIG_ARM=y
2 CONFIG_ARCH_AT91=y
3 CONFIG_TARGET_SAMA5D2_PTC_EK=y
4 CONFIG_SYS_MALLOC_F_LEN=0x2000
5 CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek"
6 CONFIG_DEBUG_UART=y
7 CONFIG_FIT=y
8 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
9 CONFIG_SD_BOOT=y
10 CONFIG_BOOTDELAY=3
11 CONFIG_CONSOLE_MUX=y
12 # CONFIG_DISPLAY_BOARDINFO is not set
13 CONFIG_HUSH_PARSER=y
14 CONFIG_CMD_BOOTZ=y
15 # CONFIG_CMD_IMI is not set
16 # CONFIG_CMD_FLASH is not set
17 # CONFIG_CMD_FPGA is not set
18 CONFIG_CMD_I2C=y
19 # CONFIG_CMD_LOADS is not set
20 CONFIG_CMD_MMC=y
21 CONFIG_CMD_NAND=y
22 CONFIG_CMD_USB=y
23 CONFIG_CMD_DHCP=y
24 CONFIG_CMD_PING=y
25 CONFIG_CMD_EXT4=y
26 CONFIG_CMD_FAT=y
27 CONFIG_OF_CONTROL=y
28 CONFIG_ENV_IS_IN_MMC=y
29 CONFIG_DM=y
30 CONFIG_SPL_DM_SEQ_ALIAS=y
31 CONFIG_CLK=y
32 CONFIG_CLK_AT91=y
33 CONFIG_AT91_UTMI=y
34 CONFIG_AT91_H32MX=y
35 CONFIG_AT91_GENERIC_CLK=y
36 CONFIG_DM_GPIO=y
37 CONFIG_ATMEL_PIO4=y
38 CONFIG_DM_I2C=y
39 CONFIG_SYS_I2C_AT91=y
40 CONFIG_I2C_EEPROM=y
41 CONFIG_DM_MMC=y
42 CONFIG_MMC_SDHCI=y
43 CONFIG_MMC_SDHCI_ATMEL=y
44 CONFIG_DM_ETH=y
45 CONFIG_MACB=y
46 CONFIG_PINCTRL=y
47 CONFIG_PINCTRL_AT91PIO4=y
48 CONFIG_DM_SERIAL=y
49 CONFIG_DEBUG_UART_ATMEL=y
50 CONFIG_DEBUG_UART_BASE=0xf801c000
51 CONFIG_DEBUG_UART_CLOCK=82000000
52 CONFIG_DEBUG_UART_BOARD_INIT=y
53 CONFIG_DEBUG_UART_ANNOUNCE=y
54 CONFIG_ATMEL_USART=y
55 CONFIG_TIMER=y
56 CONFIG_ATMEL_PIT_TIMER=y
57 CONFIG_USB=y
58 CONFIG_DM_USB=y
59 CONFIG_USB_EHCI_HCD=y
60 CONFIG_USB_STORAGE=y
61
configs/sama5d2_ptc_ek_nandflash_defconfig
Diff comments   View file @ aaa4ba9
File was created 1 CONFIG_ARM=y
2 CONFIG_ARCH_AT91=y
3 CONFIG_TARGET_SAMA5D2_PTC_EK=y
4 CONFIG_SYS_MALLOC_F_LEN=0x2000
5 CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek"
6 CONFIG_DEBUG_UART=y
7 CONFIG_FIT=y
8 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_NANDFLASH"
9 CONFIG_NAND_BOOT=y
10 CONFIG_BOOTDELAY=3
11 CONFIG_CONSOLE_MUX=y
12 # CONFIG_DISPLAY_BOARDINFO is not set
13 CONFIG_HUSH_PARSER=y
14 CONFIG_CMD_BOOTZ=y
15 # CONFIG_CMD_IMI is not set
16 # CONFIG_CMD_FLASH is not set
17 # CONFIG_CMD_FPGA is not set
18 CONFIG_CMD_I2C=y
19 # CONFIG_CMD_LOADS is not set
20 CONFIG_CMD_MMC=y
21 CONFIG_CMD_NAND=y
22 CONFIG_CMD_USB=y
23 CONFIG_CMD_DHCP=y
24 CONFIG_CMD_PING=y
25 CONFIG_CMD_EXT4=y
26 CONFIG_CMD_FAT=y
27 CONFIG_OF_CONTROL=y
28 CONFIG_ENV_IS_IN_NAND=y
29 CONFIG_DM=y
30 CONFIG_SPL_DM_SEQ_ALIAS=y
31 CONFIG_CLK=y
32 CONFIG_CLK_AT91=y
33 CONFIG_AT91_UTMI=y
34 CONFIG_AT91_H32MX=y
35 CONFIG_AT91_GENERIC_CLK=y
36 CONFIG_DM_GPIO=y
37 CONFIG_ATMEL_PIO4=y
38 CONFIG_DM_I2C=y
39 CONFIG_SYS_I2C_AT91=y
40 CONFIG_I2C_EEPROM=y
41 CONFIG_DM_MMC=y
42 CONFIG_MMC_SDHCI=y
43 CONFIG_MMC_SDHCI_ATMEL=y
44 CONFIG_DM_ETH=y
45 CONFIG_MACB=y
46 CONFIG_PINCTRL=y
47 CONFIG_PINCTRL_AT91PIO4=y
48 CONFIG_DM_SERIAL=y
49 CONFIG_DEBUG_UART_ATMEL=y
50 CONFIG_DEBUG_UART_BASE=0xf801c000
51 CONFIG_DEBUG_UART_CLOCK=82000000
52 CONFIG_DEBUG_UART_BOARD_INIT=y
53 CONFIG_DEBUG_UART_ANNOUNCE=y
54 CONFIG_ATMEL_USART=y
55 CONFIG_TIMER=y
56 CONFIG_ATMEL_PIT_TIMER=y
57 CONFIG_USB=y
58 CONFIG_DM_USB=y
59 CONFIG_USB_EHCI_HCD=y
60 CONFIG_USB_STORAGE=y
61
configs/sama5d2_ptc_nandflash_defconfig
View file @ aaa4ba9
1 CONFIG_ARM=y File was deleted
2 CONFIG_ARCH_AT91=y
3 CONFIG_TARGET_SAMA5D2_PTC=y
4 CONFIG_SPL_GPIO_SUPPORT=y
5 CONFIG_SPL_LIBCOMMON_SUPPORT=y
6 CONFIG_SPL_LIBGENERIC_SUPPORT=y
7 CONFIG_SPL_SERIAL_SUPPORT=y
8 CONFIG_SPL_NAND_SUPPORT=y
9 CONFIG_NAND_BOOT=y
10 CONFIG_BOOTDELAY=3
11 CONFIG_USE_BOOTARGS=y
12 CONFIG_BOOTARGS="console=ttyS0,57600 earlyprintk mtdparts=atmel_nand:6M(bootstrap)ro, 6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=2 root=ubi0:rootfs"
13 # CONFIG_DISPLAY_BOARDINFO is not set
14 CONFIG_SPL=y
15 # CONFIG_CMD_IMI is not set
16 # CONFIG_CMD_FLASH is not set
17 # CONFIG_CMD_FPGA is not set
18 # CONFIG_CMD_LOADS is not set
19 CONFIG_CMD_NAND=y
20 CONFIG_CMD_NAND_TRIMFFS=y
21 CONFIG_CMD_SF=y
22 CONFIG_CMD_USB=y
23 CONFIG_CMD_FAT=y
24 CONFIG_ENV_IS_IN_NAND=y
25 # CONFIG_MMC is not set
26 CONFIG_SPI_FLASH=y
27 CONFIG_USB=y
28 CONFIG_USB_EHCI_HCD=y
29 CONFIG_USB_STORAGE=y
30 CONFIG_USB_GADGET=y
31 CONFIG_USB_GADGET_MANUFACTURER="Atmel SAMA5D2_PTC"
32 CONFIG_USB_GADGET_ATMEL_USBA=y
33 CONFIG_USB_ETHER=y
34 1 CONFIG_ARM=y
configs/sama5d2_ptc_spiflash_defconfig
View file @ aaa4ba9
1 CONFIG_ARM=y File was deleted
2 CONFIG_ARCH_AT91=y
3 CONFIG_TARGET_SAMA5D2_PTC=y
4 CONFIG_SPL_GPIO_SUPPORT=y
5 CONFIG_SPL_LIBCOMMON_SUPPORT=y
6 CONFIG_SPL_LIBGENERIC_SUPPORT=y
7 CONFIG_SPL_SERIAL_SUPPORT=y
8 CONFIG_SPL_SPI_FLASH_SUPPORT=y
9 CONFIG_SPL_SPI_SUPPORT=y
10 CONFIG_SPI_BOOT=y
11 CONFIG_BOOTDELAY=3
12 CONFIG_USE_BOOTARGS=y
13 CONFIG_BOOTARGS="console=ttyS0,57600 earlyprintk mtdparts=atmel_nand:6M(bootstrap)ro, 6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=2 root=ubi0:rootfs"
14 # CONFIG_DISPLAY_BOARDINFO is not set
15 CONFIG_SPL=y
16 # CONFIG_CMD_IMI is not set
17 # CONFIG_CMD_FLASH is not set
18 # CONFIG_CMD_FPGA is not set
19 # CONFIG_CMD_LOADS is not set
20 CONFIG_CMD_NAND=y
21 CONFIG_CMD_NAND_TRIMFFS=y
22 CONFIG_CMD_SF=y
23 CONFIG_CMD_USB=y
24 CONFIG_CMD_FAT=y
25 CONFIG_ENV_IS_IN_SPI_FLASH=y
26 # CONFIG_MMC is not set
27 CONFIG_SPI_FLASH=y
28 CONFIG_USB=y
29 CONFIG_USB_EHCI_HCD=y
30 CONFIG_USB_STORAGE=y
31 CONFIG_USB_GADGET=y
32 CONFIG_USB_GADGET_MANUFACTURER="Atmel SAMA5D2_PTC"
33 CONFIG_USB_GADGET_ATMEL_USBA=y
34 CONFIG_USB_ETHER=y
35 1 CONFIG_ARM=y
include/configs/sama5d2_ptc.h
View file @ aaa4ba9
1 /* File was deleted
2 * Configuration settings for the SAMA5D2 PTC Engineering board.
3 *
4 * Copyright (C) 2016 Atmel
5 * Wenyou Yang <wenyou.yang@atmel.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 #include "at91-sama5_common.h"
14
15 /* serial console */
16 #define CONFIG_ATMEL_USART
17 #define CONFIG_USART_BASE 0xf801c000
18 #define CONFIG_USART_ID 24
19
20 #define CONFIG_SYS_SDRAM_BASE 0x20000000
21 #define CONFIG_SYS_SDRAM_SIZE 0x20000000
22
23 #define CONFIG_SYS_TIMER_COUNTER 0xf804803c
24
25 #ifdef CONFIG_SPL_BUILD
26 #define CONFIG_SYS_INIT_SP_ADDR 0x210000
27 #else
28 #define CONFIG_SYS_INIT_SP_ADDR \
29 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
30 #endif
31
32 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
33
34 #undef CONFIG_AT91_GPIO
35 #define CONFIG_ATMEL_PIO4
36
37 /* SDRAM */
38 #define CONFIG_NR_DRAM_BANKS 1
39
40 /* SerialFlash */
41 #ifdef CONFIG_CMD_SF
42 #define CONFIG_ATMEL_SPI
43 #define CONFIG_SPI_FLASH_ATMEL
44 #define CONFIG_SF_DEFAULT_BUS 0
45 #define CONFIG_SF_DEFAULT_CS 0
46 #define CONFIG_SF_DEFAULT_SPEED 30000000
47 #endif
48
49 /* NAND flash */
50 #ifdef CONFIG_CMD_NAND
51 #define CONFIG_NAND_ATMEL
52 #define CONFIG_SYS_MAX_NAND_DEVICE 1
53 #define CONFIG_SYS_NAND_BASE 0x80000000
54 /* our ALE is AD21 */
55 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
56 /* our CLE is AD22 */
57 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
58 #define CONFIG_SYS_NAND_ONFI_DETECTION
59 /* PMECC & PMERRLOC */
60 #define CONFIG_ATMEL_NAND_HWECC
61 #define CONFIG_ATMEL_NAND_HW_PMECC
62 #endif
63
64 /* USB device */
65
66 /* Ethernet Hardware */
67 #define CONFIG_MACB
68 #define CONFIG_RMII
69 #define CONFIG_NET_RETRY_COUNT 20
70 #define CONFIG_MACB_SEARCH_PHY
71
72 #ifdef CONFIG_NAND_BOOT
73 #undef CONFIG_ENV_OFFSET
74 #undef CONFIG_ENV_OFFSET_REDUND
75 #undef CONFIG_BOOTCOMMAND
76 /* u-boot env in nand flash */
77 #define CONFIG_ENV_OFFSET 0x200000
78 #define CONFIG_ENV_OFFSET_REDUND 0x400000
79 #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0xb80000 0x80000;" \
80 "nand read 0x22000000 0x600000 0x600000;" \
81 "bootz 0x22000000 - 0x21000000"
82 #endif
83
84 /* SPL */
85 #define CONFIG_SPL_FRAMEWORK
86 #define CONFIG_SPL_TEXT_BASE 0x200000
87 #define CONFIG_SPL_MAX_SIZE 0x10000
88 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
89 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
90 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
91 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
92
93 #define CONFIG_SYS_MONITOR_LEN (512 << 10)
94
95 #ifdef CONFIG_SPI_BOOT
96 #define CONFIG_SPL_SPI_LOAD
97 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
98
99 #elif CONFIG_NAND_BOOT
100 #define CONFIG_SPL_NAND_DRIVERS
101 #define CONFIG_SPL_NAND_BASE
102 #endif
103 #define CONFIG_PMECC_CAP 8
104 #define CONFIG_PMECC_SECTOR_SIZE 512
105 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
106 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
107 #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
108 #define CONFIG_SYS_NAND_PAGE_COUNT 64
109 #define CONFIG_SYS_NAND_OOBSIZE 224
110 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000
111 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
112 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
113
114 #endif
115 1 /*
include/configs/sama5d2_ptc_ek.h
Diff comments   View file @ aaa4ba9
File was created 1 /*
2 * Configuration file for the SAMA5D2 PTC EK Board.
3 *
4 * Copyright (C) 2017 Microchip Technology Inc.
5 * Wenyou Yang <wenyou.yang@microchip.com>
6 * Ludovic Desroches <ludovic.desroches@microchip.com>
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13
14 #include "at91-sama5_common.h"
15
16 #undef CONFIG_SYS_AT91_MAIN_CLOCK
17 #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */
18
19 #define CONFIG_MISC_INIT_R
20
21 /* SDRAM */
22 #define CONFIG_NR_DRAM_BANKS 1
23 #define CONFIG_SYS_SDRAM_BASE 0x20000000
24 #define CONFIG_SYS_SDRAM_SIZE 0x20000000
25
26 #define CONFIG_SYS_INIT_SP_ADDR \
27 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
28
29 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
30
31 /* NAND Flash */
32 #ifdef CONFIG_CMD_NAND
33 #define CONFIG_NAND_ATMEL
34 #define CONFIG_SYS_MAX_NAND_DEVICE 1
35 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
36 /* our ALE is AD21 */
37 #define CONFIG_SYS_NAND_MASK_ALE BIT(21)
38 /* our CLE is AD22 */
39 #define CONFIG_SYS_NAND_MASK_CLE BIT(22)
40 #define CONFIG_SYS_NAND_ONFI_DETECTION
41 /* PMECC & PMERRLOC */
42 #define CONFIG_ATMEL_NAND_HWECC
43 #define CONFIG_ATMEL_NAND_HW_PMECC
44 #endif
45
46 #endif /* __CONFIG_H */
47