Merge branch 'master' of git://git.denx.de/u-boot-imx

Wolfgang Denk
2 parents 7ea23555f5 565e39c577
Showing 8 changed files Side-by-side Diff
arch/arm/cpu/arm926ejs/mx25/generic.c
arch/arm/cpu/arm926ejs/mx27/generic.c
arch/arm/cpu/armv7/mx5/soc.c
arch/arm/include/asm/arch-mx25/imx-regs.h
arch/arm/include/asm/arch-mx27/imx-regs.h
arch/arm/include/asm/arch-mx5/imx-regs.h
drivers/net/fec_mxc.c
include/configs/mx51evk.h
@@ -260,5 +260,17 @@
 	writel (outpadctl, &padctl->pad_fec_tdata1);
  
 }
+
+void imx_get_mac_from_fuse(unsigned char *mac)
+{
+	int i;
+	struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+	struct fuse_bank *bank = &iim->bank[0];
+	struct fuse_bank0_regs *fuse =
+			(struct fuse_bank0_regs *)bank->fuse_regs;
+
+	for (i = 0; i < 6; i++)
+		mac[i] = readl(&fuse->mac_addr[i]) & 0xff;
+}
 #endif /* CONFIG_FEC_MXC */
@@ -313,6 +313,18 @@
 	for (i = 0; i < ARRAY_SIZE(mode); i++)
 		imx_gpio_mode(mode[i]);
 }
+
+void imx_get_mac_from_fuse(unsigned char *mac)
+{
+	int i;
+	struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+	struct fuse_bank *bank = &iim->bank[0];
+	struct fuse_bank0_regs *fuse =
+			(struct fuse_bank0_regs *)bank->fuse_regs;
+
+	for (i = 0; i < 6; i++)
+		mac[6 - 1 - i] = readl(&fuse->mac_addr[i]) & 0xff;
+}
 #endif /* CONFIG_FEC_MXC */
  
 #ifdef CONFIG_MXC_MMC
@@ -100,6 +100,20 @@
 	return rc;
 }
  
+#if defined(CONFIG_FEC_MXC)
+void imx_get_mac_from_fuse(unsigned char *mac)
+{
+	int i;
+	struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+	struct fuse_bank *bank = &iim->bank[1];
+	struct fuse_bank1_regs *fuse =
+			(struct fuse_bank1_regs *)bank->fuse_regs;
+
+	for (i = 0; i < 6; i++)
+		mac[i] = readl(&fuse->mac_addr[i]) & 0xff;
+}
+#endif
+
 /*
  * Initializes on-chip MMC controllers.
  * to override, implement board_mmc_init()
@@ -36,6 +36,7 @@
 #ifndef __ASSEMBLY__
 #ifdef CONFIG_FEC_MXC
 extern void mx25_fec_init_pins(void);
+extern void imx_get_mac_from_fuse(unsigned char *mac);
 #endif
  
 /* Clock Control Module (CCM) registers */
  
@@ -129,12 +130,17 @@
 	u32 iim_srev;
 	u32 iim_prog_p;
 	u32 res1[0x1f5];
-	u32 iim_bank_area0[0x20];
-	u32 res2[0xe0];
-	u32 iim_bank_area1[0x20];
-	u32 res3[0xe0];
-	u32 iim_bank_area2[0x20];
+	struct fuse_bank {
+		u32 fuse_regs[0x20];
+		u32 fuse_rsvd[0xe0];
+	} bank[3];
 };
+
+struct fuse_bank0_regs {
+	u32 fuse0_25[0x1a];
+	u32 mac_addr[6];
+};
+
 #endif
  
 /* AIPS 1 */
@@ -311,9 +317,6 @@
 #define WCR_WDE 		0x04
 #define WSR_UNLOCK1		0x5555
 #define WSR_UNLOCK2		0xAAAA
-
-/* FUSE bank offsets */
-#define IIM0_MAC		0x1a
  
 #endif				/* _IMX_REGS_H */
@@ -34,6 +34,7 @@
  
 #ifdef CONFIG_FEC_MXC
 extern void mx27_fec_init_pins(void);
+extern void imx_get_mac_from_fuse(unsigned char *mac);
 #endif /* CONFIG_FEC_MXC */
  
 #ifdef CONFIG_MXC_MMC
  
@@ -202,9 +203,19 @@
 	u32 iim_scs1;
 	u32 iim_scs2;
 	u32 iim_scs3;
-	u32 res[0x1F0];
-	u32 iim_bank_area0[0x100];
+	u32 res[0x1f1];
+	struct fuse_bank {
+		u32 fuse_regs[0x20];
+		u32 fuse_rsvd[0xe0];
+	} bank[1];
 };
+
+struct fuse_bank0_regs {
+	u32 fuse0_3[5];
+	u32 mac_addr[6];
+	u32 fuse10_31[0x16];
+};
+
 #endif
  
 #define IMX_IO_BASE		0x10000000
@@ -511,11 +522,6 @@
 #define IIM_ERR_WLRE	(1 << 3)
 #define IIM_ERR_SNSE	(1 << 2)
 #define IIM_ERR_PARITYE	(1 << 1)
-
-/* Definitions for i.MX27 TO2 */
-#define IIM0_MAC		5
-#define IIM0_SCC_KEY		11
-#define IIM1_SUID		1
  
 #endif				/* _IMX_REGS_H */
@@ -205,9 +205,13 @@
 #define BOARD_REV_1_0           0x0
 #define BOARD_REV_2_0           0x1
  
+#define IMX_IIM_BASE            (IIM_BASE_ADDR)
+
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>
  
+extern void imx_get_mac_from_fuse(unsigned char *mac);
+
 #define __REG(x)	(*((volatile u32 *)(x)))
 #define __REG16(x)	(*((volatile u16 *)(x)))
 #define __REG8(x)	(*((volatile u8 *)(x)))
@@ -275,6 +279,36 @@
 	u32	sisr;
 	u32	simr;
 };
+
+struct iim_regs {
+	u32	stat;
+	u32	statm;
+	u32     err;
+	u32	emask;
+	u32	fctl;
+	u32	ua;
+	u32	la;
+	u32	sdat;
+	u32	prev;
+	u32	srev;
+	u32	preg_p;
+	u32	scs0;
+	u32	scs1;
+	u32	scs2;
+	u32	scs3;
+	u32	res0[0x1f1];
+	struct fuse_bank {
+		u32	fuse_regs[0x20];
+		u32	fuse_rsvd[0xe0];
+	} bank[4];
+};
+
+struct fuse_bank1_regs {
+	u32	fuse0_8[9];
+	u32	mac_addr[6];
+	u32	fuse15_31[0x11];
+};
+
 #endif /* __ASSEMBLER__*/
  
 #endif				/*  __ASM_ARCH_MXC_MX51_H__ */
@@ -312,21 +312,8 @@
  
 static int fec_get_hwaddr(struct eth_device *dev, unsigned char *mac)
 {
-/*
- * The MX27 can store the mac address in internal eeprom
- * This mechanism is not supported now by MX51 or MX25
- */
-#if defined(CONFIG_MX51) || defined(CONFIG_MX25)
-	return -1;
-#else
-	struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
-	int i;
-
-	for (i = 0; i < 6; i++)
-		mac[6-1-i] = readl(&iim->iim_bank_area0[IIM0_MAC + i]);
-
+	imx_get_mac_from_fuse(mac);
 	return !is_valid_ether_addr(mac);
-#endif
 }
  
 static int fec_set_hwaddr(struct eth_device *dev)
@@ -754,7 +741,7 @@
 	eth_register(edev);
  
 	if (fec_get_hwaddr(edev, ethaddr) == 0) {
-		printf("got MAC address from EEPROM: %pM\n", ethaddr);
+		printf("got MAC address from fuse: %pM\n", ethaddr);
 		memcpy(edev->enetaddr, ethaddr, 6);
 	}
  
@@ -216,9 +216,10 @@
  */
 #define CONFIG_SYS_NO_FLASH
  
-#define CONFIG_ENV_SECT_SIZE    (128 * 1024)
-#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
-#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
+#define CONFIG_ENV_SIZE        (8 * 1024)
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 0
  
 #endif
...	...	@@ -260,5 +260,17 @@
260	260	writel (outpadctl, &padctl->pad_fec_tdata1);
261	261
262	262	}
	263	+
	264	+void imx_get_mac_from_fuse(unsigned char *mac)
	265	+{
	266	+ int i;
	267	+ struct iim_regs iim = (struct iim_regs )IMX_IIM_BASE;
	268	+ struct fuse_bank *bank = &iim->bank[0];
	269	+ struct fuse_bank0_regs *fuse =
	270	+ (struct fuse_bank0_regs *)bank->fuse_regs;
	271	+
	272	+ for (i = 0; i < 6; i++)
	273	+ mac[i] = readl(&fuse->mac_addr[i]) & 0xff;
	274	+}
263	275	#endif /* CONFIG_FEC_MXC */
...	...	@@ -313,6 +313,18 @@
313	313	for (i = 0; i < ARRAY_SIZE(mode); i++)
314	314	imx_gpio_mode(mode[i]);
315	315	}
	316	+
	317	+void imx_get_mac_from_fuse(unsigned char *mac)
	318	+{
	319	+ int i;
	320	+ struct iim_regs iim = (struct iim_regs )IMX_IIM_BASE;
	321	+ struct fuse_bank *bank = &iim->bank[0];
	322	+ struct fuse_bank0_regs *fuse =
	323	+ (struct fuse_bank0_regs *)bank->fuse_regs;
	324	+
	325	+ for (i = 0; i < 6; i++)
	326	+ mac[6 - 1 - i] = readl(&fuse->mac_addr[i]) & 0xff;
	327	+}
316	328	#endif /* CONFIG_FEC_MXC */
317	329
318	330	#ifdef CONFIG_MXC_MMC
...	...	@@ -100,6 +100,20 @@
100	100	return rc;
101	101	}
102	102
	103	+#if defined(CONFIG_FEC_MXC)
	104	+void imx_get_mac_from_fuse(unsigned char *mac)
	105	+{
	106	+ int i;
	107	+ struct iim_regs iim = (struct iim_regs )IMX_IIM_BASE;
	108	+ struct fuse_bank *bank = &iim->bank[1];
	109	+ struct fuse_bank1_regs *fuse =
	110	+ (struct fuse_bank1_regs *)bank->fuse_regs;
	111	+
	112	+ for (i = 0; i < 6; i++)
	113	+ mac[i] = readl(&fuse->mac_addr[i]) & 0xff;
	114	+}
	115	+#endif
	116	+
103	117	/*
104	118	* Initializes on-chip MMC controllers.
105	119	* to override, implement board_mmc_init()
...	...	@@ -36,6 +36,7 @@
36	36	#ifndef __ASSEMBLY__
37	37	#ifdef CONFIG_FEC_MXC
38	38	extern void mx25_fec_init_pins(void);
	39	+extern void imx_get_mac_from_fuse(unsigned char *mac);
39	40	#endif
40	41
41	42	/* Clock Control Module (CCM) registers */
42	43
...	...	@@ -129,12 +130,17 @@
129	130	u32 iim_srev;
130	131	u32 iim_prog_p;
131	132	u32 res1[0x1f5];
132		- u32 iim_bank_area0[0x20];
133		- u32 res2[0xe0];
134		- u32 iim_bank_area1[0x20];
135		- u32 res3[0xe0];
136		- u32 iim_bank_area2[0x20];
	133	+ struct fuse_bank {
	134	+ u32 fuse_regs[0x20];
	135	+ u32 fuse_rsvd[0xe0];
	136	+ } bank[3];
137	137	};
	138	+
	139	+struct fuse_bank0_regs {
	140	+ u32 fuse0_25[0x1a];
	141	+ u32 mac_addr[6];
	142	+};
	143	+
138	144	#endif
139	145
140	146	/* AIPS 1 */
...	...	@@ -311,9 +317,6 @@
311	317	#define WCR_WDE 0x04
312	318	#define WSR_UNLOCK1 0x5555
313	319	#define WSR_UNLOCK2 0xAAAA
314		-
315		-/* FUSE bank offsets */
316		-#define IIM0_MAC 0x1a
317	320
318	321	#endif /* _IMX_REGS_H */
...	...	@@ -34,6 +34,7 @@
34	34
35	35	#ifdef CONFIG_FEC_MXC
36	36	extern void mx27_fec_init_pins(void);
	37	+extern void imx_get_mac_from_fuse(unsigned char *mac);
37	38	#endif /* CONFIG_FEC_MXC */
38	39
39	40	#ifdef CONFIG_MXC_MMC
40	41
...	...	@@ -202,9 +203,19 @@
202	203	u32 iim_scs1;
203	204	u32 iim_scs2;
204	205	u32 iim_scs3;
205		- u32 res[0x1F0];
206		- u32 iim_bank_area0[0x100];
	206	+ u32 res[0x1f1];
	207	+ struct fuse_bank {
	208	+ u32 fuse_regs[0x20];
	209	+ u32 fuse_rsvd[0xe0];
	210	+ } bank[1];
207	211	};
	212	+
	213	+struct fuse_bank0_regs {
	214	+ u32 fuse0_3[5];
	215	+ u32 mac_addr[6];
	216	+ u32 fuse10_31[0x16];
	217	+};
	218	+
208	219	#endif
209	220
210	221	#define IMX_IO_BASE 0x10000000
...	...	@@ -511,11 +522,6 @@
511	522	#define IIM_ERR_WLRE (1 << 3)
512	523	#define IIM_ERR_SNSE (1 << 2)
513	524	#define IIM_ERR_PARITYE (1 << 1)
514		-
515		-/* Definitions for i.MX27 TO2 */
516		-#define IIM0_MAC 5
517		-#define IIM0_SCC_KEY 11
518		-#define IIM1_SUID 1
519	525
520	526	#endif /* _IMX_REGS_H */
...	...	@@ -205,9 +205,13 @@
205	205	#define BOARD_REV_1_0 0x0
206	206	#define BOARD_REV_2_0 0x1
207	207
	208	+#define IMX_IIM_BASE (IIM_BASE_ADDR)
	209	+
208	210	#if !(defined(__KERNEL_STRICT_NAMES) \|\| defined(__ASSEMBLY__))
209	211	#include <asm/types.h>
210	212
	213	+extern void imx_get_mac_from_fuse(unsigned char *mac);
	214	+
211	215	#define __REG(x) (((volatile u32 )(x)))
212	216	#define __REG16(x) (((volatile u16 )(x)))
213	217	#define __REG8(x) (((volatile u8 )(x)))
...	...	@@ -275,6 +279,36 @@
275	279	u32 sisr;
276	280	u32 simr;
277	281	};
	282	+
	283	+struct iim_regs {
	284	+ u32 stat;
	285	+ u32 statm;
	286	+ u32 err;
	287	+ u32 emask;
	288	+ u32 fctl;
	289	+ u32 ua;
	290	+ u32 la;
	291	+ u32 sdat;
	292	+ u32 prev;
	293	+ u32 srev;
	294	+ u32 preg_p;
	295	+ u32 scs0;
	296	+ u32 scs1;
	297	+ u32 scs2;
	298	+ u32 scs3;
	299	+ u32 res0[0x1f1];
	300	+ struct fuse_bank {
	301	+ u32 fuse_regs[0x20];
	302	+ u32 fuse_rsvd[0xe0];
	303	+ } bank[4];
	304	+};
	305	+
	306	+struct fuse_bank1_regs {
	307	+ u32 fuse0_8[9];
	308	+ u32 mac_addr[6];
	309	+ u32 fuse15_31[0x11];
	310	+};
	311	+
278	312	#endif /* __ASSEMBLER__*/
279	313
280	314	#endif /* __ASM_ARCH_MXC_MX51_H__ */
...	...	@@ -312,21 +312,8 @@
312	312
313	313	static int fec_get_hwaddr(struct eth_device dev, unsigned char mac)
314	314	{
315		-/*
316		- * The MX27 can store the mac address in internal eeprom
317		- * This mechanism is not supported now by MX51 or MX25
318		- */
319		-#if defined(CONFIG_MX51) \|\| defined(CONFIG_MX25)
320		- return -1;
321		-#else
322		- struct iim_regs iim = (struct iim_regs )IMX_IIM_BASE;
323		- int i;
324		-
325		- for (i = 0; i < 6; i++)
326		- mac[6-1-i] = readl(&iim->iim_bank_area0[IIM0_MAC + i]);
327		-
	315	+ imx_get_mac_from_fuse(mac);
328	316	return !is_valid_ether_addr(mac);
329		-#endif
330	317	}
331	318
332	319	static int fec_set_hwaddr(struct eth_device *dev)
...	...	@@ -754,7 +741,7 @@
754	741	eth_register(edev);
755	742
756	743	if (fec_get_hwaddr(edev, ethaddr) == 0) {
757		- printf("got MAC address from EEPROM: %pM\n", ethaddr);
	744	+ printf("got MAC address from fuse: %pM\n", ethaddr);
758	745	memcpy(edev->enetaddr, ethaddr, 6);
759	746	}
760	747
...	...	@@ -216,9 +216,10 @@
216	216	*/
217	217	#define CONFIG_SYS_NO_FLASH
218	218
219		-#define CONFIG_ENV_SECT_SIZE (128 * 1024)
220		-#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
221		-#define CONFIG_ENV_IS_NOWHERE
	219	+#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
	220	+#define CONFIG_ENV_SIZE (8 * 1024)
	221	+#define CONFIG_ENV_IS_IN_MMC
	222	+#define CONFIG_SYS_MMC_ENV_DEV 0
222	223
223	224	#endif