Commit af27d084648c492dbf5e89b6adc9a2a328699dd4
Committed by
Lokesh Vutla
1 parent
503ca5e8a3
Exists in
v2017.01-smarct4x
and in
2 other branches
board: ti: am571-idx: Add vcores support
Update vcores for am571-idk board. Reported-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Showing 1 changed file with 50 additions and 0 deletions Side-by-side Diff
board/ti/am57xx/board.c
... | ... | @@ -343,6 +343,54 @@ |
343 | 343 | .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK, |
344 | 344 | }; |
345 | 345 | |
346 | +struct vcores_data am571x_idk_volts = { | |
347 | + .mpu.value[OPP_NOM] = VDD_MPU_DRA7_NOM, | |
348 | + .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM, | |
349 | + .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, | |
350 | + .mpu.addr = TPS659038_REG_ADDR_SMPS12, | |
351 | + .mpu.pmic = &tps659038, | |
352 | + .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK, | |
353 | + | |
354 | + .eve.value[OPP_NOM] = VDD_EVE_DRA7_NOM, | |
355 | + .eve.value[OPP_OD] = VDD_EVE_DRA7_OD, | |
356 | + .eve.value[OPP_HIGH] = VDD_EVE_DRA7_HIGH, | |
357 | + .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM, | |
358 | + .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD, | |
359 | + .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH, | |
360 | + .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS, | |
361 | + .eve.addr = TPS659038_REG_ADDR_SMPS45, | |
362 | + .eve.pmic = &tps659038, | |
363 | + .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK, | |
364 | + | |
365 | + .gpu.value[OPP_NOM] = VDD_GPU_DRA7_NOM, | |
366 | + .gpu.value[OPP_OD] = VDD_GPU_DRA7_OD, | |
367 | + .gpu.value[OPP_HIGH] = VDD_GPU_DRA7_HIGH, | |
368 | + .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM, | |
369 | + .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD, | |
370 | + .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH, | |
371 | + .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, | |
372 | + .gpu.addr = TPS659038_REG_ADDR_SMPS6, | |
373 | + .gpu.pmic = &tps659038, | |
374 | + .gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK, | |
375 | + | |
376 | + .core.value[OPP_NOM] = VDD_CORE_DRA7_NOM, | |
377 | + .core.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_CORE_NOM, | |
378 | + .core.efuse.reg_bits = DRA752_EFUSE_REGBITS, | |
379 | + .core.addr = TPS659038_REG_ADDR_SMPS7, | |
380 | + .core.pmic = &tps659038, | |
381 | + | |
382 | + .iva.value[OPP_NOM] = VDD_IVA_DRA7_NOM, | |
383 | + .iva.value[OPP_OD] = VDD_IVA_DRA7_OD, | |
384 | + .iva.value[OPP_HIGH] = VDD_IVA_DRA7_HIGH, | |
385 | + .iva.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_IVA_NOM, | |
386 | + .iva.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_IVA_OD, | |
387 | + .iva.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_IVA_HIGH, | |
388 | + .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS, | |
389 | + .iva.addr = TPS659038_REG_ADDR_SMPS45, | |
390 | + .iva.pmic = &tps659038, | |
391 | + .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK, | |
392 | +}; | |
393 | + | |
346 | 394 | int get_voltrail_opp(int rail_offset) |
347 | 395 | { |
348 | 396 | int opp; |
... | ... | @@ -452,6 +500,8 @@ |
452 | 500 | { |
453 | 501 | if (board_is_am572x_idk()) |
454 | 502 | *omap_vcores = &am572x_idk_volts; |
503 | + else if (board_is_am571x_idk()) | |
504 | + *omap_vcores = &am571x_idk_volts; | |
455 | 505 | else |
456 | 506 | *omap_vcores = &beagle_x15_volts; |
457 | 507 | } |