Eric Lee / smarc-uboot

Download as
Browse Code ยป

Commit afee59cd49449e7b7d538d919b6e8ab5184e5b93

Authored by Murali Karicheri
Committed by Tom Rini
1 parent 196311dc72
Exists in v2017.01-smarct4x and in 40 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

keystone: init: enable UART1 to be able use it from kernel 

Currently PWREMU_MGMT is not configured in the Linux generic UART
driver as this register seems to be specific TI UART IP. So this
needs to be enabled in u-boot to use UART1 from kernel space.

Acked-By: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>

Showing 4 changed files with 14 additions and 3 deletions Side-by-side Diff

arch/arm/cpu/armv7/keystone/init.c
Diff comments   View file @ afee59c
... ... @@ -8,6 +8,7 @@
8 8 */
9 9  
10 10 #include <common.h>
  11 +#include <ns16550.h>
11 12 #include <asm/io.h>
12 13 #include <asm/arch/clock.h>
13 14 #include <asm/arch/hardware.h>
... ... @@ -29,6 +30,14 @@
29 30 share_all_segments(10); /* QM PDSP */
30 31 share_all_segments(11); /* PCIE */
31 32 #endif
  33 +
  34 + /*
  35 + * just initialise the COM2 port so that TI specific
  36 + * UART register PWREMU_MGMT is initialized. Linux UART
  37 + * driver doesn't handle this.
  38 + */
  39 + NS16550_init((NS16550_t)(CONFIG_SYS_NS16550_COM2),
  40 + CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
32 41  
33 42 return 0;
34 43 }
arch/arm/include/asm/arch-keystone/hardware-k2hk.h
Diff comments   View file @ afee59c
... ... @@ -115,8 +115,6 @@
115 115 #define K2HK_LPSC_ARM_SREFLEX 51
116 116 #define K2HK_LPSC_TETRIS 52
117 117  
118   -#define K2HK_UART0_BASE 0x02530c00
119   -
120 118 /* DDR3A definitions */
121 119 #define K2HK_DDR3A_EMIF_CTRL_BASE 0x21010000
122 120 #define K2HK_DDR3A_EMIF_DATA_BASE 0x80000000
arch/arm/include/asm/arch-keystone/hardware.h
Diff comments   View file @ afee59c
... ... @@ -142,6 +142,9 @@
142 142 #define KS2_DDR3_PMCTL_OFFSET 0x38
143 143 #define KS2_DDR3_ZQCFG_OFFSET 0xC8
144 144  
  145 +#define KS2_UART0_BASE 0x02530c00
  146 +#define KS2_UART1_BASE 0x02531000
  147 +
145 148 #ifdef CONFIG_SOC_K2HK
146 149 #include <asm/arch/hardware-k2hk.h>
147 150 #endif
include/configs/k2hk_evm.h
Diff comments   View file @ afee59c
... ... @@ -71,7 +71,8 @@
71 71 #define CONFIG_SYS_NS16550_SERIAL
72 72 #define CONFIG_SYS_NS16550_MEM32
73 73 #define CONFIG_SYS_NS16550_REG_SIZE -4
74   -#define CONFIG_SYS_NS16550_COM1 K2HK_UART0_BASE
  74 +#define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
  75 +#define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
75 76 #define CONFIG_SYS_NS16550_CLK clk_get_rate(K2HK_CLK1_6)
76 77 #define CONFIG_CONS_INDEX 1
77 78 #define CONFIG_BAUDRATE 115200