Commit b02f76a83541fe9fe3a2918039b26fc133699c17

Authored by Stefan Roese
Committed by Daniel Schwierzeck
1 parent 4c835a607b

mips: Add LinkIt Smart 7688 support

The LinkIt Smart 7688 modules have a MT7688 SoC with 128 MiB of RAM
and 32 MiB of flash (SPI NOR).

This patch also includes 2 targets. One is the target that can be
programmed into the SPI NOR flash and a 2nd target "xxx-ram" is
added to support loading and booting via an already running U-Boot
version. This allows easy development and testing without the
need to flash the image each time.

Signed-off-by: Stefan Roese <sr@denx.de>
[fixed and regenerated defconfig files]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

Showing 9 changed files with 265 additions and 0 deletions Side-by-side Diff

arch/mips/dts/linkit-smart-7688.dts
  1 +// SPDX-License-Identifier: GPL-2.0
  2 +/*
  3 + * Copyright (C) 2018 Stefan Roese <sr@denx.de>
  4 + */
  5 +
  6 +/dts-v1/;
  7 +
  8 +#include "mt7628a.dtsi"
  9 +
  10 +/ {
  11 + compatible = "seeed,linkit-smart-7688", "ralink,mt7628a-soc";
  12 + model = "LinkIt-Smart-7688";
  13 +
  14 + aliases {
  15 + serial0 = &uart2;
  16 + spi0 = &spi0;
  17 + };
  18 +
  19 + memory@0 {
  20 + device_type = "memory";
  21 + reg = <0x0 0x08000000>;
  22 + };
  23 +
  24 + chosen {
  25 + bootargs = "console=ttyS0,57600";
  26 + stdout-path = &uart2;
  27 + };
  28 +};
  29 +
  30 +&uart2 {
  31 + status = "okay";
  32 + clock-frequency = <40000000>;
  33 +};
  34 +
  35 +&spi0 {
  36 + status = "okay";
  37 + num-cs = <2>;
  38 +
  39 + spi-flash@0 {
  40 + #address-cells = <1>;
  41 + #size-cells = <1>;
  42 + compatible = "spi-flash", "jedec,spi-nor";
  43 + spi-max-frequency = <25000000>;
  44 + reg = <0>;
  45 + };
  46 +};
arch/mips/mach-mt7620/Kconfig
... ... @@ -21,6 +21,17 @@
21 21 choice
22 22 prompt "Board select"
23 23  
  24 +config BOARD_LINKIT_SMART_7688
  25 + bool "LinkIt Smart 7688"
  26 + depends on SOC_MT7620
  27 + select SUPPORTS_BOOT_RAM
  28 + help
  29 + Seeed LinkIt Smart 7688 boards have a MT7688 SoC with 128 MiB of RAM
  30 + and 32 MiB of flash (SPI).
  31 + Between its different peripherals there's an integrated switch with 4
  32 + ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and
  33 + a MT7688 (PCIe).
  34 +
24 35 endchoice
25 36  
26 37 choice
... ... @@ -109,6 +120,8 @@
109 120  
110 121 config SUPPORTS_BOOT_RAM
111 122 bool
  123 +
  124 +source "board/seeed/linkit-smart-7688/Kconfig"
112 125  
113 126 endmenu
board/seeed/linkit-smart-7688/Kconfig
  1 +if BOARD_LINKIT_SMART_7688
  2 +
  3 +config SYS_BOARD
  4 + default "linkit-smart-7688"
  5 +
  6 +config SYS_VENDOR
  7 + default "seeed"
  8 +
  9 +config SYS_CONFIG_NAME
  10 + default "linkit-smart-7688"
  11 +
  12 +endif
board/seeed/linkit-smart-7688/MAINTAINERS
  1 +LINKIT_SMART_7688 BOARD
  2 +M: Stefan Roese <sr@denx.de>
  3 +S: Maintained
  4 +F: board/seeed/linkit-smart-7688
  5 +F: include/configs/linkit-smart-7688.h
  6 +F: configs/linkit-smart-7688_defconfig
  7 +F: configs/linkit-smart-7688_ram_defconfig
  8 +F: arch/mips/dts/linkit-smart-7688.dts
board/seeed/linkit-smart-7688/Makefile
  1 +# SPDX-License-Identifier: GPL-2.0+
  2 +
  3 +obj-y += board.o
board/seeed/linkit-smart-7688/board.c
  1 +// SPDX-License-Identifier: GPL-2.0+
  2 +/*
  3 + * Copyright (C) 2018 Stefan Roese <sr@denx.de>
  4 + */
  5 +
  6 +#include <common.h>
  7 +#include <asm/io.h>
  8 +
  9 +#define MT76XX_GPIO1_MODE 0xb0000060
  10 +
  11 +void board_debug_uart_init(void)
  12 +{
  13 + /* Select UART2 mode instead of GPIO mode (default) */
  14 + clrbits_le32((void __iomem *)MT76XX_GPIO1_MODE, GENMASK(27, 26));
  15 +}
  16 +
  17 +int board_early_init_f(void)
  18 +{
  19 + /*
  20 + * The pin muxing of UART2 also needs to be done, if debug uart
  21 + * is not enabled. So we need to call this function here as well.
  22 + */
  23 + board_debug_uart_init();
  24 +
  25 + return 0;
  26 +}
configs/linkit-smart-7688-ram_defconfig
  1 +CONFIG_MIPS=y
  2 +CONFIG_SYS_TEXT_BASE=0x80010000
  3 +CONFIG_ARCH_MT7620=y
  4 +# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
  5 +# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
  6 +CONFIG_MIPS_BOOT_FDT=y
  7 +CONFIG_NR_DRAM_BANKS=1
  8 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
  9 +CONFIG_OF_STDOUT_VIA_ALIAS=y
  10 +CONFIG_SYS_CONSOLE_INFO_QUIET=y
  11 +CONFIG_BOARD_EARLY_INIT_F=y
  12 +CONFIG_HUSH_PARSER=y
  13 +CONFIG_CMD_CPU=y
  14 +CONFIG_CMD_LICENSE=y
  15 +# CONFIG_CMD_BOOTD is not set
  16 +# CONFIG_CMD_ELF is not set
  17 +# CONFIG_CMD_XIMG is not set
  18 +CONFIG_CMD_MEMINFO=y
  19 +# CONFIG_CMD_FLASH is not set
  20 +# CONFIG_CMD_LOADS is not set
  21 +CONFIG_CMD_SF=y
  22 +CONFIG_CMD_SPI=y
  23 +# CONFIG_CMD_NET is not set
  24 +CONFIG_CMD_TIME=y
  25 +CONFIG_OF_EMBED=y
  26 +CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688"
  27 +CONFIG_ENV_IS_IN_SPI_FLASH=y
  28 +# CONFIG_DM_DEVICE_REMOVE is not set
  29 +CONFIG_HAVE_BLOCK_DEVICE=y
  30 +CONFIG_CLK=y
  31 +CONFIG_CPU=y
  32 +CONFIG_DM_GPIO=y
  33 +CONFIG_LED=y
  34 +CONFIG_LED_BLINK=y
  35 +CONFIG_LED_GPIO=y
  36 +CONFIG_SPI_FLASH=y
  37 +CONFIG_SPI_FLASH_GIGADEVICE=y
  38 +CONFIG_SPI_FLASH_MACRONIX=y
  39 +CONFIG_SPI_FLASH_SPANSION=y
  40 +CONFIG_SPI_FLASH_STMICRO=y
  41 +CONFIG_SPI_FLASH_WINBOND=y
  42 +CONFIG_SPI_FLASH_MTD=y
  43 +CONFIG_PHY=y
  44 +CONFIG_POWER_DOMAIN=y
  45 +CONFIG_RAM=y
  46 +CONFIG_DM_RESET=y
  47 +CONFIG_BAUDRATE=57600
  48 +# CONFIG_SPL_SERIAL_PRESENT is not set
  49 +CONFIG_SYS_NS16550=y
  50 +CONFIG_SPI=y
  51 +CONFIG_SYSRESET_SYSCON=y
configs/linkit-smart-7688_defconfig
  1 +CONFIG_MIPS=y
  2 +CONFIG_SYS_TEXT_BASE=0x9c000000
  3 +CONFIG_ARCH_MT7620=y
  4 +CONFIG_BOOT_ROM=y
  5 +CONFIG_ONBOARD_DDR2_SIZE_1024MBIT=y
  6 +CONFIG_ONBOARD_DDR2_CHIP_WIDTH_16BIT=y
  7 +# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
  8 +# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
  9 +CONFIG_MIPS_BOOT_FDT=y
  10 +CONFIG_NR_DRAM_BANKS=1
  11 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
  12 +CONFIG_OF_STDOUT_VIA_ALIAS=y
  13 +CONFIG_SYS_CONSOLE_INFO_QUIET=y
  14 +CONFIG_BOARD_EARLY_INIT_F=y
  15 +CONFIG_HUSH_PARSER=y
  16 +CONFIG_CMD_CPU=y
  17 +CONFIG_CMD_LICENSE=y
  18 +# CONFIG_CMD_BOOTD is not set
  19 +# CONFIG_CMD_ELF is not set
  20 +# CONFIG_CMD_XIMG is not set
  21 +# CONFIG_CMD_CRC32 is not set
  22 +CONFIG_CMD_MEMINFO=y
  23 +# CONFIG_CMD_FLASH is not set
  24 +# CONFIG_CMD_LOADS is not set
  25 +CONFIG_CMD_SF=y
  26 +CONFIG_CMD_SPI=y
  27 +# CONFIG_CMD_NET is not set
  28 +CONFIG_CMD_TIME=y
  29 +CONFIG_OF_EMBED=y
  30 +CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688"
  31 +CONFIG_ENV_IS_IN_SPI_FLASH=y
  32 +# CONFIG_DM_DEVICE_REMOVE is not set
  33 +CONFIG_HAVE_BLOCK_DEVICE=y
  34 +CONFIG_CLK=y
  35 +CONFIG_CPU=y
  36 +CONFIG_DM_GPIO=y
  37 +CONFIG_LED=y
  38 +CONFIG_LED_BLINK=y
  39 +CONFIG_LED_GPIO=y
  40 +CONFIG_SPI_FLASH=y
  41 +CONFIG_SPI_FLASH_GIGADEVICE=y
  42 +CONFIG_SPI_FLASH_MACRONIX=y
  43 +CONFIG_SPI_FLASH_SPANSION=y
  44 +CONFIG_SPI_FLASH_STMICRO=y
  45 +CONFIG_SPI_FLASH_WINBOND=y
  46 +CONFIG_SPI_FLASH_MTD=y
  47 +CONFIG_PHY=y
  48 +CONFIG_POWER_DOMAIN=y
  49 +CONFIG_RAM=y
  50 +CONFIG_DM_RESET=y
  51 +CONFIG_BAUDRATE=57600
  52 +# CONFIG_SPL_SERIAL_PRESENT is not set
  53 +CONFIG_SYS_NS16550=y
  54 +CONFIG_SPI=y
  55 +CONFIG_SYSRESET_SYSCON=y
include/configs/linkit-smart-7688.h
  1 +/* SPDX-License-Identifier: GPL-2.0+ */
  2 +/*
  3 + * Copyright (C) 2018 Stefan Roese <sr@denx.de>
  4 + */
  5 +
  6 +#ifndef __CONFIG_LINKIT_SMART_7688_H
  7 +#define __CONFIG_LINKIT_SMART_7688_H
  8 +
  9 +/* CPU */
  10 +#define CONFIG_SYS_MIPS_TIMER_FREQ 200000000
  11 +
  12 +/* RAM */
  13 +#define CONFIG_SYS_SDRAM_BASE 0x80000000
  14 +
  15 +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000
  16 +
  17 +#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
  18 +
  19 +#ifdef CONFIG_BOOT_RAM
  20 +#define CONFIG_SKIP_LOWLEVEL_INIT
  21 +#endif
  22 +
  23 +/* UART */
  24 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \
  25 + 230400, 500000, 1500000 }
  26 +
  27 +/* RAM */
  28 +#define CONFIG_SYS_MEMTEST_START 0x80100000
  29 +#define CONFIG_SYS_MEMTEST_END 0x80400000
  30 +
  31 +/* Memory usage */
  32 +#define CONFIG_SYS_MAXARGS 64
  33 +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
  34 +#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
  35 +#define CONFIG_SYS_CBSIZE 512
  36 +
  37 +/* U-Boot */
  38 +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  39 +
  40 +/* Environment settings */
  41 +#define CONFIG_ENV_OFFSET 0x40000
  42 +#define CONFIG_ENV_SIZE (16 << 10)
  43 +#define CONFIG_ENV_SECT_SIZE (64 << 10)
  44 +
  45 +/*
  46 + * Environment is right behind U-Boot in flash. Make sure U-Boot
  47 + * doesn't grow into the environment area.
  48 + */
  49 +#define CONFIG_BOARD_SIZE_LIMIT CONFIG_ENV_OFFSET
  50 +
  51 +#endif /* __CONFIG_LINKIT_SMART_7688_H */