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Commit b055e67f96d69dc0d273588cafa1cab95d1cabea

Authored by Roger Quadros
Committed by Tom Rini
1 parent d792b63feb
Exists in smarc_8mq_lf_v2020.04 and in 9 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

phy: ti-pipe3: Use TRM recommended settings for SATA DPLL 

The AM572x Technical Reference Manual, SPRUHZ6H,
Revised November 2016 [1], shows recommended settings for the
SATA DPLL in Table 26-8. DPLL CLKDCOLDO Recommended Settings.

Use those settings in the driver. The TRM does not show
a value for 20MHz SYS_CLK so we use something close to the
26MHz setting.

[1] - http://www.ti.com/lit/ug/spruhz6h/spruhz6h.pdf

Signed-off-by: Roger Quadros <rogerq@ti.com>

Showing 1 changed file with 7 additions and 7 deletions Side-by-side Diff

drivers/phy/ti-pipe3-phy.c
Diff comments   View file @ b055e67
... ... @@ -346,13 +346,13 @@
346 346 }
347 347  
348 348 static struct pipe3_dpll_map dpll_map_sata[] = {
349   - {12000000, {1000, 7, 4, 6, 0} }, /* 12 MHz */
350   - {16800000, {714, 7, 4, 6, 0} }, /* 16.8 MHz */
351   - {19200000, {625, 7, 4, 6, 0} }, /* 19.2 MHz */
352   - {20000000, {600, 7, 4, 6, 0} }, /* 20 MHz */
353   - {26000000, {461, 7, 4, 6, 0} }, /* 26 MHz */
354   - {38400000, {312, 7, 4, 6, 0} }, /* 38.4 MHz */
355   - { }, /* Terminator */
  349 + {12000000, {625, 4, 4, 6, 0} }, /* 12 MHz */
  350 + {16800000, {625, 6, 4, 7, 0} }, /* 16.8 MHz */
  351 + {19200000, {625, 7, 4, 6, 0} }, /* 19.2 MHz */
  352 + {20000000, {750, 9, 4, 6, 0} }, /* 20 MHz */
  353 + {26000000, {750, 12, 4, 6, 0} }, /* 26 MHz */
  354 + {38400000, {625, 15, 4, 6, 0} }, /* 38.4 MHz */
  355 + { }, /* Terminator */
356 356 };
357 357  
358 358 static struct pipe3_dpll_map dpll_map_usb[] = {