Eric Lee / smarc-uboot

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Commit b0f889b77b367b69aa0778b1d03a2ec30fdee243

Authored by Aymen Sghaier
Committed by Ye Li
1 parent 5d797db35d
Exists in smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga and in 5 other branches smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga

MLK-18044-1: crypto: caam: Add CAAM support to i.MX8M platforms 

This patch enable CAAM support for i.MX8M platforms.

Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
(cherry picked from commit 1fc92e6e34b06bdee81240ce06326aca1d9c02d8)

Showing 5 changed files with 27 additions and 6 deletions Side-by-side Diff

... ... @@ -611,6 +611,9 @@
611 611 config ARCH_IMX8M
612 612 bool "NXP i.MX8M platform"
613 613 select ARM64
  614 + select SYS_FSL_HAS_SEC if SECURE_BOOT
  615 + select SYS_FSL_SEC_COMPAT_4
  616 + select SYS_FSL_SEC_LE
614 617 select DM
615 618 select SUPPORT_SPL
616 619  
arch/arm/include/asm/arch-imx8m/imx-regs.h
Diff comments   View file @ b0f889b
1 1 /*
2   - * Copyright 2017 NXP
  2 + * Copyright 2017-2018 NXP
3 3 *
4 4 * SPDX-License-Identifier: GPL-2.0+
5 5 */
... ... @@ -129,6 +129,16 @@
129 129 #define DDRC_IPS_BASE_ADDR(X) (0x3d400000 + ((X) * 0x2000000))
130 130 #define DDR_CSD1_BASE_ADDR 0x40000000
131 131  
  132 +#define CAAM_ARB_BASE_ADDR (0x00100000)
  133 +#define CAAM_ARB_END_ADDR (0x00107FFF)
  134 +#define CAAM_IPS_BASE_ADDR (0x30900000)
  135 +#define CONFIG_SYS_FSL_SEC_OFFSET (0)
  136 +#define CONFIG_SYS_FSL_SEC_ADDR (CAAM_IPS_BASE_ADDR + \
  137 + CONFIG_SYS_FSL_SEC_OFFSET)
  138 +#define CONFIG_SYS_FSL_JR0_OFFSET (0x1000)
  139 +#define CONFIG_SYS_FSL_JR0_ADDR (CONFIG_SYS_FSL_SEC_ADDR + \
  140 + CONFIG_SYS_FSL_JR0_OFFSET)
  141 +#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
132 142 #if !defined(__ASSEMBLY__)
133 143 #include <asm/types.h>
134 144 #include <linux/bitops.h>
arch/arm/mach-imx/imx8m/Kconfig
Diff comments   View file @ b0f889b
... ... @@ -2,6 +2,7 @@
2 2  
3 3 config IMX8M
4 4 bool
  5 + select HAS_CAAM
5 6 select ROM_UNIFIED_SECTIONS
6 7  
7 8 choice
drivers/crypto/fsl/jobdesc.c
Diff comments   View file @ b0f889b
... ... @@ -3,6 +3,7 @@
3 3 * Basic job descriptor construction
4 4 *
5 5 * Copyright 2014 Freescale Semiconductor, Inc.
  6 + * Copyright 2018 NXP
6 7 *
7 8 * SPDX-License-Identifier: GPL-2.0+
8 9 *
... ... @@ -14,7 +15,8 @@
14 15 #include "jobdesc.h"
15 16 #include "rsa_caam.h"
16 17  
17   -#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
  18 +#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP) || \
  19 + defined(CONFIG_IMX8M)
18 20 /*!
19 21 * Secure memory run command
20 22 *
... ... @@ -2,6 +2,7 @@
2 2 * Common internal memory map for some Freescale SoCs
3 3 *
4 4 * Copyright 2014 Freescale Semiconductor, Inc.
  5 + * Copyright 2018 NXP
5 6 *
6 7 * SPDX-License-Identifier: GPL-2.0+
7 8 */
... ... @@ -152,7 +153,8 @@
152 153  
153 154 struct jr_regs {
154 155 #if defined(CONFIG_SYS_FSL_SEC_LE) && \
155   - !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP))
  156 + !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || \
  157 + defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M))
156 158 u32 irba_l;
157 159 u32 irba_h;
158 160 #else
... ... @@ -166,7 +168,8 @@
166 168 u32 rsvd3;
167 169 u32 irja;
168 170 #if defined(CONFIG_SYS_FSL_SEC_LE) && \
169   - !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP))
  171 + !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || \
  172 + defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M))
170 173 u32 orba_l;
171 174 u32 orba_h;
172 175 #else
... ... @@ -199,7 +202,8 @@
199 202 */
200 203 struct sg_entry {
201 204 #if defined(CONFIG_SYS_FSL_SEC_LE) && \
202   - !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP))
  205 + !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || \
  206 + defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M))
203 207 uint32_t addr_lo; /* Memory Address - lo */
204 208 uint32_t addr_hi; /* Memory Address of start of buffer - hi */
205 209 #else
... ... @@ -220,7 +224,8 @@
220 224  
221 225 #define BLOB_SIZE(x) ((x) + 32 + 16) /* Blob buffer size */
222 226  
223   -#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
  227 +#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || \
  228 + defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M)
224 229 /* Job Ring Base Address */
225 230 #define JR_BASE_ADDR(x) (CONFIG_SYS_FSL_SEC_ADDR + 0x1000 * (x + 1))
226 231 /* Secure Memory Offset varies accross versions */