Commit b1747fdb82e9a2befb65b762ba7579b3870d47cb

Authored by Tom Warren
1 parent 2fcc3ba1b7

qspi: t210: Use dev_read calls to get FDT data like base, freq

This Tegra QSPI driver hadn't been brought up to date with how
DM drivers are fetching data from the FDT now, and was pulling
in bogus data for base, max freq, etc. Fixed ofdata_to_platdata
to work the same way it does in the tegra114 SPI driver, using
dev_read_ functions.

Signed-off-by: Tom Warren <twarren@nvidia.com>

Showing 1 changed file with 7 additions and 8 deletions Side-by-side Diff

drivers/spi/tegra210_qspi.c
... ... @@ -2,7 +2,7 @@
2 2 /*
3 3 * NVIDIA Tegra210 QSPI controller driver
4 4 *
5   - * (C) Copyright 2015-2019 NVIDIA Corporation <www.nvidia.com>
  5 + * (C) Copyright 2015-2020 NVIDIA Corporation <www.nvidia.com>
6 6 *
7 7 */
8 8  
9 9  
... ... @@ -97,10 +97,8 @@
97 97 static int tegra210_qspi_ofdata_to_platdata(struct udevice *bus)
98 98 {
99 99 struct tegra_spi_platdata *plat = bus->platdata;
100   - const void *blob = gd->fdt_blob;
101   - int node = dev_of_offset(bus);
102 100  
103   - plat->base = devfdt_get_addr(bus);
  101 + plat->base = dev_read_addr(bus);
104 102 plat->periph_id = clock_decode_periph_id(bus);
105 103  
106 104 if (plat->periph_id == PERIPH_ID_NONE) {
... ... @@ -110,10 +108,11 @@
110 108 }
111 109  
112 110 /* Use 500KHz as a suitable default */
113   - plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
114   - 500000);
115   - plat->deactivate_delay_us = fdtdec_get_int(blob, node,
116   - "spi-deactivate-delay", 0);
  111 + plat->frequency = dev_read_u32_default(bus, "spi-max-frequency",
  112 + 500000);
  113 + plat->deactivate_delay_us = dev_read_u32_default(bus,
  114 + "spi-deactivate-delay",
  115 + 0);
117 116 debug("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n",
118 117 __func__, plat->base, plat->periph_id, plat->frequency,
119 118 plat->deactivate_delay_us);