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Commit b38eaec53570821043c94ad44eabcb23747d9969

Authored by Robert P. J. Day
Committed by Tom Rini
1 parent 700877a62b
Exists in v2017.01-smarct4x and in 29 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-n7.1.2_2.0.0-ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

include/configs: Numerous typo fixes: "controler" -> "controller". 

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>

Showing 34 changed files with 82 additions and 82 deletions Side-by-side Diff

include/configs/B4860QDS.h
Diff comments   View file @ b38eaec
... ... @@ -83,7 +83,7 @@
83 83 #define CONFIG_FSL_IFC /* Enable IFC Support */
84 84 #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
85 85 #define CONFIG_PCI /* Enable PCI/PCIE */
86   -#define CONFIG_PCIE1 /* PCIE controler 1 */
  86 +#define CONFIG_PCIE1 /* PCIE controller 1 */
87 87 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
88 88 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
89 89  
include/configs/BSC9132QDS.h
Diff comments   View file @ b38eaec
... ... @@ -85,7 +85,7 @@
85 85  
86 86 #define CONFIG_PCI /* Enable PCI/PCIE */
87 87 #if defined(CONFIG_PCI)
88   -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
  88 +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
89 89 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
90 90 #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
91 91 #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
include/configs/C29XPCIE.h
Diff comments   View file @ b38eaec
... ... @@ -92,7 +92,7 @@
92 92  
93 93 #define CONFIG_PCI /* Enable PCI/PCIE */
94 94 #ifdef CONFIG_PCI
95   -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
  95 +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
96 96 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
97 97 #define CONFIG_PCI_INDIRECT_BRIDGE
98 98 #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
include/configs/MPC8536DS.h
Diff comments   View file @ b38eaec
... ... @@ -51,9 +51,9 @@
51 51 #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */
52 52 #define CONFIG_PCI 1 /* Enable PCI/PCIE */
53 53 #define CONFIG_PCI1 1 /* Enable PCI controller 1 */
54   -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
55   -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */
56   -#define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */
  54 +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */
  55 +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */
  56 +#define CONFIG_PCIE3 1 /* PCIE controller 3 (ULI bridge) */
57 57 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
58 58 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */
59 59 #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
include/configs/MPC8544DS.h
Diff comments   View file @ b38eaec
... ... @@ -25,9 +25,9 @@
25 25  
26 26 #define CONFIG_PCI 1 /* Enable PCI/PCIE */
27 27 #define CONFIG_PCI1 1 /* PCI controller 1 */
28   -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
29   -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */
30   -#define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */
  28 +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */
  29 +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */
  30 +#define CONFIG_PCIE3 1 /* PCIE controller 3 (ULI bridge) */
31 31 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
32 32 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */
33 33 #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
include/configs/MPC8548CDS.h
Diff comments   View file @ b38eaec
... ... @@ -34,7 +34,7 @@
34 34  
35 35 #define CONFIG_PCI /* enable any pci type devices */
36 36 #define CONFIG_PCI1 /* PCI controller 1 */
37   -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
  37 +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
38 38 #undef CONFIG_PCI2
39 39 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
40 40 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */
include/configs/MPC8572DS.h
Diff comments   View file @ b38eaec
... ... @@ -40,9 +40,9 @@
40 40  
41 41 #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */
42 42 #define CONFIG_PCI 1 /* Enable PCI/PCIE */
43   -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
44   -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */
45   -#define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */
  43 +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */
  44 +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */
  45 +#define CONFIG_PCIE3 1 /* PCIE controller 3 (ULI bridge) */
46 46 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
47 47 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */
48 48 #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
include/configs/MPC8610HPCD.h
Diff comments   View file @ b38eaec
... ... @@ -45,7 +45,7 @@
45 45 #define CONFIG_SYS_SCRATCH_VA 0xc0000000
46 46  
47 47 #define CONFIG_PCI 1 /* Enable PCI/PCIE*/
48   -#define CONFIG_PCI1 1 /* PCI controler 1 */
  48 +#define CONFIG_PCI1 1 /* PCI controller 1 */
49 49 #define CONFIG_PCIE1 1 /* PCIe 1 connected to ULI bridge */
50 50 #define CONFIG_PCIE2 1 /* PCIe 2 connected to slot */
51 51 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
include/configs/MPC8641HPCN.h
Diff comments   View file @ b38eaec
... ... @@ -46,8 +46,8 @@
46 46 #define CONFIG_SRIO1 /* SRIO port 1 */
47 47  
48 48 #define CONFIG_PCI 1 /* Enable PCI/PCIE */
49   -#define CONFIG_PCIE1 1 /* PCIE controler 1 (ULI bridge) */
50   -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot) */
  49 +#define CONFIG_PCIE1 1 /* PCIE controller 1 (ULI bridge) */
  50 +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot) */
51 51 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
52 52 #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
53 53 #define CONFIG_FSL_LAW 1 /* Use common FSL law init code */
include/configs/P1010RDB.h
Diff comments   View file @ b38eaec
... ... @@ -176,8 +176,8 @@
176 176  
177 177 #define CONFIG_PCI /* Enable PCI/PCIE */
178 178 #if defined(CONFIG_PCI)
179   -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
180   -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */
  179 +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
  180 +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */
181 181 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
182 182 #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
183 183 #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
include/configs/P1022DS.h
Diff comments   View file @ b38eaec
... ... @@ -134,9 +134,9 @@
134 134  
135 135 #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
136 136 #define CONFIG_PCI /* Enable PCI/PCIE */
137   -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
138   -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */
139   -#define CONFIG_PCIE3 /* PCIE controler 3 (ULI bridge) */
  137 +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
  138 +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */
  139 +#define CONFIG_PCIE3 /* PCIE controller 3 (ULI bridge) */
140 140 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
141 141 #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
142 142 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
include/configs/P1023RDB.h
Diff comments   View file @ b38eaec
... ... @@ -33,9 +33,9 @@
33 33 #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
34 34 #define CONFIG_PCI /* Enable PCI/PCIE */
35 35 #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
36   -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
37   -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */
38   -#define CONFIG_PCIE3 /* PCIE controler 3 (slot 3) */
  36 +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
  37 +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */
  38 +#define CONFIG_PCIE3 /* PCIE controller 3 (slot 3) */
39 39 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
40 40 #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
41 41 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
include/configs/P2041RDB.h
Diff comments   View file @ b38eaec
... ... @@ -52,9 +52,9 @@
52 52 #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
53 53 #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
54 54 #define CONFIG_PCI /* Enable PCI/PCIE */
55   -#define CONFIG_PCIE1 /* PCIE controler 1 */
56   -#define CONFIG_PCIE2 /* PCIE controler 2 */
57   -#define CONFIG_PCIE3 /* PCIE controler 3 */
  55 +#define CONFIG_PCIE1 /* PCIE controller 1 */
  56 +#define CONFIG_PCIE2 /* PCIE controller 2 */
  57 +#define CONFIG_PCIE3 /* PCIE controller 3 */
58 58 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
59 59 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
60 60  
include/configs/T102xQDS.h
Diff comments   View file @ b38eaec
... ... @@ -577,9 +577,9 @@
577 577 * Memory space is mapped 1-1, but I/O space must start from 0.
578 578 */
579 579 #define CONFIG_PCI /* Enable PCI/PCIE */
580   -#define CONFIG_PCIE1 /* PCIE controler 1 */
581   -#define CONFIG_PCIE2 /* PCIE controler 2 */
582   -#define CONFIG_PCIE3 /* PCIE controler 3 */
  580 +#define CONFIG_PCIE1 /* PCIE controller 1 */
  581 +#define CONFIG_PCIE2 /* PCIE controller 2 */
  582 +#define CONFIG_PCIE3 /* PCIE controller 3 */
583 583 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
584 584 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
585 585 #define CONFIG_PCI_INDIRECT_BRIDGE
include/configs/T102xRDB.h
Diff comments   View file @ b38eaec
... ... @@ -563,11 +563,11 @@
563 563 * Memory space is mapped 1-1, but I/O space must start from 0.
564 564 */
565 565 #define CONFIG_PCI /* Enable PCI/PCIE */
566   -#define CONFIG_PCIE1 /* PCIE controler 1 */
567   -#define CONFIG_PCIE2 /* PCIE controler 2 */
568   -#define CONFIG_PCIE3 /* PCIE controler 3 */
  566 +#define CONFIG_PCIE1 /* PCIE controller 1 */
  567 +#define CONFIG_PCIE2 /* PCIE controller 2 */
  568 +#define CONFIG_PCIE3 /* PCIE controller 3 */
569 569 #ifdef CONFIG_PPC_T1040
570   -#define CONFIG_PCIE4 /* PCIE controler 4 */
  570 +#define CONFIG_PCIE4 /* PCIE controller 4 */
571 571 #endif
572 572 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
573 573 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
include/configs/T1040QDS.h
Diff comments   View file @ b38eaec
... ... @@ -65,10 +65,10 @@
65 65 #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
66 66 #define CONFIG_PCI /* Enable PCI/PCIE */
67 67 #define CONFIG_PCI_INDIRECT_BRIDGE
68   -#define CONFIG_PCIE1 /* PCIE controler 1 */
69   -#define CONFIG_PCIE2 /* PCIE controler 2 */
70   -#define CONFIG_PCIE3 /* PCIE controler 3 */
71   -#define CONFIG_PCIE4 /* PCIE controler 4 */
  68 +#define CONFIG_PCIE1 /* PCIE controller 1 */
  69 +#define CONFIG_PCIE2 /* PCIE controller 2 */
  70 +#define CONFIG_PCIE3 /* PCIE controller 3 */
  71 +#define CONFIG_PCIE4 /* PCIE controller 4 */
72 72  
73 73 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
74 74 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
include/configs/T104xRDB.h
Diff comments   View file @ b38eaec
... ... @@ -130,10 +130,10 @@
130 130 #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
131 131 #define CONFIG_PCI /* Enable PCI/PCIE */
132 132 #define CONFIG_PCI_INDIRECT_BRIDGE
133   -#define CONFIG_PCIE1 /* PCIE controler 1 */
134   -#define CONFIG_PCIE2 /* PCIE controler 2 */
135   -#define CONFIG_PCIE3 /* PCIE controler 3 */
136   -#define CONFIG_PCIE4 /* PCIE controler 4 */
  133 +#define CONFIG_PCIE1 /* PCIE controller 1 */
  134 +#define CONFIG_PCIE2 /* PCIE controller 2 */
  135 +#define CONFIG_PCIE3 /* PCIE controller 3 */
  136 +#define CONFIG_PCIE4 /* PCIE controller 4 */
137 137  
138 138 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
139 139 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
include/configs/T208xQDS.h
Diff comments   View file @ b38eaec
... ... @@ -550,10 +550,10 @@
550 550 * Memory space is mapped 1-1, but I/O space must start from 0.
551 551 */
552 552 #define CONFIG_PCI /* Enable PCI/PCIE */
553   -#define CONFIG_PCIE1 /* PCIE controler 1 */
554   -#define CONFIG_PCIE2 /* PCIE controler 2 */
555   -#define CONFIG_PCIE3 /* PCIE controler 3 */
556   -#define CONFIG_PCIE4 /* PCIE controler 4 */
  553 +#define CONFIG_PCIE1 /* PCIE controller 1 */
  554 +#define CONFIG_PCIE2 /* PCIE controller 2 */
  555 +#define CONFIG_PCIE3 /* PCIE controller 3 */
  556 +#define CONFIG_PCIE4 /* PCIE controller 4 */
557 557 #define CONFIG_FSL_PCIE_RESET
558 558 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
559 559 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
include/configs/T208xRDB.h
Diff comments   View file @ b38eaec
... ... @@ -500,10 +500,10 @@
500 500 * Memory space is mapped 1-1, but I/O space must start from 0.
501 501 */
502 502 #define CONFIG_PCI /* Enable PCI/PCIE */
503   -#define CONFIG_PCIE1 /* PCIE controler 1 */
504   -#define CONFIG_PCIE2 /* PCIE controler 2 */
505   -#define CONFIG_PCIE3 /* PCIE controler 3 */
506   -#define CONFIG_PCIE4 /* PCIE controler 4 */
  503 +#define CONFIG_PCIE1 /* PCIE controller 1 */
  504 +#define CONFIG_PCIE2 /* PCIE controller 2 */
  505 +#define CONFIG_PCIE3 /* PCIE controller 3 */
  506 +#define CONFIG_PCIE4 /* PCIE controller 4 */
507 507 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
508 508 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
509 509 /* controller 1, direct to uli, tgtid 3, Base address 20000 */
include/configs/T4240RDB.h
Diff comments   View file @ b38eaec
... ... @@ -92,9 +92,9 @@
92 92 #define CONFIG_FSL_IFC /* Enable IFC Support */
93 93 #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
94 94 #define CONFIG_PCI /* Enable PCI/PCIE */
95   -#define CONFIG_PCIE1 /* PCIE controler 1 */
96   -#define CONFIG_PCIE2 /* PCIE controler 2 */
97   -#define CONFIG_PCIE3 /* PCIE controler 3 */
  95 +#define CONFIG_PCIE1 /* PCIE controller 1 */
  96 +#define CONFIG_PCIE2 /* PCIE controller 2 */
  97 +#define CONFIG_PCIE3 /* PCIE controller 3 */
98 98 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
99 99 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
100 100  
include/configs/controlcenterd.h
Diff comments   View file @ b38eaec
... ... @@ -245,7 +245,7 @@
245 245 * Memory space is mapped 1-1, but I/O space must start from 0.
246 246 */
247 247 #define CONFIG_PCI /* Enable PCI/PCIE */
248   -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
  248 +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
249 249 #define CONFIG_PCI_INDIRECT_BRIDGE
250 250 #define CONFIG_PCI_PNP /* do pci plug-and-play */
251 251 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
include/configs/corenet_ds.h
Diff comments   View file @ b38eaec
... ... @@ -67,8 +67,8 @@
67 67 #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
68 68 #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
69 69 #define CONFIG_PCI /* Enable PCI/PCIE */
70   -#define CONFIG_PCIE1 /* PCIE controler 1 */
71   -#define CONFIG_PCIE2 /* PCIE controler 2 */
  70 +#define CONFIG_PCIE1 /* PCIE controller 1 */
  71 +#define CONFIG_PCIE2 /* PCIE controller 2 */
72 72 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
73 73 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
74 74  
include/configs/cyrus.h
Diff comments   View file @ b38eaec
... ... @@ -59,8 +59,8 @@
59 59 #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
60 60 #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
61 61 #define CONFIG_PCI /* Enable PCI/PCIE */
62   -#define CONFIG_PCIE1 /* PCIE controler 1 */
63   -#define CONFIG_PCIE2 /* PCIE controler 2 */
  62 +#define CONFIG_PCIE1 /* PCIE controller 1 */
  63 +#define CONFIG_PCIE2 /* PCIE controller 2 */
64 64 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
65 65 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
66 66  
include/configs/km/kmp204x-common.h
Diff comments   View file @ b38eaec
... ... @@ -45,8 +45,8 @@
45 45 #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
46 46 #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
47 47 #define CONFIG_PCI /* Enable PCI/PCIE */
48   -#define CONFIG_PCIE1 /* PCIE controler 1 */
49   -#define CONFIG_PCIE3 /* PCIE controler 3 */
  48 +#define CONFIG_PCIE1 /* PCIE controller 1 */
  49 +#define CONFIG_PCIE3 /* PCIE controller 3 */
50 50 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
51 51 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
52 52  
include/configs/ls1021aqds.h
Diff comments   View file @ b38eaec
... ... @@ -528,8 +528,8 @@
528 528  
529 529 /* PCIe */
530 530 #define CONFIG_PCI /* Enable PCI/PCIE */
531   -#define CONFIG_PCIE1 /* PCIE controler 1 */
532   -#define CONFIG_PCIE2 /* PCIE controler 2 */
  531 +#define CONFIG_PCIE1 /* PCIE controller 1 */
  532 +#define CONFIG_PCIE2 /* PCIE controller 2 */
533 533 #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
534 534 #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
535 535  
include/configs/ls1021atwr.h
Diff comments   View file @ b38eaec
... ... @@ -377,8 +377,8 @@
377 377  
378 378 /* PCIe */
379 379 #define CONFIG_PCI /* Enable PCI/PCIE */
380   -#define CONFIG_PCIE1 /* PCIE controler 1 */
381   -#define CONFIG_PCIE2 /* PCIE controler 2 */
  380 +#define CONFIG_PCIE1 /* PCIE controller 1 */
  381 +#define CONFIG_PCIE2 /* PCIE controller 2 */
382 382 #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
383 383 #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
384 384  
include/configs/ls2080a_common.h
Diff comments   View file @ b38eaec
... ... @@ -185,10 +185,10 @@
185 185 #endif
186 186  
187 187 /* PCIe */
188   -#define CONFIG_PCIE1 /* PCIE controler 1 */
189   -#define CONFIG_PCIE2 /* PCIE controler 2 */
190   -#define CONFIG_PCIE3 /* PCIE controler 3 */
191   -#define CONFIG_PCIE4 /* PCIE controler 4 */
  188 +#define CONFIG_PCIE1 /* PCIE controller 1 */
  189 +#define CONFIG_PCIE2 /* PCIE controller 2 */
  190 +#define CONFIG_PCIE3 /* PCIE controller 3 */
  191 +#define CONFIG_PCIE4 /* PCIE controller 4 */
192 192 #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
193 193 #ifdef CONFIG_LS2080A
194 194 #define FSL_PCIE_COMPAT "fsl,ls2080a-pcie"
include/configs/p1_p2_rdb_pc.h
Diff comments   View file @ b38eaec
... ... @@ -306,8 +306,8 @@
306 306  
307 307 #define CONFIG_FSL_ELBC
308 308 #define CONFIG_PCI
309   -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
310   -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */
  309 +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
  310 +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */
311 311 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
312 312 #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
313 313 #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
include/configs/p1_twr.h
Diff comments   View file @ b38eaec
... ... @@ -48,8 +48,8 @@
48 48  
49 49 #define CONFIG_FSL_ELBC
50 50 #define CONFIG_PCI
51   -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
52   -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */
  51 +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
  52 +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */
53 53 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
54 54 #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
55 55 #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
include/configs/sbc8641d.h
Diff comments   View file @ b38eaec
... ... @@ -44,8 +44,8 @@
44 44 #define CONFIG_SRIO1 /* SRIO port 1 */
45 45  
46 46 #define CONFIG_PCI 1 /* Enable PCIE */
47   -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
48   -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */
  47 +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */
  48 +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */
49 49 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
50 50 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */
51 51 #define CONFIG_FSL_LAW 1 /* Use common FSL init code */
include/configs/t4qds.h
Diff comments   View file @ b38eaec
... ... @@ -32,9 +32,9 @@
32 32 #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
33 33 #define CONFIG_FSL_IFC /* Enable IFC Support */
34 34 #define CONFIG_PCI /* Enable PCI/PCIE */
35   -#define CONFIG_PCIE1 /* PCIE controler 1 */
36   -#define CONFIG_PCIE2 /* PCIE controler 2 */
37   -#define CONFIG_PCIE3 /* PCIE controler 3 */
  35 +#define CONFIG_PCIE1 /* PCIE controller 1 */
  36 +#define CONFIG_PCIE2 /* PCIE controller 2 */
  37 +#define CONFIG_PCIE3 /* PCIE controller 3 */
38 38 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
39 39 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
40 40  
include/configs/xpedite517x.h
Diff comments   View file @ b38eaec
... ... @@ -30,8 +30,8 @@
30 30 #define CONFIG_PCI 1 /* Enable PCI/PCIE */
31 31 #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
32 32 #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
33   -#define CONFIG_PCIE1 1 /* PCIE controler 1 */
34   -#define CONFIG_PCIE2 1 /* PCIE controler 2 */
  33 +#define CONFIG_PCIE1 1 /* PCIE controller 1 */
  34 +#define CONFIG_PCIE2 1 /* PCIE controller 2 */
35 35 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
36 36 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */
37 37 #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
include/configs/xpedite537x.h
Diff comments   View file @ b38eaec
... ... @@ -30,8 +30,8 @@
30 30 #define CONFIG_PCI 1 /* Enable PCI/PCIE */
31 31 #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
32 32 #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
33   -#define CONFIG_PCIE1 1 /* PCIE controler 1 */
34   -#define CONFIG_PCIE2 1 /* PCIE controler 2 */
  33 +#define CONFIG_PCIE1 1 /* PCIE controller 1 */
  34 +#define CONFIG_PCIE2 1 /* PCIE controller 2 */
35 35 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
36 36 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */
37 37 #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
include/configs/xpedite550x.h
Diff comments   View file @ b38eaec
... ... @@ -31,7 +31,7 @@
31 31 #define CONFIG_PCI 1 /* Enable PCI/PCIE */
32 32 #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
33 33 #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
34   -#define CONFIG_PCIE1 1 /* PCIE controler 1 (PEX8112 or XMC) */
  34 +#define CONFIG_PCIE1 1 /* PCIE controller 1 (PEX8112 or XMC) */
35 35 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
36 36 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */
37 37 #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */