Commit b4fee1610864036c8363e552f8547e99b1100f0b
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fd399a1839
Exists in
smarc_8mq_lf_v2020.04
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stm32mp1: add support for virtual partition read
Add read for OTP and PMIC NVM with alternates on virtual DFU device. Serie-cc: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Showing 4 changed files with 86 additions and 0 deletions Side-by-side Diff
board/st/stm32mp1/stm32mp1.c
... | ... | @@ -992,9 +992,92 @@ |
992 | 992 | if (!IS_ERR_OR_NULL(mtd)) |
993 | 993 | board_get_alt_info("spi-nand0", buf); |
994 | 994 | |
995 | +#ifdef CONFIG_DFU_VIRT | |
996 | + strncat(buf, "&virt 0=OTP", DFU_ALT_BUF_LEN); | |
997 | + | |
998 | + if (IS_ENABLED(CONFIG_PMIC_STPMIC1)) | |
999 | + strncat(buf, "&virt 1=PMIC", DFU_ALT_BUF_LEN); | |
1000 | +#endif | |
1001 | + | |
995 | 1002 | env_set("dfu_alt_info", buf); |
996 | 1003 | puts("DFU alt info setting: done\n"); |
997 | 1004 | } |
1005 | + | |
1006 | +#if CONFIG_IS_ENABLED(DFU_VIRT) | |
1007 | +#include <dfu.h> | |
1008 | +#include <power/stpmic1.h> | |
1009 | + | |
1010 | +int dfu_otp_read(u64 offset, u8 *buffer, long *size) | |
1011 | +{ | |
1012 | + struct udevice *dev; | |
1013 | + int ret; | |
1014 | + | |
1015 | + ret = uclass_get_device_by_driver(UCLASS_MISC, | |
1016 | + DM_GET_DRIVER(stm32mp_bsec), | |
1017 | + &dev); | |
1018 | + if (ret) | |
1019 | + return ret; | |
1020 | + | |
1021 | + ret = misc_read(dev, offset + STM32_BSEC_OTP_OFFSET, buffer, *size); | |
1022 | + if (ret >= 0) { | |
1023 | + *size = ret; | |
1024 | + ret = 0; | |
1025 | + } | |
1026 | + | |
1027 | + return 0; | |
1028 | +} | |
1029 | + | |
1030 | +int dfu_pmic_read(u64 offset, u8 *buffer, long *size) | |
1031 | +{ | |
1032 | + int ret; | |
1033 | +#ifdef CONFIG_PMIC_STPMIC1 | |
1034 | + struct udevice *dev; | |
1035 | + | |
1036 | + ret = uclass_get_device_by_driver(UCLASS_MISC, | |
1037 | + DM_GET_DRIVER(stpmic1_nvm), | |
1038 | + &dev); | |
1039 | + if (ret) | |
1040 | + return ret; | |
1041 | + | |
1042 | + ret = misc_read(dev, 0xF8 + offset, buffer, *size); | |
1043 | + if (ret >= 0) { | |
1044 | + *size = ret; | |
1045 | + ret = 0; | |
1046 | + } | |
1047 | + if (ret == -EACCES) { | |
1048 | + *size = 0; | |
1049 | + ret = 0; | |
1050 | + } | |
1051 | +#else | |
1052 | + pr_err("PMIC update not supported"); | |
1053 | + ret = -EOPNOTSUPP; | |
1054 | +#endif | |
1055 | + | |
1056 | + return ret; | |
1057 | +} | |
1058 | + | |
1059 | +int dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset, | |
1060 | + void *buf, long *len) | |
1061 | +{ | |
1062 | + switch (dfu->data.virt.dev_num) { | |
1063 | + case 0x0: | |
1064 | + return dfu_otp_read(offset, buf, len); | |
1065 | + case 0x1: | |
1066 | + return dfu_pmic_read(offset, buf, len); | |
1067 | + } | |
1068 | + *len = 0; | |
1069 | + return 0; | |
1070 | +} | |
1071 | + | |
1072 | +int __weak dfu_get_medium_size_virt(struct dfu_entity *dfu, u64 *size) | |
1073 | +{ | |
1074 | + *size = SZ_1K; | |
1075 | + | |
1076 | + return 0; | |
1077 | +} | |
1078 | + | |
1079 | +#endif | |
1080 | + | |
998 | 1081 | #endif |
999 | 1082 | |
1000 | 1083 | static void board_copro_image_process(ulong fw_image, size_t fw_size) |
configs/stm32mp15_basic_defconfig
configs/stm32mp15_optee_defconfig
configs/stm32mp15_trusted_defconfig