Commit b581626c1e2474a3dadf69d4f0e0582eccbc4235
Committed by
Kim Phillips
1 parent
3c92217732
Exists in
master
and in
54 other branches
mpc83xx: correctly set encryption and I2C bus 0 clock
This patch makes sure the correct mask is applied when setting the encryption and I2C bus 0 clock in SCCR. Failing to do so may lead to ENCCM being 0 in which case I2C bus 0 won't function. Signed-off-by: Norbert van Bolhuis <nvbolhuis@aimvalley.nl> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Showing 1 changed file with 1 additions and 1 deletions Side-by-side Diff
cpu/mpc83xx/cpu_init.c
... | ... | @@ -106,7 +106,7 @@ |
106 | 106 | #ifdef CONFIG_SYS_SCCR_ENCCM |
107 | 107 | /* Encryption clock mode */ |
108 | 108 | im->clk.sccr = (im->clk.sccr & ~SCCR_ENCCM) | |
109 | - (CONFIG_SYS_SCCR_ENCCM << SCCR_PCICM_SHIFT); | |
109 | + (CONFIG_SYS_SCCR_ENCCM << SCCR_ENCCM_SHIFT); | |
110 | 110 | #endif |
111 | 111 | |
112 | 112 | #ifdef CONFIG_SYS_SCCR_PCICM |