board: amlogic: add support for S400 board

The S400 board is the Amlogic AXG SoC reference board including : - Amlogic A113DX ARM Cortex-A53 quad-core SoC @ 1.2GHz - 1GB DDR4 SDRAM - 10/100 Ethernet - 2 x USB 2.0 Host - eMMC - Infrared receiver - SDIO WiFi Module - MIPI DSI Connector - Audio HAT Connector - PCI-E M.2 Connectors Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

board: amlogic: add support for S400 board
The S400 board is the Amlogic AXG SoC reference board including : - Amlogic A113DX ARM Cortex-A53 quad-core SoC @ 1.2GHz - 1GB DDR4 SDRAM - 10/100 Ethernet - 2 x USB 2.0 Host - eMMC - Infrared receiver - SDIO WiFi Module - MIPI DSI Connector - Audio HAT Connector - PCI-E M.2 Connectors Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong
1 parent f6eb68b978
Showing 6 changed files with 194 additions and 0 deletions Side-by-side Diff
arch/arm/mach-meson/Kconfig
board/amlogic/s400/MAINTAINERS
board/amlogic/s400/Makefile
board/amlogic/s400/README
board/amlogic/s400/s400.c
configs/s400_defconfig
@@ -63,6 +63,7 @@
 	default "odroid-c2" if MESON_GXBB
 	default "p212" if MESON_GXL
 	default "q200" if MESON_GXM
+	default "s400" if MESON_AXG
 	default ""
 	help
 	  This option contains information about board name.
+S400
+M:	Neil Armstrong <narmstrong@baylibre.com>
+S:	Maintained
+F:	board/amlogic/s400/
+F:	include/configs/s400.h
+F:	configs/s400_defconfig
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2016 BayLibre, SAS
+# Author: Neil Armstrong <narmstrong@baylibre.com>
+
+obj-y	:= s400.o
+U-Boot for Amlogic S400
+=======================
+
+S400 is a reference board manufactured by Amlogic with the following
+specifications:
+
+ - Amlogic A113DX ARM Cortex-A53 quad-core SoC @ 1.2GHz
+ - 1GB DDR4 SDRAM
+ - 10/100 Ethernet
+ - 2 x USB 2.0 Host
+ - eMMC
+ - Infrared receiver
+ - SDIO WiFi Module
+ - MIPI DSI Connector
+ - Audio HAT Connector
+ - PCI-E M.2 Connectors
+
+Schematics are available from Amlogic on demand.
+
+Currently the u-boot port supports the following devices:
+ - serial
+ - eMMC
+ - Ethernet
+ - I2C
+ - Regulators
+ - Reset controller
+ - Clock controller
+ - USB Host
+ - ADC
+
+u-boot compilation
+==================
+
+ > export ARCH=arm
+ > export CROSS_COMPILE=aarch64-none-elf-
+ > make s400_defconfig
+ > make
+
+Image creation
+==============
+
+Amlogic doesn't provide sources for the firmware and for tools needed
+to create the bootloader image, so it is necessary to obtain them from
+the git tree published by the board vendor:
+
+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+ > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+ > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+ > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+ > git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot
+ > cd amlogic-u-boot
+ > make axg_s400_v1_defconfig
+ > make
+ > export FIPDIR=$PWD/fip
+
+Go back to mainline U-boot source tree then :
+ > mkdir fip
+
+ > cp $FIPDIR/axg/bl2.bin fip/
+ > cp $FIPDIR/axg/acs.bin fip/
+ > cp $FIPDIR/axg/bl21.bin fip/
+ > cp $FIPDIR/axg/bl30.bin fip/
+ > cp $FIPDIR/axg/bl301.bin fip/
+ > cp $FIPDIR/axg/bl31.img fip/
+ > cp u-boot.bin fip/bl33.bin
+
+ > $FIPDIR/blx_fix.sh \
+	fip/bl30.bin \
+	fip/zero_tmp \
+	fip/bl30_zero.bin \
+	fip/bl301.bin \
+	fip/bl301_zero.bin \
+	fip/bl30_new.bin \
+	bl30
+
+ > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+ > $FIPDIR/blx_fix.sh \
+	fip/bl2_acs.bin \
+	fip/zero_tmp \
+	fip/bl2_zero.bin \
+	fip/bl21.bin \
+	fip/bl21_zero.bin \
+	fip/bl2_new.bin \
+	bl2
+
+ > $FIPDIR/axg/aml_encrypt_axg --bl3sig --input fip/bl30_new.bin \
+					--output fip/bl30_new.bin.enc \
+					--level v3 --type bl30
+ > $FIPDIR/axg/aml_encrypt_axg --bl3sig --input fip/bl31.img \
+					--output fip/bl31.img.enc \
+					--level v3 --type bl31
+ > $FIPDIR/axg/aml_encrypt_axg --bl3sig --input fip/bl33.bin --compress lz4 \
+					--output fip/bl33.bin.enc \
+					--level v3 --type bl33
+ > $FIPDIR/axg/aml_encrypt_axg --bl2sig --input fip/bl2_new.bin \
+					--output fip/bl2.n.bin.sig
+ > $FIPDIR/axg/aml_encrypt_axg --bootmk \
+		--output fip/u-boot.bin \
+		--bl2 fip/bl2.n.bin.sig \
+		--bl30 fip/bl30_new.bin.enc \
+		--bl31 fip/bl31.img.enc \
+		--bl33 fip/bl33.bin.enc --level v3
+
+and then write the image to SD with:
+
+ > DEV=/dev/your_sd_device
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <environment.h>
+#include <asm/io.h>
+#include <asm/arch/axg.h>
+#include <asm/arch/sm.h>
+#include <asm/arch/eth.h>
+#include <asm/arch/mem.h>
+
+int board_init(void)
+{
+	return 0;
+}
+
+int misc_init_r(void)
+{
+	meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
+
+	return 0;
+}
+
+int ft_board_setup(void *blob, bd_t *bd)
+{
+	meson_init_reserved_memory(blob);
+
+	return 0;
+}
+CONFIG_ARM=y
+CONFIG_ARCH_MESON=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_MESON_AXG=y
+CONFIG_DEBUG_UART_BASE=0xff803000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_IDENT_STRING=" s400"
+CONFIG_DEBUG_UART=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_MISC_INIT_R=y
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="meson-axg-s400"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_MESON_GX=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_AXG=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_MESON=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_OF_LIBFDT_OVERLAY=y
...	...	@@ -63,6 +63,7 @@
63	63	default "odroid-c2" if MESON_GXBB
64	64	default "p212" if MESON_GXL
65	65	default "q200" if MESON_GXM
	66	+ default "s400" if MESON_AXG
66	67	default ""
67	68	help
68	69	This option contains information about board name.
	1	+S400
	2	+M: Neil Armstrong <narmstrong@baylibre.com>
	3	+S: Maintained
	4	+F: board/amlogic/s400/
	5	+F: include/configs/s400.h
	6	+F: configs/s400_defconfig
	1	+# SPDX-License-Identifier: GPL-2.0+
	2	+#
	3	+# (C) Copyright 2016 BayLibre, SAS
	4	+# Author: Neil Armstrong <narmstrong@baylibre.com>
	5	+
	6	+obj-y := s400.o
	1	+U-Boot for Amlogic S400
	2	+=======================
	3	+
	4	+S400 is a reference board manufactured by Amlogic with the following
	5	+specifications:
	6	+
	7	+ - Amlogic A113DX ARM Cortex-A53 quad-core SoC @ 1.2GHz
	8	+ - 1GB DDR4 SDRAM
	9	+ - 10/100 Ethernet
	10	+ - 2 x USB 2.0 Host
	11	+ - eMMC
	12	+ - Infrared receiver
	13	+ - SDIO WiFi Module
	14	+ - MIPI DSI Connector
	15	+ - Audio HAT Connector
	16	+ - PCI-E M.2 Connectors
	17	+
	18	+Schematics are available from Amlogic on demand.
	19	+
	20	+Currently the u-boot port supports the following devices:
	21	+ - serial
	22	+ - eMMC
	23	+ - Ethernet
	24	+ - I2C
	25	+ - Regulators
	26	+ - Reset controller
	27	+ - Clock controller
	28	+ - USB Host
	29	+ - ADC
	30	+
	31	+u-boot compilation
	32	+==================
	33	+
	34	+ > export ARCH=arm
	35	+ > export CROSS_COMPILE=aarch64-none-elf-
	36	+ > make s400_defconfig
	37	+ > make
	38	+
	39	+Image creation
	40	+==============
	41	+
	42	+Amlogic doesn't provide sources for the firmware and for tools needed
	43	+to create the bootloader image, so it is necessary to obtain them from
	44	+the git tree published by the board vendor:
	45	+
	46	+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
	47	+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
	48	+ > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
	49	+ > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
	50	+ > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
	51	+ > git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot
	52	+ > cd amlogic-u-boot
	53	+ > make axg_s400_v1_defconfig
	54	+ > make
	55	+ > export FIPDIR=$PWD/fip
	56	+
	57	+Go back to mainline U-boot source tree then :
	58	+ > mkdir fip
	59	+
	60	+ > cp $FIPDIR/axg/bl2.bin fip/
	61	+ > cp $FIPDIR/axg/acs.bin fip/
	62	+ > cp $FIPDIR/axg/bl21.bin fip/
	63	+ > cp $FIPDIR/axg/bl30.bin fip/
	64	+ > cp $FIPDIR/axg/bl301.bin fip/
	65	+ > cp $FIPDIR/axg/bl31.img fip/
	66	+ > cp u-boot.bin fip/bl33.bin
	67	+
	68	+ > $FIPDIR/blx_fix.sh \
	69	+ fip/bl30.bin \
	70	+ fip/zero_tmp \
	71	+ fip/bl30_zero.bin \
	72	+ fip/bl301.bin \
	73	+ fip/bl301_zero.bin \
	74	+ fip/bl30_new.bin \
	75	+ bl30
	76	+
	77	+ > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
	78	+
	79	+ > $FIPDIR/blx_fix.sh \
	80	+ fip/bl2_acs.bin \
	81	+ fip/zero_tmp \
	82	+ fip/bl2_zero.bin \
	83	+ fip/bl21.bin \
	84	+ fip/bl21_zero.bin \
	85	+ fip/bl2_new.bin \
	86	+ bl2
	87	+
	88	+ > $FIPDIR/axg/aml_encrypt_axg --bl3sig --input fip/bl30_new.bin \
	89	+ --output fip/bl30_new.bin.enc \
	90	+ --level v3 --type bl30
	91	+ > $FIPDIR/axg/aml_encrypt_axg --bl3sig --input fip/bl31.img \
	92	+ --output fip/bl31.img.enc \
	93	+ --level v3 --type bl31
	94	+ > $FIPDIR/axg/aml_encrypt_axg --bl3sig --input fip/bl33.bin --compress lz4 \
	95	+ --output fip/bl33.bin.enc \
	96	+ --level v3 --type bl33
	97	+ > $FIPDIR/axg/aml_encrypt_axg --bl2sig --input fip/bl2_new.bin \
	98	+ --output fip/bl2.n.bin.sig
	99	+ > $FIPDIR/axg/aml_encrypt_axg --bootmk \
	100	+ --output fip/u-boot.bin \
	101	+ --bl2 fip/bl2.n.bin.sig \
	102	+ --bl30 fip/bl30_new.bin.enc \
	103	+ --bl31 fip/bl31.img.enc \
	104	+ --bl33 fip/bl33.bin.enc --level v3
	105	+
	106	+and then write the image to SD with:
	107	+
	108	+ > DEV=/dev/your_sd_device
	109	+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
	110	+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
	1	+// SPDX-License-Identifier: GPL-2.0+
	2	+/*
	3	+ * Copyright (C) 2016 BayLibre, SAS
	4	+ * Author: Neil Armstrong <narmstrong@baylibre.com>
	5	+ */
	6	+
	7	+#include <common.h>
	8	+#include <dm.h>
	9	+#include <environment.h>
	10	+#include <asm/io.h>
	11	+#include <asm/arch/axg.h>
	12	+#include <asm/arch/sm.h>
	13	+#include <asm/arch/eth.h>
	14	+#include <asm/arch/mem.h>
	15	+
	16	+int board_init(void)
	17	+{
	18	+ return 0;
	19	+}
	20	+
	21	+int misc_init_r(void)
	22	+{
	23	+ meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
	24	+
	25	+ return 0;
	26	+}
	27	+
	28	+int ft_board_setup(void blob, bd_t bd)
	29	+{
	30	+ meson_init_reserved_memory(blob);
	31	+
	32	+ return 0;
	33	+}
	1	+CONFIG_ARM=y
	2	+CONFIG_ARCH_MESON=y
	3	+CONFIG_SYS_TEXT_BASE=0x01000000
	4	+CONFIG_MESON_AXG=y
	5	+CONFIG_DEBUG_UART_BASE=0xff803000
	6	+CONFIG_DEBUG_UART_CLOCK=24000000
	7	+CONFIG_IDENT_STRING=" s400"
	8	+CONFIG_DEBUG_UART=y
	9	+CONFIG_NR_DRAM_BANKS=1
	10	+CONFIG_OF_BOARD_SETUP=y
	11	+CONFIG_MISC_INIT_R=y
	12	+# CONFIG_DISPLAY_CPUINFO is not set
	13	+# CONFIG_DISPLAY_BOARDINFO is not set
	14	+# CONFIG_CMD_BDI is not set
	15	+# CONFIG_CMD_IMI is not set
	16	+CONFIG_CMD_GPIO=y
	17	+# CONFIG_CMD_LOADS is not set
	18	+CONFIG_CMD_MMC=y
	19	+# CONFIG_CMD_SETEXPR is not set
	20	+CONFIG_CMD_REGULATOR=y
	21	+CONFIG_OF_CONTROL=y
	22	+CONFIG_DEFAULT_DEVICE_TREE="meson-axg-s400"
	23	+CONFIG_NET_RANDOM_ETHADDR=y
	24	+CONFIG_DM_GPIO=y
	25	+CONFIG_DM_MMC=y
	26	+CONFIG_MMC_MESON_GX=y
	27	+CONFIG_DM_ETH=y
	28	+CONFIG_ETH_DESIGNWARE=y
	29	+CONFIG_PINCTRL=y
	30	+CONFIG_PINCTRL_MESON_AXG=y
	31	+CONFIG_DM_REGULATOR=y
	32	+CONFIG_DM_REGULATOR_FIXED=y
	33	+CONFIG_DM_RESET=y
	34	+CONFIG_DEBUG_UART_MESON=y
	35	+CONFIG_DEBUG_UART_ANNOUNCE=y
	36	+CONFIG_DEBUG_UART_SKIP_INIT=y
	37	+CONFIG_MESON_SERIAL=y
	38	+CONFIG_OF_LIBFDT_OVERLAY=y