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Commit b7588e3bdcdb2ee073a6a66a4c882b23feaaa0e6

Authored by Nitin Garg
Committed by Stefano Babic
1 parent f71cbfe3ca
Exists in v2017.01-smarct4x and in 48 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

ARM: Add workaround for Cortex-A9 errata 761320 

Full cache line writes to the same memory region from at least two
processors might deadlock the processor. Exists on r1, r2, r3
revisions.

Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>

Showing 2 changed files with 6 additions and 0 deletions Side-by-side Diff

... ... @@ -567,6 +567,7 @@
567 567 CONFIG_ARM_ERRATA_743622
568 568 CONFIG_ARM_ERRATA_751472
569 569 CONFIG_ARM_ERRATA_794072
  570 + CONFIG_ARM_ERRATA_761320
570 571  
571 572 If set, the workarounds for these ARM errata are applied early
572 573 during U-Boot startup. Note that these options force the
arch/arm/cpu/armv7/start.S
Diff comments   View file @ b7588e3
... ... @@ -222,6 +222,11 @@
222 222 orr r0, r0, #1 << 11 @ set bit #11
223 223 mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
224 224 #endif
  225 +#ifdef CONFIG_ARM_ERRATA_761320
  226 + mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
  227 + orr r0, r0, #1 << 21 @ set bit #21
  228 + mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
  229 +#endif
225 230  
226 231 mov pc, lr @ back to my caller
227 232 ENDPROC(cpu_init_cp15)