rockchip: rk3128: add sdram driver

RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width. This patch is only used for U-Boot, but not for SPL which will comes later, maybe after we merge all the common code into a common file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

rockchip: rk3128: add sdram driver
RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width. This patch is only used for U-Boot, but not for SPL which will comes later, maybe after we merge all the common code into a common file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang · Philipp Tomsich
1 parent ed7e64e5e8
Showing 2 changed files with 60 additions and 0 deletions Side-by-side Diff
drivers/ram/rockchip/Makefile
drivers/ram/rockchip/sdram_rk3128.c
@@ -5,6 +5,7 @@
 #
  
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
+obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3128.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+struct dram_info {
+	struct ram_info info;
+	struct rk3128_grf *grf;
+};
+
+static int rk3128_dmc_probe(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	debug("%s: grf=%p\n", __func__, priv->grf);
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size = rockchip_sdram_size(
+				(phys_addr_t)&priv->grf->os_reg[1]);
+
+	return 0;
+}
+
+static int rk3128_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops rk3128_dmc_ops = {
+	.get_info = rk3128_dmc_get_info,
+};
+
+static const struct udevice_id rk3128_dmc_ids[] = {
+	{ .compatible = "rockchip,rk3128-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_rk3128) = {
+	.name = "rockchip_rk3128_dmc",
+	.id = UCLASS_RAM,
+	.of_match = rk3128_dmc_ids,
+	.ops = &rk3128_dmc_ops,
+	.probe = rk3128_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+};
...	...	@@ -5,6 +5,7 @@
5	5	#
6	6
7	7	obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
	8	+obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
8	9	obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
9	10	obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
10	11	obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
	1	+/*
	2	+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
	3	+ *
	4	+ * SPDX-License-Identifier: GPL-2.0
	5	+ */
	6	+
	7	+#include <common.h>
	8	+#include <dm.h>
	9	+#include <ram.h>
	10	+#include <syscon.h>
	11	+#include <asm/arch/clock.h>
	12	+#include <asm/arch/grf_rk3128.h>
	13	+#include <asm/arch/sdram_common.h>
	14	+
	15	+DECLARE_GLOBAL_DATA_PTR;
	16	+struct dram_info {
	17	+ struct ram_info info;
	18	+ struct rk3128_grf *grf;
	19	+};
	20	+
	21	+static int rk3128_dmc_probe(struct udevice *dev)
	22	+{
	23	+ struct dram_info *priv = dev_get_priv(dev);
	24	+
	25	+ priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
	26	+ debug("%s: grf=%p\n", __func__, priv->grf);
	27	+ priv->info.base = CONFIG_SYS_SDRAM_BASE;
	28	+ priv->info.size = rockchip_sdram_size(
	29	+ (phys_addr_t)&priv->grf->os_reg[1]);
	30	+
	31	+ return 0;
	32	+}
	33	+
	34	+static int rk3128_dmc_get_info(struct udevice dev, struct ram_info info)
	35	+{
	36	+ struct dram_info *priv = dev_get_priv(dev);
	37	+
	38	+ *info = priv->info;
	39	+
	40	+ return 0;
	41	+}
	42	+
	43	+static struct ram_ops rk3128_dmc_ops = {
	44	+ .get_info = rk3128_dmc_get_info,
	45	+};
	46	+
	47	+static const struct udevice_id rk3128_dmc_ids[] = {
	48	+ { .compatible = "rockchip,rk3128-dmc" },
	49	+ { }
	50	+};
	51	+
	52	+U_BOOT_DRIVER(dmc_rk3128) = {
	53	+ .name = "rockchip_rk3128_dmc",
	54	+ .id = UCLASS_RAM,
	55	+ .of_match = rk3128_dmc_ids,
	56	+ .ops = &rk3128_dmc_ops,
	57	+ .probe = rk3128_dmc_probe,
	58	+ .priv_auto_alloc_size = sizeof(struct dram_info),
	59	+};