Eric Lee / smarc-uboot

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Commit b8e25ef16a58bee2770e48a7158e267f386c84de

Authored by Siva Durga Prasad Paladugu
Committed by Michal Simek
1 parent ca992e82e4
Exists in smarc_8mq_lf_v2020.04 and in 11 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

mmc: sdhci: Read capabilities register1 and update host caps 

This patch reads the capabilities register1 and update the host
caps accordingly for mmc layer usage. This patch mainly reads
for UHS capabilities inorder to support SD3.0.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Showing 2 changed files with 33 additions and 1 deletions Side-by-side Diff

... ... @@ -557,7 +557,7 @@
557 557 int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
558 558 u32 f_max, u32 f_min)
559 559 {
560   - u32 caps, caps_1;
  560 + u32 caps, caps_1 = 0;
561 561  
562 562 caps = sdhci_readl(host, SDHCI_CAPABILITIES);
563 563  
... ... @@ -637,6 +637,32 @@
637 637 cfg->host_caps &= ~MMC_MODE_HS;
638 638 cfg->host_caps &= ~MMC_MODE_HS_52MHz;
639 639 }
  640 +
  641 + if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
  642 + caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
  643 +
  644 + if (!(cfg->voltages & MMC_VDD_165_195) ||
  645 + (host->quirks & SDHCI_QUIRK_NO_1_8_V))
  646 + caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
  647 + SDHCI_SUPPORT_DDR50);
  648 +
  649 + if (caps_1 & (SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
  650 + SDHCI_SUPPORT_DDR50))
  651 + cfg->host_caps |= MMC_CAP(UHS_SDR12) | MMC_CAP(UHS_SDR25);
  652 +
  653 + if (caps_1 & SDHCI_SUPPORT_SDR104) {
  654 + cfg->host_caps |= MMC_CAP(UHS_SDR104) | MMC_CAP(UHS_SDR50);
  655 + /*
  656 + * SD3.0: SDR104 is supported so (for eMMC) the caps2
  657 + * field can be promoted to support HS200.
  658 + */
  659 + cfg->host_caps |= MMC_CAP(MMC_HS_200);
  660 + } else if (caps_1 & SDHCI_SUPPORT_SDR50) {
  661 + cfg->host_caps |= MMC_CAP(UHS_SDR50);
  662 + }
  663 +
  664 + if (caps_1 & SDHCI_SUPPORT_DDR50)
  665 + cfg->host_caps |= MMC_CAP(UHS_DDR50);
640 666  
641 667 if (host->host_caps)
642 668 cfg->host_caps |= host->host_caps;
... ... @@ -166,6 +166,11 @@
166 166 #define SDHCI_CAN_64BIT BIT(28)
167 167  
168 168 #define SDHCI_CAPABILITIES_1 0x44
  169 +#define SDHCI_SUPPORT_SDR50 0x00000001
  170 +#define SDHCI_SUPPORT_SDR104 0x00000002
  171 +#define SDHCI_SUPPORT_DDR50 0x00000004
  172 +#define SDHCI_USE_SDR50_TUNING 0x00002000
  173 +
169 174 #define SDHCI_CLOCK_MUL_MASK 0x00FF0000
170 175 #define SDHCI_CLOCK_MUL_SHIFT 16
171 176  
... ... @@ -220,6 +225,7 @@
220 225 #define SDHCI_QUIRK_BROKEN_HISPD_MODE BIT(5)
221 226 #define SDHCI_QUIRK_WAIT_SEND_CMD (1 << 6)
222 227 #define SDHCI_QUIRK_USE_WIDE8 (1 << 8)
  228 +#define SDHCI_QUIRK_NO_1_8_V (1 << 9)
223 229  
224 230 /* to make gcc happy */
225 231 struct sdhci_host;