net: pfe_eth: read PFE ESBC header flash with spi_flash_read API

Read PFE ESBC header flash with spi_flash_read API - logs as follows, Net: SF: Detected s25fs512s with page size 256 Bytes, erase size 256 KiB, total 64 MiB "Synchronous Abort" handler, esr 0x96000210 elr: 000000008206db44 lr : 0000000082004ea0 (reloc) elr: 00000000b7ba6b44 lr : 00000000b7b3dea0 x0 : 00000000b79407e8 x1 : 0000000040640000 x2 : 0000000000000050 x3 : 0000000000000000 x4 : 000000000000000a x5 : 0000000000000050 x6 : 0000000000000366 x7 : 00000000b7942308 x8 : 00000000b76407c0 x9 : 0000000000000008 x10: 0000000000000044 x11: 00000000b7634d1c x12: 000000000000004f x13: 0000000000000044 x14: 00000000b7634d98 x15: 00000000b76407c0 x16: 0000000000000000 x17: 0000000000000000 x18: 00000000b7636dd8 x19: 0000000000000000 x20: 00000000b79407d0 x21: 00000000b79407e8 x22: 0000000040640000 x23: 00000000b7634e58 x24: 0000000000000000 x25: 0000000003800000 x26: 00000000b7bdd000 x27: 0000000000000000 x28: 0000000000000000 x29: 00000000b7634d10 Code: d2800003 eb03005f 54000101 d65f03c0 (f8636826) Resetting CPU ... Signed-off-by: Biwen Li <biwen.li@nxp.com>

net: pfe_eth: read PFE ESBC header flash with spi_flash_read API
Read PFE ESBC header flash with spi_flash_read API - logs as follows, Net: SF: Detected s25fs512s with page size 256 Bytes, erase size 256 KiB, total 64 MiB "Synchronous Abort" handler, esr 0x96000210 elr: 000000008206db44 lr : 0000000082004ea0 (reloc) elr: 00000000b7ba6b44 lr : 00000000b7b3dea0 x0 : 00000000b79407e8 x1 : 0000000040640000 x2 : 0000000000000050 x3 : 0000000000000000 x4 : 000000000000000a x5 : 0000000000000050 x6 : 0000000000000366 x7 : 00000000b7942308 x8 : 00000000b76407c0 x9 : 0000000000000008 x10: 0000000000000044 x11: 00000000b7634d1c x12: 000000000000004f x13: 0000000000000044 x14: 00000000b7634d98 x15: 00000000b76407c0 x16: 0000000000000000 x17: 0000000000000000 x18: 00000000b7636dd8 x19: 0000000000000000 x20: 00000000b79407d0 x21: 00000000b79407e8 x22: 0000000040640000 x23: 00000000b7634e58 x24: 0000000000000000 x25: 0000000003800000 x26: 00000000b7bdd000 x27: 0000000000000000 x28: 0000000000000000 x29: 00000000b7634d10 Code: d2800003 eb03005f 54000101 d65f03c0 (f8636826) Resetting CPU ... Signed-off-by: Biwen Li <biwen.li@nxp.com>
Biwen Li · Priyanka Jain
1 parent c1a698c35f
Showing 4 changed files with 84 additions and 11 deletions Side-by-side Diff
board/freescale/ls1012afrdm/Kconfig
board/freescale/ls1012aqds/Kconfig
board/freescale/ls1012ardb/Kconfig
drivers/net/pfe_eth/pfe_firmware.c
@@ -16,6 +16,10 @@
 	hex "Flash address of PFE firmware"
 	default 0x40a00000
  
+config SYS_LS_PFE_FW_LENGTH
+	hex "length of PFE firmware"
+	default 0x40000
+
 config SYS_LS_PPA_FW_ADDR
 	hex "PPA Firmware Addr"
 	default 0x40400000
@@ -65,6 +69,10 @@
 	hex "Flash address of PFE firmware"
 	default 0x40020000
  
+config SYS_LS_PFE_FW_LENGTH
+	hex "length of PFE firmware"
+	default 0x40000
+
 config SYS_LS_PPA_FW_ADDR
 	hex "PPA Firmware Addr"
 	default 0x40060000
@@ -77,6 +85,9 @@
 	hex "PFE Firmware HDR Addr"
 	default 0x401f8000
  
+config SYS_LS_PFE_ESBC_LENGTH
+	hex "length of PFE Firmware HDR"
+	default 0xc00
 endif
  
 if TARGET_LS1012AFRDM || TARGET_LS1012AFRWY
@@ -20,6 +20,14 @@
 config SYS_LS_PPA_ESBC_ADDR
 	hex "PPA Firmware HDR Addr"
 	default 0x40680000
+
+config SYS_LS_PFE_ESBC_ADDR
+	hex "PFE Firmware HDR Addr"
+	default 0x40700000
+
+config SYS_LS_PFE_ESBC_LENGTH
+	hex "length of PFE Firmware HDR"
+	default 0xc00
 endif
  
 if FSL_PFE
@@ -39,9 +47,9 @@
 	hex "Flash address of PFE firmware"
 	default 0x40a00000
  
-config SYS_LS_PFE_ESBC_ADDR
-	hex "PFE Firmware HDR Addr"
-	default 0x40700000
+config SYS_LS_PFE_FW_LENGTH
+	hex "length of PFE firmware"
+	default 0x300000
  
 config DDR_PFE_PHYS_BASEADDR
 	hex "PFE DDR physical base address"
@@ -20,6 +20,14 @@
 config SYS_LS_PPA_ESBC_ADDR
 	hex "PPA Firmware HDR Addr"
 	default 0x40680000
+
+config SYS_LS_PFE_ESBC_ADDR
+	hex "PFE Firmware HDR Addr"
+	default 0x40640000
+
+config SYS_LS_PFE_ESBC_LENGTH
+	hex "length of PFE Firmware HDR"
+	default 0xc00
 endif
  
 if FSL_PFE
@@ -33,9 +41,9 @@
 	hex "Flash address of PFE firmware"
 	default 0x40a00000
  
-config SYS_LS_PFE_ESBC_ADDR
-	hex "PFE Firmware HDR Addr"
-	default 0x40640000
+config SYS_LS_PFE_FW_LENGTH
+	hex "length of PFE firmware"
+	default 0x300000
  
 config DDR_PFE_PHYS_BASEADDR
 	hex "PFE DDR physical base address"
@@ -88,6 +96,10 @@
 config SYS_LS_PFE_FW_ADDR
 	hex "Flash address of PFE firmware"
 	default 0x40a00000
+
+config SYS_LS_PFE_FW_LENGTH
+	hex "length of PFE firmware"
+	default 0x300000
  
 config DDR_PFE_PHYS_BASEADDR
 	hex "PFE DDR physical base address"
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2015-2016 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
+ * Copyright 2017,2020 NXP
  */
  
 /*
@@ -10,6 +10,8 @@
  * files.
  */
  
+#include <dm.h>
+#include <dm/device-internal.h>
 #include <malloc.h>
 #include <net/pfe_eth/pfe_eth.h>
 #include <net/pfe_eth/pfe_firmware.h>
@@ -21,6 +23,9 @@
 #define PFE_FIRMWARE_FIT_CNF_NAME	"config@1"
  
 static const void *pfe_fit_addr;
+#ifdef CONFIG_CHAIN_OF_TRUST
+static const void *pfe_esbc_hdr_addr;
+#endif
  
 /*
  * PFE elf firmware loader.
@@ -165,7 +170,7 @@
 {
 	struct spi_flash *pfe_flash;
 	int ret = 0;
-	void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
+	void *addr = malloc(CONFIG_SYS_LS_PFE_FW_LENGTH);
  
 	if (!addr)
 		return -ENOMEM;
@@ -176,6 +181,12 @@
 	/* speed and mode will be read from DT */
 	ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS,
 				     CONFIG_ENV_SPI_CS, 0, 0, &new);
+	if (ret) {
+		printf("SF: failed to probe spi\n");
+		free(addr);
+		device_remove(new, DM_REMOVE_NORMAL);
+		return ret;
+	}
  
 	pfe_flash = dev_get_uclass_priv(new);
 #else
  
  
  
  
@@ -187,16 +198,47 @@
 	if (!pfe_flash) {
 		printf("SF: probe for pfe failed\n");
 		free(addr);
+#ifdef CONFIG_DM_SPI_FLASH
+		device_remove(new, DM_REMOVE_NORMAL);
+#endif
 		return -ENODEV;
 	}
  
 	ret = spi_flash_read(pfe_flash,
 			     CONFIG_SYS_LS_PFE_FW_ADDR,
-			     CONFIG_SYS_QE_FMAN_FW_LENGTH,
+			     CONFIG_SYS_LS_PFE_FW_LENGTH,
 			     addr);
-	if (ret)
+	if (ret) {
 		printf("SF: read for pfe failed\n");
+		free(addr);
+		spi_flash_free(pfe_flash);
+		return ret;
+	}
  
+#ifdef CONFIG_CHAIN_OF_TRUST
+	void *hdr_addr = malloc(CONFIG_SYS_LS_PFE_ESBC_LENGTH);
+
+	if (!hdr_addr) {
+		free(addr);
+		spi_flash_free(pfe_flash);
+		return -ENOMEM;
+	}
+
+	ret = spi_flash_read(pfe_flash,
+			     CONFIG_SYS_LS_PFE_ESBC_ADDR,
+			     CONFIG_SYS_LS_PFE_ESBC_LENGTH,
+			     hdr_addr);
+	if (ret) {
+		printf("SF: failed to read pfe esbc header\n");
+		free(addr);
+		free(hdr_addr);
+		spi_flash_free(pfe_flash);
+		return ret;
+	}
+
+	pfe_esbc_hdr_addr = hdr_addr;
+#endif
+
 	pfe_fit_addr = addr;
 	spi_flash_free(pfe_flash);
  
@@ -237,7 +279,7 @@
 		goto err;
  
 #ifdef CONFIG_CHAIN_OF_TRUST
-	pfe_esbc_hdr = CONFIG_SYS_LS_PFE_ESBC_ADDR;
+	pfe_esbc_hdr = (uintptr_t)pfe_esbc_hdr_addr;
 	pfe_img_addr = (uintptr_t)pfe_fit_addr;
 	if (fsl_check_boot_mode_secure() != 0) {
 		/*
...	...	@@ -16,6 +16,10 @@
16	16	hex "Flash address of PFE firmware"
17	17	default 0x40a00000
18	18
	19	+config SYS_LS_PFE_FW_LENGTH
	20	+ hex "length of PFE firmware"
	21	+ default 0x40000
	22	+
19	23	config SYS_LS_PPA_FW_ADDR
20	24	hex "PPA Firmware Addr"
21	25	default 0x40400000
...	...	@@ -65,6 +69,10 @@
65	69	hex "Flash address of PFE firmware"
66	70	default 0x40020000
67	71
	72	+config SYS_LS_PFE_FW_LENGTH
	73	+ hex "length of PFE firmware"
	74	+ default 0x40000
	75	+
68	76	config SYS_LS_PPA_FW_ADDR
69	77	hex "PPA Firmware Addr"
70	78	default 0x40060000
...	...	@@ -77,6 +85,9 @@
77	85	hex "PFE Firmware HDR Addr"
78	86	default 0x401f8000
79	87
	88	+config SYS_LS_PFE_ESBC_LENGTH
	89	+ hex "length of PFE Firmware HDR"
	90	+ default 0xc00
80	91	endif
81	92
82	93	if TARGET_LS1012AFRDM \|\| TARGET_LS1012AFRWY
...	...	@@ -20,6 +20,14 @@
20	20	config SYS_LS_PPA_ESBC_ADDR
21	21	hex "PPA Firmware HDR Addr"
22	22	default 0x40680000
	23	+
	24	+config SYS_LS_PFE_ESBC_ADDR
	25	+ hex "PFE Firmware HDR Addr"
	26	+ default 0x40700000
	27	+
	28	+config SYS_LS_PFE_ESBC_LENGTH
	29	+ hex "length of PFE Firmware HDR"
	30	+ default 0xc00
23	31	endif
24	32
25	33	if FSL_PFE
...	...	@@ -39,9 +47,9 @@
39	47	hex "Flash address of PFE firmware"
40	48	default 0x40a00000
41	49
42		-config SYS_LS_PFE_ESBC_ADDR
43		- hex "PFE Firmware HDR Addr"
44		- default 0x40700000
	50	+config SYS_LS_PFE_FW_LENGTH
	51	+ hex "length of PFE firmware"
	52	+ default 0x300000
45	53
46	54	config DDR_PFE_PHYS_BASEADDR
47	55	hex "PFE DDR physical base address"
1	1	// SPDX-License-Identifier: GPL-2.0+
2	2	/*
3	3	* Copyright 2015-2016 Freescale Semiconductor, Inc.
4		- * Copyright 2017 NXP
	4	+ * Copyright 2017,2020 NXP
5	5	*/
6	6
7	7	/*
...	...	@@ -10,6 +10,8 @@
10	10	* files.
11	11	*/
12	12
	13	+#include <dm.h>
	14	+#include <dm/device-internal.h>
13	15	#include <malloc.h>
14	16	#include <net/pfe_eth/pfe_eth.h>
15	17	#include <net/pfe_eth/pfe_firmware.h>
...	...	@@ -21,6 +23,9 @@
21	23	#define PFE_FIRMWARE_FIT_CNF_NAME "config@1"
22	24
23	25	static const void *pfe_fit_addr;
	26	+#ifdef CONFIG_CHAIN_OF_TRUST
	27	+static const void *pfe_esbc_hdr_addr;
	28	+#endif
24	29
25	30	/*
26	31	* PFE elf firmware loader.
...	...	@@ -165,7 +170,7 @@
165	170	{
166	171	struct spi_flash *pfe_flash;
167	172	int ret = 0;
168		- void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
	173	+ void *addr = malloc(CONFIG_SYS_LS_PFE_FW_LENGTH);
169	174
170	175	if (!addr)
171	176	return -ENOMEM;
...	...	@@ -176,6 +181,12 @@
176	181	/* speed and mode will be read from DT */
177	182	ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS,
178	183	CONFIG_ENV_SPI_CS, 0, 0, &new);
	184	+ if (ret) {
	185	+ printf("SF: failed to probe spi\n");
	186	+ free(addr);
	187	+ device_remove(new, DM_REMOVE_NORMAL);
	188	+ return ret;
	189	+ }
179	190
180	191	pfe_flash = dev_get_uclass_priv(new);
181	192	#else
182	193
183	194
184	195
185	196
...	...	@@ -187,16 +198,47 @@
187	198	if (!pfe_flash) {
188	199	printf("SF: probe for pfe failed\n");
189	200	free(addr);
	201	+#ifdef CONFIG_DM_SPI_FLASH
	202	+ device_remove(new, DM_REMOVE_NORMAL);
	203	+#endif
190	204	return -ENODEV;
191	205	}
192	206
193	207	ret = spi_flash_read(pfe_flash,
194	208	CONFIG_SYS_LS_PFE_FW_ADDR,
195		- CONFIG_SYS_QE_FMAN_FW_LENGTH,
	209	+ CONFIG_SYS_LS_PFE_FW_LENGTH,
196	210	addr);
197		- if (ret)
	211	+ if (ret) {
198	212	printf("SF: read for pfe failed\n");
	213	+ free(addr);
	214	+ spi_flash_free(pfe_flash);
	215	+ return ret;
	216	+ }
199	217
	218	+#ifdef CONFIG_CHAIN_OF_TRUST
	219	+ void *hdr_addr = malloc(CONFIG_SYS_LS_PFE_ESBC_LENGTH);
	220	+
	221	+ if (!hdr_addr) {
	222	+ free(addr);
	223	+ spi_flash_free(pfe_flash);
	224	+ return -ENOMEM;
	225	+ }
	226	+
	227	+ ret = spi_flash_read(pfe_flash,
	228	+ CONFIG_SYS_LS_PFE_ESBC_ADDR,
	229	+ CONFIG_SYS_LS_PFE_ESBC_LENGTH,
	230	+ hdr_addr);
	231	+ if (ret) {
	232	+ printf("SF: failed to read pfe esbc header\n");
	233	+ free(addr);
	234	+ free(hdr_addr);
	235	+ spi_flash_free(pfe_flash);
	236	+ return ret;
	237	+ }
	238	+
	239	+ pfe_esbc_hdr_addr = hdr_addr;
	240	+#endif
	241	+
200	242	pfe_fit_addr = addr;
201	243	spi_flash_free(pfe_flash);
202	244
...	...	@@ -237,7 +279,7 @@
237	279	goto err;
238	280
239	281	#ifdef CONFIG_CHAIN_OF_TRUST
240		- pfe_esbc_hdr = CONFIG_SYS_LS_PFE_ESBC_ADDR;
	282	+ pfe_esbc_hdr = (uintptr_t)pfe_esbc_hdr_addr;
241	283	pfe_img_addr = (uintptr_t)pfe_fit_addr;
242	284	if (fsl_check_boot_mode_secure() != 0) {
243	285	/*