Commit bbaef94658ec93986d431f01943a9c990f2f58e0
Committed by
Lokesh Vutla
1 parent
0dcfaa0a3a
Exists in
v2017.01-smarct4x
and in
2 other branches
mmc: omap_hsmmc: use an accessor to get the private data
commit ae000e231e35ef6e1ec4f7a3e477cf4bef2cf189 upstream For consistency, use an accessor to access the private data. Also for the same reason, rename all priv_data to priv. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Showing 1 changed file with 73 additions and 62 deletions Side-by-side Diff
drivers/mmc/omap_hsmmc.c
... | ... | @@ -140,6 +140,15 @@ |
140 | 140 | static void omap_hsmmc_stop_clock(struct hsmmc *mmc_base); |
141 | 141 | static void mmc_reset_controller_fsm(struct hsmmc *mmc_base, u32 bit); |
142 | 142 | |
143 | +static inline struct omap_hsmmc_data *omap_hsmmc_get_data(struct mmc *mmc) | |
144 | +{ | |
145 | +#ifdef CONFIG_DM_MMC | |
146 | + return dev_get_priv(mmc->dev); | |
147 | +#else | |
148 | + return (struct omap_hsmmc_data *)mmc->priv; | |
149 | +#endif | |
150 | +} | |
151 | + | |
143 | 152 | #if defined(OMAP_HSMMC_USE_GPIO) && !defined(CONFIG_DM_MMC) |
144 | 153 | static int omap_mmc_setup_gpio_in(int gpio, const char *label) |
145 | 154 | { |
... | ... | @@ -287,7 +296,7 @@ |
287 | 296 | { |
288 | 297 | u32 val; |
289 | 298 | struct hsmmc *mmc_base; |
290 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
299 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
291 | 300 | struct omap_hsmmc_pinctrl_state *pinctrl_state; |
292 | 301 | |
293 | 302 | mmc_base = priv->base_addr; |
... | ... | @@ -361,7 +370,7 @@ |
361 | 370 | static void omap_hsmmc_conf_bus_power(struct mmc *mmc, uint signal_voltage) |
362 | 371 | { |
363 | 372 | struct hsmmc *mmc_base; |
364 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
373 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
365 | 374 | u32 val; |
366 | 375 | |
367 | 376 | mmc_base = priv->base_addr; |
... | ... | @@ -389,7 +398,7 @@ |
389 | 398 | u32 val; |
390 | 399 | int i; |
391 | 400 | struct hsmmc *mmc_base; |
392 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
401 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
393 | 402 | |
394 | 403 | mmc_base = priv->base_addr; |
395 | 404 | |
... | ... | @@ -416,7 +425,7 @@ |
416 | 425 | u32 val; |
417 | 426 | int i; |
418 | 427 | struct hsmmc *mmc_base; |
419 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
428 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
420 | 429 | |
421 | 430 | mmc_base = priv->base_addr; |
422 | 431 | |
... | ... | @@ -447,7 +456,7 @@ |
447 | 456 | int ret; |
448 | 457 | u32 val; |
449 | 458 | struct hsmmc *mmc_base; |
450 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
459 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
451 | 460 | |
452 | 461 | mmc_base = priv->base_addr; |
453 | 462 | |
... | ... | @@ -471,7 +480,7 @@ |
471 | 480 | static int omap_hsmmc_set_io_regulator(struct mmc *mmc, int uV) |
472 | 481 | { |
473 | 482 | int ret; |
474 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
483 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
475 | 484 | |
476 | 485 | if (!priv->vmmc_aux_supply) |
477 | 486 | return 0; |
... | ... | @@ -497,7 +506,7 @@ |
497 | 506 | { |
498 | 507 | u32 val; |
499 | 508 | struct hsmmc *mmc_base; |
500 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
509 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
501 | 510 | |
502 | 511 | mmc_base = priv->base_addr; |
503 | 512 | priv->signal_voltage = mmc->signal_voltage; |
... | ... | @@ -549,7 +558,7 @@ |
549 | 558 | static void omap_hsmmc_set_capabilities(struct mmc *mmc) |
550 | 559 | { |
551 | 560 | struct hsmmc *mmc_base; |
552 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
561 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
553 | 562 | u32 val; |
554 | 563 | |
555 | 564 | mmc_base = priv->base_addr; |
556 | 565 | |
... | ... | @@ -575,8 +584,9 @@ |
575 | 584 | { |
576 | 585 | int val; |
577 | 586 | struct hsmmc *mmc_base; |
587 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
578 | 588 | |
579 | - mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr; | |
589 | + mmc_base = priv->base_addr; | |
580 | 590 | val = readl(&mmc_base->ac12); |
581 | 591 | val &= ~(AC12_SCLK_SEL); |
582 | 592 | writel(val, &mmc_base->ac12); |
583 | 593 | |
... | ... | @@ -591,8 +601,9 @@ |
591 | 601 | int i; |
592 | 602 | u32 val; |
593 | 603 | struct hsmmc *mmc_base; |
604 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
594 | 605 | |
595 | - mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr; | |
606 | + mmc_base = priv->base_addr; | |
596 | 607 | val = readl(&mmc_base->dll); |
597 | 608 | val |= DLL_FORCE_VALUE; |
598 | 609 | val &= ~(DLL_FORCE_SR_C_MASK << DLL_FORCE_SR_C_SHIFT); |
... | ... | @@ -612,7 +623,7 @@ |
612 | 623 | static int omap_hsmmc_execute_tuning(struct mmc *mmc, uint opcode) |
613 | 624 | { |
614 | 625 | struct hsmmc *mmc_base; |
615 | - | |
626 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
616 | 627 | u32 val; |
617 | 628 | u8 cur_match, prev_match = 0; |
618 | 629 | int ret; |
... | ... | @@ -624,7 +635,7 @@ |
624 | 635 | if (mmc->clock <= 52000000) |
625 | 636 | return 0; |
626 | 637 | |
627 | - mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr; | |
638 | + mmc_base = priv->base_addr; | |
628 | 639 | |
629 | 640 | val = readl(&mmc_base->ac12); |
630 | 641 | val |= AC12_V1V8_SIGEN; |
... | ... | @@ -690,7 +701,7 @@ |
690 | 701 | #if CONFIG_IS_ENABLED(DM_REGULATOR) && defined(CONFIG_DM_MMC) |
691 | 702 | static int omap_hsmmc_set_vdd(struct mmc *mmc, bool enable) |
692 | 703 | { |
693 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
704 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
694 | 705 | struct hsmmc *mmc_base = priv->base_addr; |
695 | 706 | |
696 | 707 | if (enable) { |
697 | 708 | |
... | ... | @@ -707,10 +718,11 @@ |
707 | 718 | |
708 | 719 | static void mmc_enable_irq(struct mmc *mmc, struct mmc_cmd *cmd) |
709 | 720 | { |
721 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
710 | 722 | u32 irq_mask = INT_EN_MASK; |
711 | 723 | struct hsmmc *mmc_base; |
712 | 724 | |
713 | - mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr; | |
725 | + mmc_base = priv->base_addr; | |
714 | 726 | |
715 | 727 | /* |
716 | 728 | * TODO: Errata i802 indicates only DCRC interrupts can occur during |
717 | 729 | |
718 | 730 | |
... | ... | @@ -727,15 +739,13 @@ |
727 | 739 | |
728 | 740 | static int omap_hsmmc_init_setup(struct mmc *mmc) |
729 | 741 | { |
742 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
730 | 743 | struct hsmmc *mmc_base; |
731 | 744 | unsigned int reg_val; |
732 | 745 | unsigned int dsor; |
733 | 746 | ulong start; |
734 | -#ifdef CONFIG_DM_MMC | |
735 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
736 | -#endif | |
737 | 747 | |
738 | - mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr; | |
748 | + mmc_base = priv->base_addr; | |
739 | 749 | mmc_board_init(mmc); |
740 | 750 | |
741 | 751 | writel(readl(&mmc_base->sysconfig) | MMC_SOFTRESET, |
... | ... | @@ -850,7 +860,7 @@ |
850 | 860 | #ifdef CONFIG_DM_MMC |
851 | 861 | static int omap_hsmmc_adma_desc(struct mmc *mmc, char *buf, u16 len, bool end) |
852 | 862 | { |
853 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
863 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
854 | 864 | struct omap_hsmmc_adma_desc *desc; |
855 | 865 | u8 attr; |
856 | 866 | |
... | ... | @@ -874,7 +884,7 @@ |
874 | 884 | { |
875 | 885 | uint total_len = data->blocksize * data->blocks; |
876 | 886 | uint desc_count = DIV_ROUND_UP(total_len, ADMA_MAX_LEN); |
877 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
887 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
878 | 888 | int i = desc_count; |
879 | 889 | char *buf; |
880 | 890 | |
881 | 891 | |
... | ... | @@ -907,11 +917,11 @@ |
907 | 917 | static void omap_hsmmc_prepare_data(struct mmc *mmc, struct mmc_data *data) |
908 | 918 | { |
909 | 919 | struct hsmmc *mmc_base; |
910 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
920 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
911 | 921 | u32 val; |
912 | 922 | char *buf; |
913 | 923 | |
914 | - mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr; | |
924 | + mmc_base = priv->base_addr; | |
915 | 925 | omap_hsmmc_prepare_adma_table(mmc, data); |
916 | 926 | |
917 | 927 | if (data->flags & MMC_DATA_READ) |
918 | 928 | |
... | ... | @@ -941,10 +951,10 @@ |
941 | 951 | static void omap_hsmmc_dma_cleanup(struct mmc *mmc) |
942 | 952 | { |
943 | 953 | struct hsmmc *mmc_base; |
944 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
954 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
945 | 955 | u32 val; |
946 | 956 | |
947 | - mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr; | |
957 | + mmc_base = priv->base_addr; | |
948 | 958 | |
949 | 959 | val = readl(&mmc_base->con); |
950 | 960 | val &= ~DMA_MASTER; |
951 | 961 | |
952 | 962 | |
953 | 963 | |
... | ... | @@ -961,15 +971,16 @@ |
961 | 971 | static int omap_hsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, |
962 | 972 | struct mmc_data *data) |
963 | 973 | { |
974 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
964 | 975 | struct hsmmc *mmc_base; |
965 | 976 | unsigned int flags, mmc_stat; |
966 | 977 | ulong start; |
978 | + | |
967 | 979 | #ifdef CONFIG_DM_MMC |
968 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
969 | 980 | priv->last_cmd = cmd->cmdidx; |
970 | 981 | #endif |
971 | 982 | |
972 | - mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr; | |
983 | + mmc_base = priv->base_addr; | |
973 | 984 | |
974 | 985 | if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) |
975 | 986 | return 0; |
976 | 987 | |
... | ... | @@ -1245,12 +1256,12 @@ |
1245 | 1256 | |
1246 | 1257 | static void omap_hsmmc_set_clock(struct mmc *mmc) |
1247 | 1258 | { |
1248 | - struct omap_hsmmc_data *priv_data = mmc->priv; | |
1259 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
1249 | 1260 | struct hsmmc *mmc_base; |
1250 | 1261 | unsigned int dsor = 0; |
1251 | 1262 | ulong start; |
1252 | 1263 | |
1253 | - mmc_base = priv_data->base_addr; | |
1264 | + mmc_base = priv->base_addr; | |
1254 | 1265 | omap_hsmmc_stop_clock(mmc_base); |
1255 | 1266 | |
1256 | 1267 | /* TODO: Is setting DTO required here? */ |
1257 | 1268 | |
1258 | 1269 | |
... | ... | @@ -1274,16 +1285,16 @@ |
1274 | 1285 | } |
1275 | 1286 | } |
1276 | 1287 | |
1277 | - priv_data->clock = mmc->clock; | |
1288 | + priv->clock = mmc->clock; | |
1278 | 1289 | omap_hsmmc_start_clock(mmc_base); |
1279 | 1290 | } |
1280 | 1291 | |
1281 | 1292 | static void omap_hsmmc_set_bus_width(struct mmc *mmc) |
1282 | 1293 | { |
1283 | - struct omap_hsmmc_data *priv_data = mmc->priv; | |
1294 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
1284 | 1295 | struct hsmmc *mmc_base; |
1285 | 1296 | |
1286 | - mmc_base = priv_data->base_addr; | |
1297 | + mmc_base = priv->base_addr; | |
1287 | 1298 | /* configue bus width */ |
1288 | 1299 | switch (mmc->bus_width) { |
1289 | 1300 | case 8: |
1290 | 1301 | |
1291 | 1302 | |
1292 | 1303 | |
... | ... | @@ -1307,19 +1318,19 @@ |
1307 | 1318 | break; |
1308 | 1319 | } |
1309 | 1320 | |
1310 | - priv_data->bus_width = mmc->bus_width; | |
1321 | + priv->bus_width = mmc->bus_width; | |
1311 | 1322 | } |
1312 | 1323 | |
1313 | 1324 | static int omap_hsmmc_set_ios(struct mmc *mmc) |
1314 | 1325 | { |
1315 | - struct omap_hsmmc_data *priv_data = mmc->priv; | |
1316 | - struct hsmmc *mmc_base = priv_data->base_addr; | |
1326 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
1327 | + struct hsmmc *mmc_base = priv->base_addr; | |
1317 | 1328 | int ret = 0; |
1318 | 1329 | |
1319 | - if (priv_data->bus_width != mmc->bus_width) | |
1330 | + if (priv->bus_width != mmc->bus_width) | |
1320 | 1331 | omap_hsmmc_set_bus_width(mmc); |
1321 | 1332 | |
1322 | - if (priv_data->clock != mmc->clock) | |
1333 | + if (priv->clock != mmc->clock) | |
1323 | 1334 | omap_hsmmc_set_clock(mmc); |
1324 | 1335 | |
1325 | 1336 | if (mmc->clk_disable) |
1326 | 1337 | |
... | ... | @@ -1328,10 +1339,10 @@ |
1328 | 1339 | omap_hsmmc_start_clock(mmc_base); |
1329 | 1340 | |
1330 | 1341 | #if defined(CONFIG_DM_MMC) && defined(CONFIG_IODELAY_RECALIBRATION) |
1331 | - if (priv_data->timing != mmc->timing) | |
1342 | + if (priv->timing != mmc->timing) | |
1332 | 1343 | omap_hsmmc_set_timing(mmc); |
1333 | 1344 | #endif |
1334 | - if (priv_data->signal_voltage != mmc->signal_voltage) | |
1345 | + if (priv->signal_voltage != mmc->signal_voltage) | |
1335 | 1346 | ret = omap_hsmmc_set_signal_voltage(mmc); |
1336 | 1347 | |
1337 | 1348 | return ret; |
... | ... | @@ -1341,7 +1352,7 @@ |
1341 | 1352 | #ifdef CONFIG_DM_MMC |
1342 | 1353 | static int omap_hsmmc_getcd(struct mmc *mmc) |
1343 | 1354 | { |
1344 | - struct omap_hsmmc_data *priv = mmc->priv; | |
1355 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
1345 | 1356 | int value; |
1346 | 1357 | |
1347 | 1358 | value = dm_gpio_get_value(&priv->cd_gpio); |
... | ... | @@ -1356,7 +1367,7 @@ |
1356 | 1367 | |
1357 | 1368 | static int omap_hsmmc_getwp(struct mmc *mmc) |
1358 | 1369 | { |
1359 | - struct omap_hsmmc_data *priv = mmc->priv; | |
1370 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
1360 | 1371 | int value; |
1361 | 1372 | |
1362 | 1373 | value = dm_gpio_get_value(&priv->wp_gpio); |
1363 | 1374 | |
... | ... | @@ -1368,11 +1379,11 @@ |
1368 | 1379 | #else |
1369 | 1380 | static int omap_hsmmc_getcd(struct mmc *mmc) |
1370 | 1381 | { |
1371 | - struct omap_hsmmc_data *priv_data = mmc->priv; | |
1382 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
1372 | 1383 | int cd_gpio; |
1373 | 1384 | |
1374 | 1385 | /* if no CD return as 1 */ |
1375 | - cd_gpio = priv_data->cd_gpio; | |
1386 | + cd_gpio = priv->cd_gpio; | |
1376 | 1387 | if (cd_gpio < 0) |
1377 | 1388 | return 1; |
1378 | 1389 | |
1379 | 1390 | |
... | ... | @@ -1382,11 +1393,11 @@ |
1382 | 1393 | |
1383 | 1394 | static int omap_hsmmc_getwp(struct mmc *mmc) |
1384 | 1395 | { |
1385 | - struct omap_hsmmc_data *priv_data = mmc->priv; | |
1396 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
1386 | 1397 | int wp_gpio; |
1387 | 1398 | |
1388 | 1399 | /* if no WP return as 0 */ |
1389 | - wp_gpio = priv_data->wp_gpio; | |
1400 | + wp_gpio = priv->wp_gpio; | |
1390 | 1401 | if (wp_gpio < 0) |
1391 | 1402 | return 0; |
1392 | 1403 | |
1393 | 1404 | |
1394 | 1405 | |
1395 | 1406 | |
... | ... | @@ -1418,23 +1429,23 @@ |
1418 | 1429 | int wp_gpio) |
1419 | 1430 | { |
1420 | 1431 | struct mmc *mmc; |
1421 | - struct omap_hsmmc_data *priv_data; | |
1432 | + struct omap_hsmmc_data *priv; | |
1422 | 1433 | struct mmc_config *cfg; |
1423 | 1434 | uint host_caps_val; |
1424 | 1435 | |
1425 | - priv_data = malloc(sizeof(*priv_data)); | |
1426 | - if (priv_data == NULL) | |
1436 | + priv = malloc(sizeof(*priv)); | |
1437 | + if (priv == NULL) | |
1427 | 1438 | return -1; |
1428 | 1439 | |
1429 | 1440 | host_caps_val = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS; |
1430 | 1441 | |
1431 | 1442 | switch (dev_index) { |
1432 | 1443 | case 0: |
1433 | - priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE; | |
1444 | + priv->base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE; | |
1434 | 1445 | break; |
1435 | 1446 | #ifdef OMAP_HSMMC2_BASE |
1436 | 1447 | case 1: |
1437 | - priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE; | |
1448 | + priv->base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE; | |
1438 | 1449 | #if (defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX) || \ |
1439 | 1450 | defined(CONFIG_DRA7XX) || defined(CONFIG_AM33XX) || \ |
1440 | 1451 | defined(CONFIG_AM43XX) || defined(CONFIG_SOC_KEYSTONE)) && \ |
... | ... | @@ -1446,7 +1457,7 @@ |
1446 | 1457 | #endif |
1447 | 1458 | #ifdef OMAP_HSMMC3_BASE |
1448 | 1459 | case 2: |
1449 | - priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC3_BASE; | |
1460 | + priv->base_addr = (struct hsmmc *)OMAP_HSMMC3_BASE; | |
1450 | 1461 | #if defined(CONFIG_DRA7XX) && defined(CONFIG_HSMMC3_8BIT) |
1451 | 1462 | /* Enable 8-bit interface for eMMC on DRA7XX */ |
1452 | 1463 | host_caps_val |= MMC_MODE_8BIT; |
1453 | 1464 | |
1454 | 1465 | |
... | ... | @@ -1454,16 +1465,16 @@ |
1454 | 1465 | break; |
1455 | 1466 | #endif |
1456 | 1467 | default: |
1457 | - priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE; | |
1468 | + priv->base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE; | |
1458 | 1469 | return 1; |
1459 | 1470 | } |
1460 | 1471 | #ifdef OMAP_HSMMC_USE_GPIO |
1461 | 1472 | /* on error gpio values are set to -1, which is what we want */ |
1462 | - priv_data->cd_gpio = omap_mmc_setup_gpio_in(cd_gpio, "mmc_cd"); | |
1463 | - priv_data->wp_gpio = omap_mmc_setup_gpio_in(wp_gpio, "mmc_wp"); | |
1473 | + priv->cd_gpio = omap_mmc_setup_gpio_in(cd_gpio, "mmc_cd"); | |
1474 | + priv->wp_gpio = omap_mmc_setup_gpio_in(wp_gpio, "mmc_wp"); | |
1464 | 1475 | #endif |
1465 | 1476 | |
1466 | - cfg = &priv_data->cfg; | |
1477 | + cfg = &priv->cfg; | |
1467 | 1478 | |
1468 | 1479 | cfg->name = "OMAP SD/MMC"; |
1469 | 1480 | cfg->ops = &omap_hsmmc_ops; |
... | ... | @@ -1494,7 +1505,7 @@ |
1494 | 1505 | if ((get_cpu_family() == CPU_OMAP34XX) && (get_cpu_rev() <= CPU_3XX_ES21)) |
1495 | 1506 | cfg->b_max = 1; |
1496 | 1507 | #endif |
1497 | - mmc = mmc_create(cfg, priv_data); | |
1508 | + mmc = mmc_create(cfg, priv); | |
1498 | 1509 | if (mmc == NULL) |
1499 | 1510 | return -1; |
1500 | 1511 | |
... | ... | @@ -1518,7 +1529,7 @@ |
1518 | 1529 | static struct omap_hsmmc_pinctrl_state * |
1519 | 1530 | omap_hsmmc_get_pinctrl_by_mode(struct mmc *mmc, char *mode) |
1520 | 1531 | { |
1521 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
1532 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
1522 | 1533 | |
1523 | 1534 | return platform_fixup_get_pinctrl_by_mode(priv->base_addr, mode); |
1524 | 1535 | } |
... | ... | @@ -1594,7 +1605,7 @@ |
1594 | 1605 | { |
1595 | 1606 | const void *fdt = gd->fdt_blob; |
1596 | 1607 | const __be32 *phandle; |
1597 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
1608 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
1598 | 1609 | int node = priv->node; |
1599 | 1610 | |
1600 | 1611 | phandle = fdt_getprop(fdt, node, prop_name, NULL); |
... | ... | @@ -1611,7 +1622,7 @@ |
1611 | 1622 | { |
1612 | 1623 | const void *fdt = gd->fdt_blob; |
1613 | 1624 | const __be32 *phandle; |
1614 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
1625 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
1615 | 1626 | int len; |
1616 | 1627 | int count; |
1617 | 1628 | int node = priv->node; |
... | ... | @@ -1695,7 +1706,7 @@ |
1695 | 1706 | int npads = 0; |
1696 | 1707 | int niodelays = 0; |
1697 | 1708 | const void *fdt = gd->fdt_blob; |
1698 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
1709 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
1699 | 1710 | int node = priv->node; |
1700 | 1711 | char prop_name[11]; |
1701 | 1712 | struct omap_hsmmc_pinctrl_state *pinctrl_state; |
... | ... | @@ -1766,7 +1777,7 @@ |
1766 | 1777 | |
1767 | 1778 | static int omap_hsmmc_get_pinctrl_state(struct mmc *mmc) |
1768 | 1779 | { |
1769 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
1780 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
1770 | 1781 | struct mmc_config *cfg = &priv->cfg; |
1771 | 1782 | struct omap_hsmmc_pinctrl_state *default_pinctrl; |
1772 | 1783 | |
... | ... | @@ -1834,7 +1845,7 @@ |
1834 | 1845 | |
1835 | 1846 | static int omap_hsmmc_platform_fixup(struct mmc *mmc) |
1836 | 1847 | { |
1837 | - struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv; | |
1848 | + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); | |
1838 | 1849 | struct mmc_config *cfg = &priv->cfg; |
1839 | 1850 | |
1840 | 1851 | priv->version = NULL; |
... | ... | @@ -1867,6 +1878,7 @@ |
1867 | 1878 | if (mmc == NULL) |
1868 | 1879 | return -1; |
1869 | 1880 | |
1881 | + mmc->dev = dev; | |
1870 | 1882 | omap_hsmmc_platform_fixup(mmc); |
1871 | 1883 | |
1872 | 1884 | #if CONFIG_IS_ENABLED(DM_REGULATOR) && defined(CONFIG_DM_MMC) |
... | ... | @@ -1894,7 +1906,6 @@ |
1894 | 1906 | } |
1895 | 1907 | #endif |
1896 | 1908 | |
1897 | - mmc->dev = dev; | |
1898 | 1909 | upriv->mmc = mmc; |
1899 | 1910 | |
1900 | 1911 | return 0; |