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Commit bd5e301d35621f2b00e0ecd77464c6c0e967fdbb

Authored by Kuo-Jung Su
Committed by Marek Vasut
1 parent 7f673c99c2
Exists in master and in 50 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

usb: gadget: fotg210: add w1c interrupt status support 

Since hardware revision 1.11.0, the following interrupt status
registers are now W1C (i.e., write 1 clear):

1. Interrupt Source Group 0 Register (0x144) (EP0 Abort: BIT5)
2. Interrupt Source Group 2 Register (0x14C) (All bits)

And before revision 1.11.0, these registers are all R/W.
Which means software must write a 0 to clear the status.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>

Showing 1 changed file with 14 additions and 0 deletions Inline Diff

drivers/usb/gadget/fotg210.c
Diff comments   View file @ bd5e301
1 /* 1 /*
2 * Faraday USB 2.0 OTG Controller 2 * Faraday USB 2.0 OTG Controller
3 * 3 *
4 * (C) Copyright 2010 Faraday Technology 4 * (C) Copyright 2010 Faraday Technology
5 * Dante Su <dantesu@faraday-tech.com> 5 * Dante Su <dantesu@faraday-tech.com>
6 * 6 *
7 * SPDX-License-Identifier: GPL-2.0+ 7 * SPDX-License-Identifier: GPL-2.0+
8 */ 8 */
9 9
10 #include <common.h> 10 #include <common.h>
11 #include <command.h> 11 #include <command.h>
12 #include <config.h> 12 #include <config.h>
13 #include <net.h> 13 #include <net.h>
14 #include <malloc.h> 14 #include <malloc.h>
15 #include <asm/io.h> 15 #include <asm/io.h>
16 #include <asm/errno.h> 16 #include <asm/errno.h>
17 #include <linux/types.h> 17 #include <linux/types.h>
18 #include <linux/usb/ch9.h> 18 #include <linux/usb/ch9.h>
19 #include <linux/usb/gadget.h> 19 #include <linux/usb/gadget.h>
20 20
21 #include <usb/fotg210.h> 21 #include <usb/fotg210.h>
22 22
23 #define CFG_NUM_ENDPOINTS 4 23 #define CFG_NUM_ENDPOINTS 4
24 #define CFG_EP0_MAX_PACKET_SIZE 64 24 #define CFG_EP0_MAX_PACKET_SIZE 64
25 #define CFG_EPX_MAX_PACKET_SIZE 512 25 #define CFG_EPX_MAX_PACKET_SIZE 512
26 26
27 #define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ >> 2) /* 250 ms */ 27 #define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ >> 2) /* 250 ms */
28 28
29 struct fotg210_chip; 29 struct fotg210_chip;
30 30
31 struct fotg210_ep { 31 struct fotg210_ep {
32 struct usb_ep ep; 32 struct usb_ep ep;
33 33
34 uint maxpacket; 34 uint maxpacket;
35 uint id; 35 uint id;
36 uint stopped; 36 uint stopped;
37 37
38 struct list_head queue; 38 struct list_head queue;
39 struct fotg210_chip *chip; 39 struct fotg210_chip *chip;
40 const struct usb_endpoint_descriptor *desc; 40 const struct usb_endpoint_descriptor *desc;
41 }; 41 };
42 42
43 struct fotg210_request { 43 struct fotg210_request {
44 struct usb_request req; 44 struct usb_request req;
45 struct list_head queue; 45 struct list_head queue;
46 struct fotg210_ep *ep; 46 struct fotg210_ep *ep;
47 }; 47 };
48 48
49 struct fotg210_chip { 49 struct fotg210_chip {
50 struct usb_gadget gadget; 50 struct usb_gadget gadget;
51 struct usb_gadget_driver *driver; 51 struct usb_gadget_driver *driver;
52 struct fotg210_regs *regs; 52 struct fotg210_regs *regs;
53 uint8_t irq; 53 uint8_t irq;
54 uint16_t addr; 54 uint16_t addr;
55 int pullup; 55 int pullup;
56 enum usb_device_state state; 56 enum usb_device_state state;
57 struct fotg210_ep ep[1 + CFG_NUM_ENDPOINTS]; 57 struct fotg210_ep ep[1 + CFG_NUM_ENDPOINTS];
58 }; 58 };
59 59
60 static struct usb_endpoint_descriptor ep0_desc = { 60 static struct usb_endpoint_descriptor ep0_desc = {
61 .bLength = sizeof(struct usb_endpoint_descriptor), 61 .bLength = sizeof(struct usb_endpoint_descriptor),
62 .bDescriptorType = USB_DT_ENDPOINT, 62 .bDescriptorType = USB_DT_ENDPOINT,
63 .bEndpointAddress = USB_DIR_IN, 63 .bEndpointAddress = USB_DIR_IN,
64 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 64 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
65 }; 65 };
66 66
67 static inline int fifo_to_ep(struct fotg210_chip *chip, int id, int in) 67 static inline int fifo_to_ep(struct fotg210_chip *chip, int id, int in)
68 { 68 {
69 return (id < 0) ? 0 : ((id & 0x03) + 1); 69 return (id < 0) ? 0 : ((id & 0x03) + 1);
70 } 70 }
71 71
72 static inline int ep_to_fifo(struct fotg210_chip *chip, int id) 72 static inline int ep_to_fifo(struct fotg210_chip *chip, int id)
73 { 73 {
74 return (id <= 0) ? -1 : ((id - 1) & 0x03); 74 return (id <= 0) ? -1 : ((id - 1) & 0x03);
75 } 75 }
76 76
77 static inline int ep_reset(struct fotg210_chip *chip, uint8_t ep_addr) 77 static inline int ep_reset(struct fotg210_chip *chip, uint8_t ep_addr)
78 { 78 {
79 int ep = ep_addr & USB_ENDPOINT_NUMBER_MASK; 79 int ep = ep_addr & USB_ENDPOINT_NUMBER_MASK;
80 struct fotg210_regs *regs = chip->regs; 80 struct fotg210_regs *regs = chip->regs;
81 81
82 if (ep_addr & USB_DIR_IN) { 82 if (ep_addr & USB_DIR_IN) {
83 /* reset endpoint */ 83 /* reset endpoint */
84 setbits_le32(&regs->iep[ep - 1], IEP_RESET); 84 setbits_le32(&regs->iep[ep - 1], IEP_RESET);
85 mdelay(1); 85 mdelay(1);
86 clrbits_le32(&regs->iep[ep - 1], IEP_RESET); 86 clrbits_le32(&regs->iep[ep - 1], IEP_RESET);
87 /* clear endpoint stall */ 87 /* clear endpoint stall */
88 clrbits_le32(&regs->iep[ep - 1], IEP_STALL); 88 clrbits_le32(&regs->iep[ep - 1], IEP_STALL);
89 } else { 89 } else {
90 /* reset endpoint */ 90 /* reset endpoint */
91 setbits_le32(&regs->oep[ep - 1], OEP_RESET); 91 setbits_le32(&regs->oep[ep - 1], OEP_RESET);
92 mdelay(1); 92 mdelay(1);
93 clrbits_le32(&regs->oep[ep - 1], OEP_RESET); 93 clrbits_le32(&regs->oep[ep - 1], OEP_RESET);
94 /* clear endpoint stall */ 94 /* clear endpoint stall */
95 clrbits_le32(&regs->oep[ep - 1], OEP_STALL); 95 clrbits_le32(&regs->oep[ep - 1], OEP_STALL);
96 } 96 }
97 97
98 return 0; 98 return 0;
99 } 99 }
100 100
101 static int fotg210_reset(struct fotg210_chip *chip) 101 static int fotg210_reset(struct fotg210_chip *chip)
102 { 102 {
103 struct fotg210_regs *regs = chip->regs; 103 struct fotg210_regs *regs = chip->regs;
104 uint32_t i; 104 uint32_t i;
105 105
106 chip->state = USB_STATE_POWERED; 106 chip->state = USB_STATE_POWERED;
107 107
108 /* chip enable */ 108 /* chip enable */
109 writel(DEVCTRL_EN, &regs->dev_ctrl); 109 writel(DEVCTRL_EN, &regs->dev_ctrl);
110 110
111 /* device address reset */ 111 /* device address reset */
112 chip->addr = 0; 112 chip->addr = 0;
113 writel(0, &regs->dev_addr); 113 writel(0, &regs->dev_addr);
114 114
115 /* set idle counter to 7ms */ 115 /* set idle counter to 7ms */
116 writel(7, &regs->idle); 116 writel(7, &regs->idle);
117 117
118 /* disable all interrupts */ 118 /* disable all interrupts */
119 writel(IMR_MASK, &regs->imr); 119 writel(IMR_MASK, &regs->imr);
120 writel(GIMR_MASK, &regs->gimr); 120 writel(GIMR_MASK, &regs->gimr);
121 writel(GIMR0_MASK, &regs->gimr0); 121 writel(GIMR0_MASK, &regs->gimr0);
122 writel(GIMR1_MASK, &regs->gimr1); 122 writel(GIMR1_MASK, &regs->gimr1);
123 writel(GIMR2_MASK, &regs->gimr2); 123 writel(GIMR2_MASK, &regs->gimr2);
124 124
125 /* clear interrupts */ 125 /* clear interrupts */
126 writel(ISR_MASK, &regs->isr); 126 writel(ISR_MASK, &regs->isr);
127 writel(0, &regs->gisr); 127 writel(0, &regs->gisr);
128 writel(0, &regs->gisr0); 128 writel(0, &regs->gisr0);
129 writel(0, &regs->gisr1); 129 writel(0, &regs->gisr1);
130 writel(0, &regs->gisr2); 130 writel(0, &regs->gisr2);
131 131
132 /* chip reset */ 132 /* chip reset */
133 setbits_le32(&regs->dev_ctrl, DEVCTRL_RESET); 133 setbits_le32(&regs->dev_ctrl, DEVCTRL_RESET);
134 mdelay(10); 134 mdelay(10);
135 if (readl(&regs->dev_ctrl) & DEVCTRL_RESET) { 135 if (readl(&regs->dev_ctrl) & DEVCTRL_RESET) {
136 printf("fotg210: chip reset failed\n"); 136 printf("fotg210: chip reset failed\n");
137 return -1; 137 return -1;
138 } 138 }
139 139
140 /* CX FIFO reset */ 140 /* CX FIFO reset */
141 setbits_le32(&regs->cxfifo, CXFIFO_CXFIFOCLR); 141 setbits_le32(&regs->cxfifo, CXFIFO_CXFIFOCLR);
142 mdelay(10); 142 mdelay(10);
143 if (readl(&regs->cxfifo) & CXFIFO_CXFIFOCLR) { 143 if (readl(&regs->cxfifo) & CXFIFO_CXFIFOCLR) {
144 printf("fotg210: ep0 fifo reset failed\n"); 144 printf("fotg210: ep0 fifo reset failed\n");
145 return -1; 145 return -1;
146 } 146 }
147 147
148 /* create static ep-fifo map (EP1 <-> FIFO0, EP2 <-> FIFO1 ...) */ 148 /* create static ep-fifo map (EP1 <-> FIFO0, EP2 <-> FIFO1 ...) */
149 writel(EPMAP14_DEFAULT, &regs->epmap14); 149 writel(EPMAP14_DEFAULT, &regs->epmap14);
150 writel(EPMAP58_DEFAULT, &regs->epmap58); 150 writel(EPMAP58_DEFAULT, &regs->epmap58);
151 writel(FIFOMAP_DEFAULT, &regs->fifomap); 151 writel(FIFOMAP_DEFAULT, &regs->fifomap);
152 writel(0, &regs->fifocfg); 152 writel(0, &regs->fifocfg);
153 for (i = 0; i < 8; ++i) { 153 for (i = 0; i < 8; ++i) {
154 writel(CFG_EPX_MAX_PACKET_SIZE, &regs->iep[i]); 154 writel(CFG_EPX_MAX_PACKET_SIZE, &regs->iep[i]);
155 writel(CFG_EPX_MAX_PACKET_SIZE, &regs->oep[i]); 155 writel(CFG_EPX_MAX_PACKET_SIZE, &regs->oep[i]);
156 } 156 }
157 157
158 /* FIFO reset */ 158 /* FIFO reset */
159 for (i = 0; i < 4; ++i) { 159 for (i = 0; i < 4; ++i) {
160 writel(FIFOCSR_RESET, &regs->fifocsr[i]); 160 writel(FIFOCSR_RESET, &regs->fifocsr[i]);
161 mdelay(10); 161 mdelay(10);
162 if (readl(&regs->fifocsr[i]) & FIFOCSR_RESET) { 162 if (readl(&regs->fifocsr[i]) & FIFOCSR_RESET) {
163 printf("fotg210: fifo%d reset failed\n", i); 163 printf("fotg210: fifo%d reset failed\n", i);
164 return -1; 164 return -1;
165 } 165 }
166 } 166 }
167 167
168 /* enable only device interrupt and triggered at level-high */ 168 /* enable only device interrupt and triggered at level-high */
169 writel(IMR_IRQLH | IMR_HOST | IMR_OTG, &regs->imr); 169 writel(IMR_IRQLH | IMR_HOST | IMR_OTG, &regs->imr);
170 writel(ISR_MASK, &regs->isr); 170 writel(ISR_MASK, &regs->isr);
171 /* disable EP0 IN/OUT interrupt */ 171 /* disable EP0 IN/OUT interrupt */
172 writel(GIMR0_CXOUT | GIMR0_CXIN, &regs->gimr0); 172 writel(GIMR0_CXOUT | GIMR0_CXIN, &regs->gimr0);
173 /* disable EPX IN+SPK+OUT interrupts */ 173 /* disable EPX IN+SPK+OUT interrupts */
174 writel(GIMR1_MASK, &regs->gimr1); 174 writel(GIMR1_MASK, &regs->gimr1);
175 /* disable wakeup+idle+dma+zlp interrupts */ 175 /* disable wakeup+idle+dma+zlp interrupts */
176 writel(GIMR2_WAKEUP | GIMR2_IDLE | GIMR2_DMAERR | GIMR2_DMAFIN 176 writel(GIMR2_WAKEUP | GIMR2_IDLE | GIMR2_DMAERR | GIMR2_DMAFIN
177 | GIMR2_ZLPRX | GIMR2_ZLPTX, &regs->gimr2); 177 | GIMR2_ZLPRX | GIMR2_ZLPTX, &regs->gimr2);
178 /* enable all group interrupt */ 178 /* enable all group interrupt */
179 writel(0, &regs->gimr); 179 writel(0, &regs->gimr);
180 180
181 /* suspend delay = 3 ms */ 181 /* suspend delay = 3 ms */
182 writel(3, &regs->idle); 182 writel(3, &regs->idle);
183 183
184 /* turn-on device interrupts */ 184 /* turn-on device interrupts */
185 setbits_le32(&regs->dev_ctrl, DEVCTRL_GIRQ_EN); 185 setbits_le32(&regs->dev_ctrl, DEVCTRL_GIRQ_EN);
186 186
187 return 0; 187 return 0;
188 } 188 }
189 189
190 static inline int fotg210_cxwait(struct fotg210_chip *chip, uint32_t mask) 190 static inline int fotg210_cxwait(struct fotg210_chip *chip, uint32_t mask)
191 { 191 {
192 struct fotg210_regs *regs = chip->regs; 192 struct fotg210_regs *regs = chip->regs;
193 int ret = -1; 193 int ret = -1;
194 ulong ts; 194 ulong ts;
195 195
196 for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) { 196 for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
197 if ((readl(&regs->cxfifo) & mask) != mask) 197 if ((readl(&regs->cxfifo) & mask) != mask)
198 continue; 198 continue;
199 ret = 0; 199 ret = 0;
200 break; 200 break;
201 } 201 }
202 202
203 if (ret) 203 if (ret)
204 printf("fotg210: cx/ep0 timeout\n"); 204 printf("fotg210: cx/ep0 timeout\n");
205 205
206 return ret; 206 return ret;
207 } 207 }
208 208
209 static int fotg210_dma(struct fotg210_ep *ep, struct fotg210_request *req) 209 static int fotg210_dma(struct fotg210_ep *ep, struct fotg210_request *req)
210 { 210 {
211 struct fotg210_chip *chip = ep->chip; 211 struct fotg210_chip *chip = ep->chip;
212 struct fotg210_regs *regs = chip->regs; 212 struct fotg210_regs *regs = chip->regs;
213 uint32_t tmp, ts; 213 uint32_t tmp, ts;
214 uint8_t *buf = req->req.buf + req->req.actual; 214 uint8_t *buf = req->req.buf + req->req.actual;
215 uint32_t len = req->req.length - req->req.actual; 215 uint32_t len = req->req.length - req->req.actual;
216 int fifo = ep_to_fifo(chip, ep->id); 216 int fifo = ep_to_fifo(chip, ep->id);
217 int ret = -EBUSY; 217 int ret = -EBUSY;
218 218
219 /* 1. init dma buffer */ 219 /* 1. init dma buffer */
220 if (len > ep->maxpacket) 220 if (len > ep->maxpacket)
221 len = ep->maxpacket; 221 len = ep->maxpacket;
222 222
223 /* 2. wait for dma ready (hardware) */ 223 /* 2. wait for dma ready (hardware) */
224 for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) { 224 for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
225 if (!(readl(&regs->dma_ctrl) & DMACTRL_START)) { 225 if (!(readl(&regs->dma_ctrl) & DMACTRL_START)) {
226 ret = 0; 226 ret = 0;
227 break; 227 break;
228 } 228 }
229 } 229 }
230 if (ret) { 230 if (ret) {
231 printf("fotg210: dma busy\n"); 231 printf("fotg210: dma busy\n");
232 req->req.status = ret; 232 req->req.status = ret;
233 return ret; 233 return ret;
234 } 234 }
235 235
236 /* 3. DMA target setup */ 236 /* 3. DMA target setup */
237 if (ep->desc->bEndpointAddress & USB_DIR_IN) 237 if (ep->desc->bEndpointAddress & USB_DIR_IN)
238 flush_dcache_range((ulong)buf, (ulong)buf + len); 238 flush_dcache_range((ulong)buf, (ulong)buf + len);
239 else 239 else
240 invalidate_dcache_range((ulong)buf, (ulong)buf + len); 240 invalidate_dcache_range((ulong)buf, (ulong)buf + len);
241 241
242 writel(virt_to_phys(buf), &regs->dma_addr); 242 writel(virt_to_phys(buf), &regs->dma_addr);
243 243
244 if (ep->desc->bEndpointAddress & USB_DIR_IN) { 244 if (ep->desc->bEndpointAddress & USB_DIR_IN) {
245 if (ep->id == 0) { 245 if (ep->id == 0) {
246 /* Wait until cx/ep0 fifo empty */ 246 /* Wait until cx/ep0 fifo empty */
247 fotg210_cxwait(chip, CXFIFO_CXFIFOE); 247 fotg210_cxwait(chip, CXFIFO_CXFIFOE);
248 writel(DMAFIFO_CX, &regs->dma_fifo); 248 writel(DMAFIFO_CX, &regs->dma_fifo);
249 } else { 249 } else {
250 /* Wait until epx fifo empty */ 250 /* Wait until epx fifo empty */
251 fotg210_cxwait(chip, CXFIFO_FIFOE(fifo)); 251 fotg210_cxwait(chip, CXFIFO_FIFOE(fifo));
252 writel(DMAFIFO_FIFO(fifo), &regs->dma_fifo); 252 writel(DMAFIFO_FIFO(fifo), &regs->dma_fifo);
253 } 253 }
254 writel(DMACTRL_LEN(len) | DMACTRL_MEM2FIFO, &regs->dma_ctrl); 254 writel(DMACTRL_LEN(len) | DMACTRL_MEM2FIFO, &regs->dma_ctrl);
255 } else { 255 } else {
256 uint32_t blen; 256 uint32_t blen;
257 257
258 if (ep->id == 0) { 258 if (ep->id == 0) {
259 writel(DMAFIFO_CX, &regs->dma_fifo); 259 writel(DMAFIFO_CX, &regs->dma_fifo);
260 do { 260 do {
261 blen = CXFIFO_BYTES(readl(&regs->cxfifo)); 261 blen = CXFIFO_BYTES(readl(&regs->cxfifo));
262 } while (blen < len); 262 } while (blen < len);
263 } else { 263 } else {
264 writel(DMAFIFO_FIFO(fifo), &regs->dma_fifo); 264 writel(DMAFIFO_FIFO(fifo), &regs->dma_fifo);
265 blen = FIFOCSR_BYTES(readl(&regs->fifocsr[fifo])); 265 blen = FIFOCSR_BYTES(readl(&regs->fifocsr[fifo]));
266 } 266 }
267 len = (len < blen) ? len : blen; 267 len = (len < blen) ? len : blen;
268 writel(DMACTRL_LEN(len) | DMACTRL_FIFO2MEM, &regs->dma_ctrl); 268 writel(DMACTRL_LEN(len) | DMACTRL_FIFO2MEM, &regs->dma_ctrl);
269 } 269 }
270 270
271 /* 4. DMA start */ 271 /* 4. DMA start */
272 setbits_le32(&regs->dma_ctrl, DMACTRL_START); 272 setbits_le32(&regs->dma_ctrl, DMACTRL_START);
273 273
274 /* 5. DMA wait */ 274 /* 5. DMA wait */
275 ret = -EBUSY; 275 ret = -EBUSY;
276 for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) { 276 for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
277 tmp = readl(&regs->gisr2); 277 tmp = readl(&regs->gisr2);
278 /* DMA complete */ 278 /* DMA complete */
279 if (tmp & GISR2_DMAFIN) { 279 if (tmp & GISR2_DMAFIN) {
280 ret = 0; 280 ret = 0;
281 break; 281 break;
282 } 282 }
283 /* DMA error */ 283 /* DMA error */
284 if (tmp & GISR2_DMAERR) { 284 if (tmp & GISR2_DMAERR) {
285 printf("fotg210: dma error\n"); 285 printf("fotg210: dma error\n");
286 break; 286 break;
287 } 287 }
288 /* resume, suspend, reset */ 288 /* resume, suspend, reset */
289 if (tmp & (GISR2_RESUME | GISR2_SUSPEND | GISR2_RESET)) { 289 if (tmp & (GISR2_RESUME | GISR2_SUSPEND | GISR2_RESET)) {
290 printf("fotg210: dma reset by host\n"); 290 printf("fotg210: dma reset by host\n");
291 break; 291 break;
292 } 292 }
293 } 293 }
294 294
295 /* 7. DMA target reset */ 295 /* 7. DMA target reset */
296 if (ret) 296 if (ret)
297 writel(DMACTRL_ABORT | DMACTRL_CLRFF, &regs->dma_ctrl); 297 writel(DMACTRL_ABORT | DMACTRL_CLRFF, &regs->dma_ctrl);
298 298
299 writel(0, &regs->gisr2); 299 writel(0, &regs->gisr2);
300 writel(0, &regs->dma_fifo); 300 writel(0, &regs->dma_fifo);
301 301
302 req->req.status = ret; 302 req->req.status = ret;
303 if (!ret) 303 if (!ret)
304 req->req.actual += len; 304 req->req.actual += len;
305 else 305 else
306 printf("fotg210: ep%d dma error(code=%d)\n", ep->id, ret); 306 printf("fotg210: ep%d dma error(code=%d)\n", ep->id, ret);
307 307
308 return len; 308 return len;
309 } 309 }
310 310
311 /* 311 /*
312 * result of setup packet 312 * result of setup packet
313 */ 313 */
314 #define CX_IDLE 0 314 #define CX_IDLE 0
315 #define CX_FINISH 1 315 #define CX_FINISH 1
316 #define CX_STALL 2 316 #define CX_STALL 2
317 317
318 static void fotg210_setup(struct fotg210_chip *chip) 318 static void fotg210_setup(struct fotg210_chip *chip)
319 { 319 {
320 int id, ret = CX_IDLE; 320 int id, ret = CX_IDLE;
321 uint32_t tmp[2]; 321 uint32_t tmp[2];
322 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)tmp; 322 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)tmp;
323 struct fotg210_regs *regs = chip->regs; 323 struct fotg210_regs *regs = chip->regs;
324 324
325 /* 325 /*
326 * If this is the first Cx 8 byte command, 326 * If this is the first Cx 8 byte command,
327 * we can now query USB mode (high/full speed; USB 2.0/USB 1.0) 327 * we can now query USB mode (high/full speed; USB 2.0/USB 1.0)
328 */ 328 */
329 if (chip->state == USB_STATE_POWERED) { 329 if (chip->state == USB_STATE_POWERED) {
330 chip->state = USB_STATE_DEFAULT; 330 chip->state = USB_STATE_DEFAULT;
331 if (readl(&regs->otgcsr) & OTGCSR_DEV_B) { 331 if (readl(&regs->otgcsr) & OTGCSR_DEV_B) {
332 /* Mini-B */ 332 /* Mini-B */
333 if (readl(&regs->dev_ctrl) & DEVCTRL_HS) { 333 if (readl(&regs->dev_ctrl) & DEVCTRL_HS) {
334 puts("fotg210: HS\n"); 334 puts("fotg210: HS\n");
335 chip->gadget.speed = USB_SPEED_HIGH; 335 chip->gadget.speed = USB_SPEED_HIGH;
336 /* SOF mask timer = 1100 ticks */ 336 /* SOF mask timer = 1100 ticks */
337 writel(SOFMTR_TMR(1100), &regs->sof_mtr); 337 writel(SOFMTR_TMR(1100), &regs->sof_mtr);
338 } else { 338 } else {
339 puts("fotg210: FS\n"); 339 puts("fotg210: FS\n");
340 chip->gadget.speed = USB_SPEED_FULL; 340 chip->gadget.speed = USB_SPEED_FULL;
341 /* SOF mask timer = 10000 ticks */ 341 /* SOF mask timer = 10000 ticks */
342 writel(SOFMTR_TMR(10000), &regs->sof_mtr); 342 writel(SOFMTR_TMR(10000), &regs->sof_mtr);
343 } 343 }
344 } else { 344 } else {
345 printf("fotg210: mini-A?\n"); 345 printf("fotg210: mini-A?\n");
346 } 346 }
347 } 347 }
348 348
349 /* switch data port to ep0 */ 349 /* switch data port to ep0 */
350 writel(DMAFIFO_CX, &regs->dma_fifo); 350 writel(DMAFIFO_CX, &regs->dma_fifo);
351 /* fetch 8 bytes setup packet */ 351 /* fetch 8 bytes setup packet */
352 tmp[0] = readl(&regs->ep0_data); 352 tmp[0] = readl(&regs->ep0_data);
353 tmp[1] = readl(&regs->ep0_data); 353 tmp[1] = readl(&regs->ep0_data);
354 /* release data port */ 354 /* release data port */
355 writel(0, &regs->dma_fifo); 355 writel(0, &regs->dma_fifo);
356 356
357 if (req->bRequestType & USB_DIR_IN) 357 if (req->bRequestType & USB_DIR_IN)
358 ep0_desc.bEndpointAddress = USB_DIR_IN; 358 ep0_desc.bEndpointAddress = USB_DIR_IN;
359 else 359 else
360 ep0_desc.bEndpointAddress = USB_DIR_OUT; 360 ep0_desc.bEndpointAddress = USB_DIR_OUT;
361 361
362 ret = CX_IDLE; 362 ret = CX_IDLE;
363 363
364 if ((req->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { 364 if ((req->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
365 switch (req->bRequest) { 365 switch (req->bRequest) {
366 case USB_REQ_SET_CONFIGURATION: 366 case USB_REQ_SET_CONFIGURATION:
367 debug("fotg210: set_cfg(%d)\n", req->wValue & 0x00FF); 367 debug("fotg210: set_cfg(%d)\n", req->wValue & 0x00FF);
368 if (!(req->wValue & 0x00FF)) { 368 if (!(req->wValue & 0x00FF)) {
369 chip->state = USB_STATE_ADDRESS; 369 chip->state = USB_STATE_ADDRESS;
370 writel(chip->addr, &regs->dev_addr); 370 writel(chip->addr, &regs->dev_addr);
371 } else { 371 } else {
372 chip->state = USB_STATE_CONFIGURED; 372 chip->state = USB_STATE_CONFIGURED;
373 writel(chip->addr | DEVADDR_CONF, 373 writel(chip->addr | DEVADDR_CONF,
374 &regs->dev_addr); 374 &regs->dev_addr);
375 } 375 }
376 ret = CX_IDLE; 376 ret = CX_IDLE;
377 break; 377 break;
378 378
379 case USB_REQ_SET_ADDRESS: 379 case USB_REQ_SET_ADDRESS:
380 debug("fotg210: set_addr(0x%04X)\n", req->wValue); 380 debug("fotg210: set_addr(0x%04X)\n", req->wValue);
381 chip->state = USB_STATE_ADDRESS; 381 chip->state = USB_STATE_ADDRESS;
382 chip->addr = req->wValue & DEVADDR_ADDR_MASK; 382 chip->addr = req->wValue & DEVADDR_ADDR_MASK;
383 ret = CX_FINISH; 383 ret = CX_FINISH;
384 writel(chip->addr, &regs->dev_addr); 384 writel(chip->addr, &regs->dev_addr);
385 break; 385 break;
386 386
387 case USB_REQ_CLEAR_FEATURE: 387 case USB_REQ_CLEAR_FEATURE:
388 debug("fotg210: clr_feature(%d, %d)\n", 388 debug("fotg210: clr_feature(%d, %d)\n",
389 req->bRequestType & 0x03, req->wValue); 389 req->bRequestType & 0x03, req->wValue);
390 switch (req->wValue) { 390 switch (req->wValue) {
391 case 0: /* [Endpoint] halt */ 391 case 0: /* [Endpoint] halt */
392 ep_reset(chip, req->wIndex); 392 ep_reset(chip, req->wIndex);
393 ret = CX_FINISH; 393 ret = CX_FINISH;
394 break; 394 break;
395 case 1: /* [Device] remote wake-up */ 395 case 1: /* [Device] remote wake-up */
396 case 2: /* [Device] test mode */ 396 case 2: /* [Device] test mode */
397 default: 397 default:
398 ret = CX_STALL; 398 ret = CX_STALL;
399 break; 399 break;
400 } 400 }
401 break; 401 break;
402 402
403 case USB_REQ_SET_FEATURE: 403 case USB_REQ_SET_FEATURE:
404 debug("fotg210: set_feature(%d, %d)\n", 404 debug("fotg210: set_feature(%d, %d)\n",
405 req->wValue, req->wIndex & 0xf); 405 req->wValue, req->wIndex & 0xf);
406 switch (req->wValue) { 406 switch (req->wValue) {
407 case 0: /* Endpoint Halt */ 407 case 0: /* Endpoint Halt */
408 id = req->wIndex & 0xf; 408 id = req->wIndex & 0xf;
409 setbits_le32(&regs->iep[id - 1], IEP_STALL); 409 setbits_le32(&regs->iep[id - 1], IEP_STALL);
410 setbits_le32(&regs->oep[id - 1], OEP_STALL); 410 setbits_le32(&regs->oep[id - 1], OEP_STALL);
411 ret = CX_FINISH; 411 ret = CX_FINISH;
412 break; 412 break;
413 case 1: /* Remote Wakeup */ 413 case 1: /* Remote Wakeup */
414 case 2: /* Test Mode */ 414 case 2: /* Test Mode */
415 default: 415 default:
416 ret = CX_STALL; 416 ret = CX_STALL;
417 break; 417 break;
418 } 418 }
419 break; 419 break;
420 420
421 case USB_REQ_GET_STATUS: 421 case USB_REQ_GET_STATUS:
422 debug("fotg210: get_status\n"); 422 debug("fotg210: get_status\n");
423 ret = CX_STALL; 423 ret = CX_STALL;
424 break; 424 break;
425 425
426 case USB_REQ_SET_DESCRIPTOR: 426 case USB_REQ_SET_DESCRIPTOR:
427 debug("fotg210: set_descriptor\n"); 427 debug("fotg210: set_descriptor\n");
428 ret = CX_STALL; 428 ret = CX_STALL;
429 break; 429 break;
430 430
431 case USB_REQ_SYNCH_FRAME: 431 case USB_REQ_SYNCH_FRAME:
432 debug("fotg210: sync frame\n"); 432 debug("fotg210: sync frame\n");
433 ret = CX_STALL; 433 ret = CX_STALL;
434 break; 434 break;
435 } 435 }
436 } /* if ((req->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) */ 436 } /* if ((req->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) */
437 437
438 if (ret == CX_IDLE && chip->driver->setup) { 438 if (ret == CX_IDLE && chip->driver->setup) {
439 if (chip->driver->setup(&chip->gadget, req) < 0) 439 if (chip->driver->setup(&chip->gadget, req) < 0)
440 ret = CX_STALL; 440 ret = CX_STALL;
441 else 441 else
442 ret = CX_FINISH; 442 ret = CX_FINISH;
443 } 443 }
444 444
445 switch (ret) { 445 switch (ret) {
446 case CX_FINISH: 446 case CX_FINISH:
447 setbits_le32(&regs->cxfifo, CXFIFO_CXFIN); 447 setbits_le32(&regs->cxfifo, CXFIFO_CXFIN);
448 break; 448 break;
449 449
450 case CX_STALL: 450 case CX_STALL:
451 setbits_le32(&regs->cxfifo, CXFIFO_CXSTALL | CXFIFO_CXFIN); 451 setbits_le32(&regs->cxfifo, CXFIFO_CXSTALL | CXFIFO_CXFIN);
452 printf("fotg210: cx_stall!\n"); 452 printf("fotg210: cx_stall!\n");
453 break; 453 break;
454 454
455 case CX_IDLE: 455 case CX_IDLE:
456 debug("fotg210: cx_idle?\n"); 456 debug("fotg210: cx_idle?\n");
457 default: 457 default:
458 break; 458 break;
459 } 459 }
460 } 460 }
461 461
462 /* 462 /*
463 * fifo - FIFO id 463 * fifo - FIFO id
464 * zlp - zero length packet 464 * zlp - zero length packet
465 */ 465 */
466 static void fotg210_recv(struct fotg210_chip *chip, int ep_id) 466 static void fotg210_recv(struct fotg210_chip *chip, int ep_id)
467 { 467 {
468 struct fotg210_regs *regs = chip->regs; 468 struct fotg210_regs *regs = chip->regs;
469 struct fotg210_ep *ep = chip->ep + ep_id; 469 struct fotg210_ep *ep = chip->ep + ep_id;
470 struct fotg210_request *req; 470 struct fotg210_request *req;
471 int len; 471 int len;
472 472
473 if (ep->stopped || (ep->desc->bEndpointAddress & USB_DIR_IN)) { 473 if (ep->stopped || (ep->desc->bEndpointAddress & USB_DIR_IN)) {
474 printf("fotg210: ep%d recv, invalid!\n", ep->id); 474 printf("fotg210: ep%d recv, invalid!\n", ep->id);
475 return; 475 return;
476 } 476 }
477 477
478 if (list_empty(&ep->queue)) { 478 if (list_empty(&ep->queue)) {
479 printf("fotg210: ep%d recv, drop!\n", ep->id); 479 printf("fotg210: ep%d recv, drop!\n", ep->id);
480 return; 480 return;
481 } 481 }
482 482
483 req = list_first_entry(&ep->queue, struct fotg210_request, queue); 483 req = list_first_entry(&ep->queue, struct fotg210_request, queue);
484 len = fotg210_dma(ep, req); 484 len = fotg210_dma(ep, req);
485 if (len < ep->ep.maxpacket || req->req.length <= req->req.actual) { 485 if (len < ep->ep.maxpacket || req->req.length <= req->req.actual) {
486 list_del_init(&req->queue); 486 list_del_init(&req->queue);
487 if (req->req.complete) 487 if (req->req.complete)
488 req->req.complete(&ep->ep, &req->req); 488 req->req.complete(&ep->ep, &req->req);
489 } 489 }
490 490
491 if (ep->id > 0 && list_empty(&ep->queue)) { 491 if (ep->id > 0 && list_empty(&ep->queue)) {
492 setbits_le32(&regs->gimr1, 492 setbits_le32(&regs->gimr1,
493 GIMR1_FIFO_RX(ep_to_fifo(chip, ep->id))); 493 GIMR1_FIFO_RX(ep_to_fifo(chip, ep->id)));
494 } 494 }
495 } 495 }
496 496
497 /* 497 /*
498 * USB Gadget Layer 498 * USB Gadget Layer
499 */ 499 */
500 static int fotg210_ep_enable( 500 static int fotg210_ep_enable(
501 struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) 501 struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
502 { 502 {
503 struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep); 503 struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
504 struct fotg210_chip *chip = ep->chip; 504 struct fotg210_chip *chip = ep->chip;
505 struct fotg210_regs *regs = chip->regs; 505 struct fotg210_regs *regs = chip->regs;
506 int id = ep_to_fifo(chip, ep->id); 506 int id = ep_to_fifo(chip, ep->id);
507 int in = (desc->bEndpointAddress & USB_DIR_IN) ? 1 : 0; 507 int in = (desc->bEndpointAddress & USB_DIR_IN) ? 1 : 0;
508 508
509 if (!_ep || !desc 509 if (!_ep || !desc
510 || desc->bDescriptorType != USB_DT_ENDPOINT 510 || desc->bDescriptorType != USB_DT_ENDPOINT
511 || le16_to_cpu(desc->wMaxPacketSize) == 0) { 511 || le16_to_cpu(desc->wMaxPacketSize) == 0) {
512 printf("fotg210: bad ep or descriptor\n"); 512 printf("fotg210: bad ep or descriptor\n");
513 return -EINVAL; 513 return -EINVAL;
514 } 514 }
515 515
516 ep->desc = desc; 516 ep->desc = desc;
517 ep->stopped = 0; 517 ep->stopped = 0;
518 518
519 if (in) 519 if (in)
520 setbits_le32(&regs->fifomap, FIFOMAP(id, FIFOMAP_IN)); 520 setbits_le32(&regs->fifomap, FIFOMAP(id, FIFOMAP_IN));
521 521
522 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { 522 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
523 case USB_ENDPOINT_XFER_CONTROL: 523 case USB_ENDPOINT_XFER_CONTROL:
524 return -EINVAL; 524 return -EINVAL;
525 525
526 case USB_ENDPOINT_XFER_ISOC: 526 case USB_ENDPOINT_XFER_ISOC:
527 setbits_le32(&regs->fifocfg, 527 setbits_le32(&regs->fifocfg,
528 FIFOCFG(id, FIFOCFG_EN | FIFOCFG_ISOC)); 528 FIFOCFG(id, FIFOCFG_EN | FIFOCFG_ISOC));
529 break; 529 break;
530 530
531 case USB_ENDPOINT_XFER_BULK: 531 case USB_ENDPOINT_XFER_BULK:
532 setbits_le32(&regs->fifocfg, 532 setbits_le32(&regs->fifocfg,
533 FIFOCFG(id, FIFOCFG_EN | FIFOCFG_BULK)); 533 FIFOCFG(id, FIFOCFG_EN | FIFOCFG_BULK));
534 break; 534 break;
535 535
536 case USB_ENDPOINT_XFER_INT: 536 case USB_ENDPOINT_XFER_INT:
537 setbits_le32(&regs->fifocfg, 537 setbits_le32(&regs->fifocfg,
538 FIFOCFG(id, FIFOCFG_EN | FIFOCFG_INTR)); 538 FIFOCFG(id, FIFOCFG_EN | FIFOCFG_INTR));
539 break; 539 break;
540 } 540 }
541 541
542 return 0; 542 return 0;
543 } 543 }
544 544
545 static int fotg210_ep_disable(struct usb_ep *_ep) 545 static int fotg210_ep_disable(struct usb_ep *_ep)
546 { 546 {
547 struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep); 547 struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
548 struct fotg210_chip *chip = ep->chip; 548 struct fotg210_chip *chip = ep->chip;
549 struct fotg210_regs *regs = chip->regs; 549 struct fotg210_regs *regs = chip->regs;
550 int id = ep_to_fifo(chip, ep->id); 550 int id = ep_to_fifo(chip, ep->id);
551 551
552 ep->desc = NULL; 552 ep->desc = NULL;
553 ep->stopped = 1; 553 ep->stopped = 1;
554 554
555 clrbits_le32(&regs->fifocfg, FIFOCFG(id, FIFOCFG_CFG_MASK)); 555 clrbits_le32(&regs->fifocfg, FIFOCFG(id, FIFOCFG_CFG_MASK));
556 clrbits_le32(&regs->fifomap, FIFOMAP(id, FIFOMAP_DIR_MASK)); 556 clrbits_le32(&regs->fifomap, FIFOMAP(id, FIFOMAP_DIR_MASK));
557 557
558 return 0; 558 return 0;
559 } 559 }
560 560
561 static struct usb_request *fotg210_ep_alloc_request( 561 static struct usb_request *fotg210_ep_alloc_request(
562 struct usb_ep *_ep, gfp_t gfp_flags) 562 struct usb_ep *_ep, gfp_t gfp_flags)
563 { 563 {
564 struct fotg210_request *req = malloc(sizeof(*req)); 564 struct fotg210_request *req = malloc(sizeof(*req));
565 565
566 if (req) { 566 if (req) {
567 memset(req, 0, sizeof(*req)); 567 memset(req, 0, sizeof(*req));
568 INIT_LIST_HEAD(&req->queue); 568 INIT_LIST_HEAD(&req->queue);
569 } 569 }
570 return &req->req; 570 return &req->req;
571 } 571 }
572 572
573 static void fotg210_ep_free_request( 573 static void fotg210_ep_free_request(
574 struct usb_ep *_ep, struct usb_request *_req) 574 struct usb_ep *_ep, struct usb_request *_req)
575 { 575 {
576 struct fotg210_request *req; 576 struct fotg210_request *req;
577 577
578 req = container_of(_req, struct fotg210_request, req); 578 req = container_of(_req, struct fotg210_request, req);
579 free(req); 579 free(req);
580 } 580 }
581 581
582 static int fotg210_ep_queue( 582 static int fotg210_ep_queue(
583 struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) 583 struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
584 { 584 {
585 struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep); 585 struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
586 struct fotg210_chip *chip = ep->chip; 586 struct fotg210_chip *chip = ep->chip;
587 struct fotg210_regs *regs = chip->regs; 587 struct fotg210_regs *regs = chip->regs;
588 struct fotg210_request *req; 588 struct fotg210_request *req;
589 589
590 req = container_of(_req, struct fotg210_request, req); 590 req = container_of(_req, struct fotg210_request, req);
591 if (!_req || !_req->complete || !_req->buf 591 if (!_req || !_req->complete || !_req->buf
592 || !list_empty(&req->queue)) { 592 || !list_empty(&req->queue)) {
593 printf("fotg210: invalid request to ep%d\n", ep->id); 593 printf("fotg210: invalid request to ep%d\n", ep->id);
594 return -EINVAL; 594 return -EINVAL;
595 } 595 }
596 596
597 if (!chip || chip->state == USB_STATE_SUSPENDED) { 597 if (!chip || chip->state == USB_STATE_SUSPENDED) {
598 printf("fotg210: request while chip suspended\n"); 598 printf("fotg210: request while chip suspended\n");
599 return -EINVAL; 599 return -EINVAL;
600 } 600 }
601 601
602 req->req.actual = 0; 602 req->req.actual = 0;
603 req->req.status = -EINPROGRESS; 603 req->req.status = -EINPROGRESS;
604 604
605 if (req->req.length == 0) { 605 if (req->req.length == 0) {
606 req->req.status = 0; 606 req->req.status = 0;
607 if (req->req.complete) 607 if (req->req.complete)
608 req->req.complete(&ep->ep, &req->req); 608 req->req.complete(&ep->ep, &req->req);
609 return 0; 609 return 0;
610 } 610 }
611 611
612 if (ep->id == 0) { 612 if (ep->id == 0) {
613 do { 613 do {
614 int len = fotg210_dma(ep, req); 614 int len = fotg210_dma(ep, req);
615 if (len < ep->ep.maxpacket) 615 if (len < ep->ep.maxpacket)
616 break; 616 break;
617 if (ep->desc->bEndpointAddress & USB_DIR_IN) 617 if (ep->desc->bEndpointAddress & USB_DIR_IN)
618 udelay(100); 618 udelay(100);
619 } while (req->req.length > req->req.actual); 619 } while (req->req.length > req->req.actual);
620 } else { 620 } else {
621 if (ep->desc->bEndpointAddress & USB_DIR_IN) { 621 if (ep->desc->bEndpointAddress & USB_DIR_IN) {
622 do { 622 do {
623 int len = fotg210_dma(ep, req); 623 int len = fotg210_dma(ep, req);
624 if (len < ep->ep.maxpacket) 624 if (len < ep->ep.maxpacket)
625 break; 625 break;
626 } while (req->req.length > req->req.actual); 626 } while (req->req.length > req->req.actual);
627 } else { 627 } else {
628 list_add_tail(&req->queue, &ep->queue); 628 list_add_tail(&req->queue, &ep->queue);
629 clrbits_le32(&regs->gimr1, 629 clrbits_le32(&regs->gimr1,
630 GIMR1_FIFO_RX(ep_to_fifo(chip, ep->id))); 630 GIMR1_FIFO_RX(ep_to_fifo(chip, ep->id)));
631 } 631 }
632 } 632 }
633 633
634 if (ep->id == 0 || (ep->desc->bEndpointAddress & USB_DIR_IN)) { 634 if (ep->id == 0 || (ep->desc->bEndpointAddress & USB_DIR_IN)) {
635 if (req->req.complete) 635 if (req->req.complete)
636 req->req.complete(&ep->ep, &req->req); 636 req->req.complete(&ep->ep, &req->req);
637 } 637 }
638 638
639 return 0; 639 return 0;
640 } 640 }
641 641
642 static int fotg210_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) 642 static int fotg210_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
643 { 643 {
644 struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep); 644 struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
645 struct fotg210_request *req; 645 struct fotg210_request *req;
646 646
647 /* make sure it's actually queued on this endpoint */ 647 /* make sure it's actually queued on this endpoint */
648 list_for_each_entry(req, &ep->queue, queue) { 648 list_for_each_entry(req, &ep->queue, queue) {
649 if (&req->req == _req) 649 if (&req->req == _req)
650 break; 650 break;
651 } 651 }
652 if (&req->req != _req) 652 if (&req->req != _req)
653 return -EINVAL; 653 return -EINVAL;
654 654
655 /* remove the request */ 655 /* remove the request */
656 list_del_init(&req->queue); 656 list_del_init(&req->queue);
657 657
658 /* update status & invoke complete callback */ 658 /* update status & invoke complete callback */
659 if (req->req.status == -EINPROGRESS) { 659 if (req->req.status == -EINPROGRESS) {
660 req->req.status = -ECONNRESET; 660 req->req.status = -ECONNRESET;
661 if (req->req.complete) 661 if (req->req.complete)
662 req->req.complete(_ep, &req->req); 662 req->req.complete(_ep, &req->req);
663 } 663 }
664 664
665 return 0; 665 return 0;
666 } 666 }
667 667
668 static int fotg210_ep_halt(struct usb_ep *_ep, int halt) 668 static int fotg210_ep_halt(struct usb_ep *_ep, int halt)
669 { 669 {
670 struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep); 670 struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
671 struct fotg210_chip *chip = ep->chip; 671 struct fotg210_chip *chip = ep->chip;
672 struct fotg210_regs *regs = chip->regs; 672 struct fotg210_regs *regs = chip->regs;
673 int ret = -1; 673 int ret = -1;
674 674
675 debug("fotg210: ep%d halt=%d\n", ep->id, halt); 675 debug("fotg210: ep%d halt=%d\n", ep->id, halt);
676 676
677 /* Endpoint STALL */ 677 /* Endpoint STALL */
678 if (ep->id > 0 && ep->id <= CFG_NUM_ENDPOINTS) { 678 if (ep->id > 0 && ep->id <= CFG_NUM_ENDPOINTS) {
679 if (halt) { 679 if (halt) {
680 /* wait until all ep fifo empty */ 680 /* wait until all ep fifo empty */
681 fotg210_cxwait(chip, 0xf00); 681 fotg210_cxwait(chip, 0xf00);
682 /* stall */ 682 /* stall */
683 if (ep->desc->bEndpointAddress & USB_DIR_IN) { 683 if (ep->desc->bEndpointAddress & USB_DIR_IN) {
684 setbits_le32(&regs->iep[ep->id - 1], 684 setbits_le32(&regs->iep[ep->id - 1],
685 IEP_STALL); 685 IEP_STALL);
686 } else { 686 } else {
687 setbits_le32(&regs->oep[ep->id - 1], 687 setbits_le32(&regs->oep[ep->id - 1],
688 OEP_STALL); 688 OEP_STALL);
689 } 689 }
690 } else { 690 } else {
691 if (ep->desc->bEndpointAddress & USB_DIR_IN) { 691 if (ep->desc->bEndpointAddress & USB_DIR_IN) {
692 clrbits_le32(&regs->iep[ep->id - 1], 692 clrbits_le32(&regs->iep[ep->id - 1],
693 IEP_STALL); 693 IEP_STALL);
694 } else { 694 } else {
695 clrbits_le32(&regs->oep[ep->id - 1], 695 clrbits_le32(&regs->oep[ep->id - 1],
696 OEP_STALL); 696 OEP_STALL);
697 } 697 }
698 } 698 }
699 ret = 0; 699 ret = 0;
700 } 700 }
701 701
702 return ret; 702 return ret;
703 } 703 }
704 704
705 /* 705 /*
706 * activate/deactivate link with host. 706 * activate/deactivate link with host.
707 */ 707 */
708 static void pullup(struct fotg210_chip *chip, int is_on) 708 static void pullup(struct fotg210_chip *chip, int is_on)
709 { 709 {
710 struct fotg210_regs *regs = chip->regs; 710 struct fotg210_regs *regs = chip->regs;
711 711
712 if (is_on) { 712 if (is_on) {
713 if (!chip->pullup) { 713 if (!chip->pullup) {
714 chip->state = USB_STATE_POWERED; 714 chip->state = USB_STATE_POWERED;
715 chip->pullup = 1; 715 chip->pullup = 1;
716 /* enable the chip */ 716 /* enable the chip */
717 setbits_le32(&regs->dev_ctrl, DEVCTRL_EN); 717 setbits_le32(&regs->dev_ctrl, DEVCTRL_EN);
718 /* clear unplug bit (BIT0) */ 718 /* clear unplug bit (BIT0) */
719 clrbits_le32(&regs->phy_tmsr, PHYTMSR_UNPLUG); 719 clrbits_le32(&regs->phy_tmsr, PHYTMSR_UNPLUG);
720 } 720 }
721 } else { 721 } else {
722 chip->state = USB_STATE_NOTATTACHED; 722 chip->state = USB_STATE_NOTATTACHED;
723 chip->pullup = 0; 723 chip->pullup = 0;
724 chip->addr = 0; 724 chip->addr = 0;
725 writel(chip->addr, &regs->dev_addr); 725 writel(chip->addr, &regs->dev_addr);
726 /* set unplug bit (BIT0) */ 726 /* set unplug bit (BIT0) */
727 setbits_le32(&regs->phy_tmsr, PHYTMSR_UNPLUG); 727 setbits_le32(&regs->phy_tmsr, PHYTMSR_UNPLUG);
728 /* disable the chip */ 728 /* disable the chip */
729 clrbits_le32(&regs->dev_ctrl, DEVCTRL_EN); 729 clrbits_le32(&regs->dev_ctrl, DEVCTRL_EN);
730 } 730 }
731 } 731 }
732 732
733 static int fotg210_pullup(struct usb_gadget *_gadget, int is_on) 733 static int fotg210_pullup(struct usb_gadget *_gadget, int is_on)
734 { 734 {
735 struct fotg210_chip *chip; 735 struct fotg210_chip *chip;
736 736
737 chip = container_of(_gadget, struct fotg210_chip, gadget); 737 chip = container_of(_gadget, struct fotg210_chip, gadget);
738 738
739 debug("fotg210: pullup=%d\n", is_on); 739 debug("fotg210: pullup=%d\n", is_on);
740 740
741 pullup(chip, is_on); 741 pullup(chip, is_on);
742 742
743 return 0; 743 return 0;
744 } 744 }
745 745
746 static int fotg210_get_frame(struct usb_gadget *_gadget) 746 static int fotg210_get_frame(struct usb_gadget *_gadget)
747 { 747 {
748 struct fotg210_chip *chip; 748 struct fotg210_chip *chip;
749 struct fotg210_regs *regs; 749 struct fotg210_regs *regs;
750 750
751 chip = container_of(_gadget, struct fotg210_chip, gadget); 751 chip = container_of(_gadget, struct fotg210_chip, gadget);
752 regs = chip->regs; 752 regs = chip->regs;
753 753
754 return SOFFNR_FNR(readl(&regs->sof_fnr)); 754 return SOFFNR_FNR(readl(&regs->sof_fnr));
755 } 755 }
756 756
757 static struct usb_gadget_ops fotg210_gadget_ops = { 757 static struct usb_gadget_ops fotg210_gadget_ops = {
758 .get_frame = fotg210_get_frame, 758 .get_frame = fotg210_get_frame,
759 .pullup = fotg210_pullup, 759 .pullup = fotg210_pullup,
760 }; 760 };
761 761
762 static struct usb_ep_ops fotg210_ep_ops = { 762 static struct usb_ep_ops fotg210_ep_ops = {
763 .enable = fotg210_ep_enable, 763 .enable = fotg210_ep_enable,
764 .disable = fotg210_ep_disable, 764 .disable = fotg210_ep_disable,
765 .queue = fotg210_ep_queue, 765 .queue = fotg210_ep_queue,
766 .dequeue = fotg210_ep_dequeue, 766 .dequeue = fotg210_ep_dequeue,
767 .set_halt = fotg210_ep_halt, 767 .set_halt = fotg210_ep_halt,
768 .alloc_request = fotg210_ep_alloc_request, 768 .alloc_request = fotg210_ep_alloc_request,
769 .free_request = fotg210_ep_free_request, 769 .free_request = fotg210_ep_free_request,
770 }; 770 };
771 771
772 static struct fotg210_chip controller = { 772 static struct fotg210_chip controller = {
773 .regs = (void __iomem *)CONFIG_FOTG210_BASE, 773 .regs = (void __iomem *)CONFIG_FOTG210_BASE,
774 .gadget = { 774 .gadget = {
775 .name = "fotg210_udc", 775 .name = "fotg210_udc",
776 .ops = &fotg210_gadget_ops, 776 .ops = &fotg210_gadget_ops,
777 .ep0 = &controller.ep[0].ep, 777 .ep0 = &controller.ep[0].ep,
778 .speed = USB_SPEED_UNKNOWN, 778 .speed = USB_SPEED_UNKNOWN,
779 .is_dualspeed = 1, 779 .is_dualspeed = 1,
780 .is_otg = 0, 780 .is_otg = 0,
781 .is_a_peripheral = 0, 781 .is_a_peripheral = 0,
782 .b_hnp_enable = 0, 782 .b_hnp_enable = 0,
783 .a_hnp_support = 0, 783 .a_hnp_support = 0,
784 .a_alt_hnp_support = 0, 784 .a_alt_hnp_support = 0,
785 }, 785 },
786 .ep[0] = { 786 .ep[0] = {
787 .id = 0, 787 .id = 0,
788 .ep = { 788 .ep = {
789 .name = "ep0", 789 .name = "ep0",
790 .ops = &fotg210_ep_ops, 790 .ops = &fotg210_ep_ops,
791 }, 791 },
792 .desc = &ep0_desc, 792 .desc = &ep0_desc,
793 .chip = &controller, 793 .chip = &controller,
794 .maxpacket = CFG_EP0_MAX_PACKET_SIZE, 794 .maxpacket = CFG_EP0_MAX_PACKET_SIZE,
795 }, 795 },
796 .ep[1] = { 796 .ep[1] = {
797 .id = 1, 797 .id = 1,
798 .ep = { 798 .ep = {
799 .name = "ep1", 799 .name = "ep1",
800 .ops = &fotg210_ep_ops, 800 .ops = &fotg210_ep_ops,
801 }, 801 },
802 .chip = &controller, 802 .chip = &controller,
803 .maxpacket = CFG_EPX_MAX_PACKET_SIZE, 803 .maxpacket = CFG_EPX_MAX_PACKET_SIZE,
804 }, 804 },
805 .ep[2] = { 805 .ep[2] = {
806 .id = 2, 806 .id = 2,
807 .ep = { 807 .ep = {
808 .name = "ep2", 808 .name = "ep2",
809 .ops = &fotg210_ep_ops, 809 .ops = &fotg210_ep_ops,
810 }, 810 },
811 .chip = &controller, 811 .chip = &controller,
812 .maxpacket = CFG_EPX_MAX_PACKET_SIZE, 812 .maxpacket = CFG_EPX_MAX_PACKET_SIZE,
813 }, 813 },
814 .ep[3] = { 814 .ep[3] = {
815 .id = 3, 815 .id = 3,
816 .ep = { 816 .ep = {
817 .name = "ep3", 817 .name = "ep3",
818 .ops = &fotg210_ep_ops, 818 .ops = &fotg210_ep_ops,
819 }, 819 },
820 .chip = &controller, 820 .chip = &controller,
821 .maxpacket = CFG_EPX_MAX_PACKET_SIZE, 821 .maxpacket = CFG_EPX_MAX_PACKET_SIZE,
822 }, 822 },
823 .ep[4] = { 823 .ep[4] = {
824 .id = 4, 824 .id = 4,
825 .ep = { 825 .ep = {
826 .name = "ep4", 826 .name = "ep4",
827 .ops = &fotg210_ep_ops, 827 .ops = &fotg210_ep_ops,
828 }, 828 },
829 .chip = &controller, 829 .chip = &controller,
830 .maxpacket = CFG_EPX_MAX_PACKET_SIZE, 830 .maxpacket = CFG_EPX_MAX_PACKET_SIZE,
831 }, 831 },
832 }; 832 };
833 833
834 int usb_gadget_handle_interrupts(void) 834 int usb_gadget_handle_interrupts(void)
835 { 835 {
836 struct fotg210_chip *chip = &controller; 836 struct fotg210_chip *chip = &controller;
837 struct fotg210_regs *regs = chip->regs; 837 struct fotg210_regs *regs = chip->regs;
838 uint32_t id, st, isr, gisr; 838 uint32_t id, st, isr, gisr;
839 839
840 isr = readl(&regs->isr) & (~readl(&regs->imr)); 840 isr = readl(&regs->isr) & (~readl(&regs->imr));
841 gisr = readl(&regs->gisr) & (~readl(&regs->gimr)); 841 gisr = readl(&regs->gisr) & (~readl(&regs->gimr));
842 if (!(isr & ISR_DEV) || !gisr) 842 if (!(isr & ISR_DEV) || !gisr)
843 return 0; 843 return 0;
844 844
845 writel(ISR_DEV, &regs->isr); 845 writel(ISR_DEV, &regs->isr);
846 846
847 /* CX interrupts */ 847 /* CX interrupts */
848 if (gisr & GISR_GRP0) { 848 if (gisr & GISR_GRP0) {
849 st = readl(&regs->gisr0); 849 st = readl(&regs->gisr0);
850 /*
851 * Write 1 and then 0 works for both W1C & RW.
852 *
853 * HW v1.11.0+: It's a W1C register (write 1 clear)
854 * HW v1.10.0-: It's a R/W register (write 0 clear)
855 */
856 writel(st & GISR0_CXABORT, &regs->gisr0);
850 writel(0, &regs->gisr0); 857 writel(0, &regs->gisr0);
851 858
852 if (st & GISR0_CXERR) 859 if (st & GISR0_CXERR)
853 printf("fotg210: cmd error\n"); 860 printf("fotg210: cmd error\n");
854 861
855 if (st & GISR0_CXABORT) 862 if (st & GISR0_CXABORT)
856 printf("fotg210: cmd abort\n"); 863 printf("fotg210: cmd abort\n");
857 864
858 if (st & GISR0_CXSETUP) /* setup */ 865 if (st & GISR0_CXSETUP) /* setup */
859 fotg210_setup(chip); 866 fotg210_setup(chip);
860 else if (st & GISR0_CXEND) /* command finish */ 867 else if (st & GISR0_CXEND) /* command finish */
861 setbits_le32(&regs->cxfifo, CXFIFO_CXFIN); 868 setbits_le32(&regs->cxfifo, CXFIFO_CXFIN);
862 } 869 }
863 870
864 /* FIFO interrupts */ 871 /* FIFO interrupts */
865 if (gisr & GISR_GRP1) { 872 if (gisr & GISR_GRP1) {
866 st = readl(&regs->gisr1); 873 st = readl(&regs->gisr1);
867 for (id = 0; id < 4; ++id) { 874 for (id = 0; id < 4; ++id) {
868 if (st & GISR1_RX_FIFO(id)) 875 if (st & GISR1_RX_FIFO(id))
869 fotg210_recv(chip, fifo_to_ep(chip, id, 0)); 876 fotg210_recv(chip, fifo_to_ep(chip, id, 0));
870 } 877 }
871 } 878 }
872 879
873 /* Device Status Interrupts */ 880 /* Device Status Interrupts */
874 if (gisr & GISR_GRP2) { 881 if (gisr & GISR_GRP2) {
875 st = readl(&regs->gisr2); 882 st = readl(&regs->gisr2);
883 /*
884 * Write 1 and then 0 works for both W1C & RW.
885 *
886 * HW v1.11.0+: It's a W1C register (write 1 clear)
887 * HW v1.10.0-: It's a R/W register (write 0 clear)
888 */
889 writel(st, &regs->gisr2);
876 writel(0, &regs->gisr2); 890 writel(0, &regs->gisr2);
877 891
878 if (st & GISR2_RESET) 892 if (st & GISR2_RESET)
879 printf("fotg210: reset by host\n"); 893 printf("fotg210: reset by host\n");
880 else if (st & GISR2_SUSPEND) 894 else if (st & GISR2_SUSPEND)
881 printf("fotg210: suspend/removed\n"); 895 printf("fotg210: suspend/removed\n");
882 else if (st & GISR2_RESUME) 896 else if (st & GISR2_RESUME)
883 printf("fotg210: resume\n"); 897 printf("fotg210: resume\n");
884 898
885 /* Errors */ 899 /* Errors */
886 if (st & GISR2_ISOCERR) 900 if (st & GISR2_ISOCERR)
887 printf("fotg210: iso error\n"); 901 printf("fotg210: iso error\n");
888 if (st & GISR2_ISOCABT) 902 if (st & GISR2_ISOCABT)
889 printf("fotg210: iso abort\n"); 903 printf("fotg210: iso abort\n");
890 if (st & GISR2_DMAERR) 904 if (st & GISR2_DMAERR)
891 printf("fotg210: dma error\n"); 905 printf("fotg210: dma error\n");
892 } 906 }
893 907
894 return 0; 908 return 0;
895 } 909 }
896 910
897 int usb_gadget_register_driver(struct usb_gadget_driver *driver) 911 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
898 { 912 {
899 int i, ret = 0; 913 int i, ret = 0;
900 struct fotg210_chip *chip = &controller; 914 struct fotg210_chip *chip = &controller;
901 915
902 if (!driver || !driver->bind || !driver->setup) { 916 if (!driver || !driver->bind || !driver->setup) {
903 puts("fotg210: bad parameter.\n"); 917 puts("fotg210: bad parameter.\n");
904 return -EINVAL; 918 return -EINVAL;
905 } 919 }
906 920
907 INIT_LIST_HEAD(&chip->gadget.ep_list); 921 INIT_LIST_HEAD(&chip->gadget.ep_list);
908 for (i = 0; i < CFG_NUM_ENDPOINTS + 1; ++i) { 922 for (i = 0; i < CFG_NUM_ENDPOINTS + 1; ++i) {
909 struct fotg210_ep *ep = chip->ep + i; 923 struct fotg210_ep *ep = chip->ep + i;
910 924
911 ep->ep.maxpacket = ep->maxpacket; 925 ep->ep.maxpacket = ep->maxpacket;
912 INIT_LIST_HEAD(&ep->queue); 926 INIT_LIST_HEAD(&ep->queue);
913 927
914 if (ep->id == 0) { 928 if (ep->id == 0) {
915 ep->stopped = 0; 929 ep->stopped = 0;
916 } else { 930 } else {
917 ep->stopped = 1; 931 ep->stopped = 1;
918 list_add_tail(&ep->ep.ep_list, &chip->gadget.ep_list); 932 list_add_tail(&ep->ep.ep_list, &chip->gadget.ep_list);
919 } 933 }
920 } 934 }
921 935
922 if (fotg210_reset(chip)) { 936 if (fotg210_reset(chip)) {
923 puts("fotg210: reset failed.\n"); 937 puts("fotg210: reset failed.\n");
924 return -EINVAL; 938 return -EINVAL;
925 } 939 }
926 940
927 ret = driver->bind(&chip->gadget); 941 ret = driver->bind(&chip->gadget);
928 if (ret) { 942 if (ret) {
929 debug("fotg210: driver->bind() returned %d\n", ret); 943 debug("fotg210: driver->bind() returned %d\n", ret);
930 return ret; 944 return ret;
931 } 945 }
932 chip->driver = driver; 946 chip->driver = driver;
933 947
934 return ret; 948 return ret;
935 } 949 }
936 950
937 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) 951 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
938 { 952 {
939 struct fotg210_chip *chip = &controller; 953 struct fotg210_chip *chip = &controller;
940 954
941 driver->unbind(&chip->gadget); 955 driver->unbind(&chip->gadget);
942 chip->driver = NULL; 956 chip->driver = NULL;
943 957
944 pullup(chip, 0); 958 pullup(chip, 0);
945 959
946 return 0; 960 return 0;
947 } 961 }
948 962