Adding bootlimit/bootcount feature for MPC5XXX on TQM5200 Boards

Tested with TQM5200S on STK52XX.200 Board Signed-off-by: Axel Beierlein <belatronix@web.de>

Adding bootlimit/bootcount feature for MPC5XXX on TQM5200 Boards
Tested with TQM5200S on STK52XX.200 Board Signed-off-by: Axel Beierlein <belatronix@web.de>
Axel Beierlein · Wolfgang Denk
1 parent 0800707b6d
Showing 3 changed files with 22 additions and 0 deletions Side-by-side Diff
cpu/mpc5xxx/cpu.c
include/configs/TQM5200.h
include/mpc5xxx.h
@@ -135,4 +135,24 @@
 #endif
 }
 #endif
+
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+
+void bootcount_store (ulong a)
+{
+     volatile ulong *save_addr = (volatile ulong *)(MPC5XXX_CDM_BRDCRMB);
+
+     *save_addr = (BOOTCOUNT_MAGIC & 0xffff0000) | a;
+}
+
+ulong bootcount_load (void)
+{
+     volatile ulong *save_addr = (volatile ulong *)(MPC5XXX_CDM_BRDCRMB);
+
+     if ((*save_addr & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
+             return 0;
+     else
+             return (*save_addr & 0x0000ffff);
+}
+#endif /* CONFIG_BOOTCOUNT_LIMIT */
@@ -55,6 +55,7 @@
 #define CONFIG_PSC_CONSOLE	1	/* console is on PSC1			*/
 #define CONFIG_BAUDRATE		115200	/* ... at 115200 bps			*/
 #define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
+#define CONFIG_BOOTCOUNT_LIMIT	1
  
 #ifdef CONFIG_FO300
 #define CFG_DEVICE_NULLDEV		1	/* enable null device */
@@ -137,6 +137,7 @@
 /* Clock Distribution Module */
 #define MPC5XXX_CDM_JTAGID	(MPC5XXX_CDM + 0x0000)
 #define MPC5XXX_CDM_PORCFG	(MPC5XXX_CDM + 0x0004)
+#define MPC5XXX_CDM_BRDCRMB  	(MPC5XXX_CDM + 0x0008)
 #define MPC5XXX_CDM_CFG		(MPC5XXX_CDM + 0x000c)
 #define MPC5XXX_CDM_48_FDC	(MPC5XXX_CDM + 0x0010)
 #define MPC5XXX_CDM_SRESET	(MPC5XXX_CDM + 0x0020)
...	...	@@ -135,4 +135,24 @@
135	135	#endif
136	136	}
137	137	#endif
	138	+
	139	+#ifdef CONFIG_BOOTCOUNT_LIMIT
	140	+
	141	+void bootcount_store (ulong a)
	142	+{
	143	+ volatile ulong save_addr = (volatile ulong )(MPC5XXX_CDM_BRDCRMB);
	144	+
	145	+ *save_addr = (BOOTCOUNT_MAGIC & 0xffff0000) \| a;
	146	+}
	147	+
	148	+ulong bootcount_load (void)
	149	+{
	150	+ volatile ulong save_addr = (volatile ulong )(MPC5XXX_CDM_BRDCRMB);
	151	+
	152	+ if ((*save_addr & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
	153	+ return 0;
	154	+ else
	155	+ return (*save_addr & 0x0000ffff);
	156	+}
	157	+#endif /* CONFIG_BOOTCOUNT_LIMIT */
...	...	@@ -55,6 +55,7 @@
55	55	#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
56	56	#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
57	57	#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
	58	+#define CONFIG_BOOTCOUNT_LIMIT 1
58	59
59	60	#ifdef CONFIG_FO300
60	61	#define CFG_DEVICE_NULLDEV 1 /* enable null device */
...	...	@@ -137,6 +137,7 @@
137	137	/* Clock Distribution Module */
138	138	#define MPC5XXX_CDM_JTAGID (MPC5XXX_CDM + 0x0000)
139	139	#define MPC5XXX_CDM_PORCFG (MPC5XXX_CDM + 0x0004)
	140	+#define MPC5XXX_CDM_BRDCRMB (MPC5XXX_CDM + 0x0008)
140	141	#define MPC5XXX_CDM_CFG (MPC5XXX_CDM + 0x000c)
141	142	#define MPC5XXX_CDM_48_FDC (MPC5XXX_CDM + 0x0010)
142	143	#define MPC5XXX_CDM_SRESET (MPC5XXX_CDM + 0x0020)