Eric Lee / smarc-uboot | Embedian Git Server

Commit bf2150b9aea145a4b33abc4b5efc7ac515a04498

Authored by Stefan Roese 2016-10-25 16:10:32 +0800

Exists in v2017.01-smarct4x and in 25 other branches

arm64: mvebu: Add Armada-80x0 dts/dtsi files

Add the latest version of the DT files from the Linux kernel.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

Showing 4 changed files with 511 additions and 0 deletions Side-by-side Diff

arch/arm/dts/armada-8020.dtsi
arch/arm/dts/armada-8040-db.dts
arch/arm/dts/armada-8040.dtsi
arch/arm/dts/armada-cp110-slave.dtsi

arch/arm/dts/armada-8020.dtsi

Diff comments View file @ bf2150b

	1	+/*
	2	+ * Copyright (C) 2016 Marvell Technology Group Ltd.
	3	+ *
	4	+ * This file is dual-licensed: you can use it either under the terms
	5	+ * of the GPLv2 or the X11 license, at your option. Note that this dual
	6	+ * licensing only applies to this file, and not this project as a
	7	+ * whole.
	8	+ *
	9	+ * a) This library is free software; you can redistribute it and/or
	10	+ * modify it under the terms of the GNU General Public License as
	11	+ * published by the Free Software Foundation; either version 2 of the
	12	+ * License, or (at your option) any later version.
	13	+ *
	14	+ * This library is distributed in the hope that it will be useful,
	15	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	+ * GNU General Public License for more details.
	18	+ *
	19	+ * Or, alternatively,
	20	+ *
	21	+ * b) Permission is hereby granted, free of charge, to any person
	22	+ * obtaining a copy of this software and associated documentation
	23	+ * files (the "Software"), to deal in the Software without
	24	+ * restriction, including without limitation the rights to use,
	25	+ * copy, modify, merge, publish, distribute, sublicense, and/or
	26	+ * sell copies of the Software, and to permit persons to whom the
	27	+ * Software is furnished to do so, subject to the following
	28	+ * conditions:
	29	+ *
	30	+ * The above copyright notice and this permission notice shall be
	31	+ * included in all copies or substantial portions of the Software.
	32	+ *
	33	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	34	+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	35	+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	36	+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	37	+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	38	+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	39	+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	40	+ * OTHER DEALINGS IN THE SOFTWARE.
	41	+ */
	42	+
	43	+/*
	44	+ * Device Tree file for the Armada 8020 SoC, made of an AP806 Dual and
	45	+ * two CP110.
	46	+ */
	47	+
	48	+#include "armada-ap806-dual.dtsi"
	49	+#include "armada-cp110-master.dtsi"
	50	+#include "armada-cp110-slave.dtsi"
	51	+
	52	+/ {
	53	+ model = "Marvell Armada 8020";
	54	+ compatible = "marvell,armada8020", "marvell,armada-ap806-dual",
	55	+ "marvell,armada-ap806";
	56	+};

arch/arm/dts/armada-8040-db.dts

Diff comments View file @ bf2150b

	1	+/*
	2	+ * Copyright (C) 2016 Marvell Technology Group Ltd.
	3	+ *
	4	+ * This file is dual-licensed: you can use it either under the terms
	5	+ * of the GPLv2 or the X11 license, at your option. Note that this dual
	6	+ * licensing only applies to this file, and not this project as a
	7	+ * whole.
	8	+ *
	9	+ * a) This library is free software; you can redistribute it and/or
	10	+ * modify it under the terms of the GNU General Public License as
	11	+ * published by the Free Software Foundation; either version 2 of the
	12	+ * License, or (at your option) any later version.
	13	+ *
	14	+ * This library is distributed in the hope that it will be useful,
	15	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	+ * GNU General Public License for more details.
	18	+ *
	19	+ * Or, alternatively,
	20	+ *
	21	+ * b) Permission is hereby granted, free of charge, to any person
	22	+ * obtaining a copy of this software and associated documentation
	23	+ * files (the "Software"), to deal in the Software without
	24	+ * restriction, including without limitation the rights to use,
	25	+ * copy, modify, merge, publish, distribute, sublicense, and/or
	26	+ * sell copies of the Software, and to permit persons to whom the
	27	+ * Software is furnished to do so, subject to the following
	28	+ * conditions:
	29	+ *
	30	+ * The above copyright notice and this permission notice shall be
	31	+ * included in all copies or substantial portions of the Software.
	32	+ *
	33	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	34	+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	35	+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	36	+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	37	+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	38	+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	39	+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	40	+ * OTHER DEALINGS IN THE SOFTWARE.
	41	+ */
	42	+
	43	+/*
	44	+ * Device Tree file for Marvell Armada 8040 Development board platform
	45	+ */
	46	+
	47	+#include "armada-8040.dtsi"
	48	+
	49	+/ {
	50	+ model = "Marvell Armada 8040 DB board";
	51	+ compatible = "marvell,armada8040-db", "marvell,armada8040",
	52	+ "marvell,armada-ap806-quad", "marvell,armada-ap806";
	53	+
	54	+ chosen {
	55	+ stdout-path = "serial0:115200n8";
	56	+ };
	57	+
	58	+ memory@00000000 {
	59	+ device_type = "memory";
	60	+ reg = <0x0 0x0 0x0 0x80000000>;
	61	+ };
	62	+};
	63	+
	64	+&i2c0 {
	65	+ status = "okay";
	66	+ clock-frequency = <100000>;
	67	+};
	68	+
	69	+&spi0 {
	70	+ status = "okay";
	71	+
	72	+ spi-flash@0 {
	73	+ #address-cells = <1>;
	74	+ #size-cells = <1>;
	75	+ compatible = "jedec,spi-nor";
	76	+ reg = <0>;
	77	+ spi-max-frequency = <10000000>;
	78	+
	79	+ partitions {
	80	+ compatible = "fixed-partitions";
	81	+ #address-cells = <1>;
	82	+ #size-cells = <1>;
	83	+
	84	+ partition@0 {
	85	+ label = "U-Boot";
	86	+ reg = <0 0x200000>;
	87	+ };
	88	+ partition@400000 {
	89	+ label = "Filesystem";
	90	+ reg = <0x200000 0xce0000>;
	91	+ };
	92	+ };
	93	+ };
	94	+};
	95	+
	96	+/* Accessible over the mini-USB CON9 connector on the main board */
	97	+&uart0 {
	98	+ status = "okay";
	99	+};
	100	+
	101	+
	102	+/* CON5 on CP0 expansion */
	103	+&cpm_pcie2 {
	104	+ status = "okay";
	105	+};
	106	+
	107	+&cpm_i2c0 {
	108	+ status = "okay";
	109	+ clock-frequency = <100000>;
	110	+};
	111	+
	112	+/* CON4 on CP0 expansion */
	113	+&cpm_sata0 {
	114	+ status = "okay";
	115	+};
	116	+
	117	+/* CON9 on CP0 expansion */
	118	+&cpm_usb3_0 {
	119	+ status = "okay";
	120	+};
	121	+
	122	+/* CON10 on CP0 expansion */
	123	+&cpm_usb3_1 {
	124	+ status = "okay";
	125	+};
	126	+
	127	+/* CON5 on CP1 expansion */
	128	+&cps_pcie2 {
	129	+ status = "okay";
	130	+};
	131	+
	132	+&cps_i2c0 {
	133	+ status = "okay";
	134	+ clock-frequency = <100000>;
	135	+};
	136	+
	137	+/* CON4 on CP1 expansion */
	138	+&cps_sata0 {
	139	+ status = "okay";
	140	+};
	141	+
	142	+/* CON9 on CP1 expansion */
	143	+&cps_usb3_0 {
	144	+ status = "okay";
	145	+};
	146	+
	147	+/* CON10 on CP1 expansion */
	148	+&cps_usb3_1 {
	149	+ status = "okay";
	150	+};

arch/arm/dts/armada-8040.dtsi

Diff comments View file @ bf2150b

	1	+/*
	2	+ * Copyright (C) 2016 Marvell Technology Group Ltd.
	3	+ *
	4	+ * This file is dual-licensed: you can use it either under the terms
	5	+ * of the GPLv2 or the X11 license, at your option. Note that this dual
	6	+ * licensing only applies to this file, and not this project as a
	7	+ * whole.
	8	+ *
	9	+ * a) This library is free software; you can redistribute it and/or
	10	+ * modify it under the terms of the GNU General Public License as
	11	+ * published by the Free Software Foundation; either version 2 of the
	12	+ * License, or (at your option) any later version.
	13	+ *
	14	+ * This library is distributed in the hope that it will be useful,
	15	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	+ * GNU General Public License for more details.
	18	+ *
	19	+ * Or, alternatively,
	20	+ *
	21	+ * b) Permission is hereby granted, free of charge, to any person
	22	+ * obtaining a copy of this software and associated documentation
	23	+ * files (the "Software"), to deal in the Software without
	24	+ * restriction, including without limitation the rights to use,
	25	+ * copy, modify, merge, publish, distribute, sublicense, and/or
	26	+ * sell copies of the Software, and to permit persons to whom the
	27	+ * Software is furnished to do so, subject to the following
	28	+ * conditions:
	29	+ *
	30	+ * The above copyright notice and this permission notice shall be
	31	+ * included in all copies or substantial portions of the Software.
	32	+ *
	33	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	34	+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	35	+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	36	+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	37	+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	38	+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	39	+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	40	+ * OTHER DEALINGS IN THE SOFTWARE.
	41	+ */
	42	+
	43	+/*
	44	+ * Device Tree file for the Armada 8040 SoC, made of an AP806 Quad and
	45	+ * two CP110.
	46	+ */
	47	+
	48	+#include "armada-ap806-quad.dtsi"
	49	+#include "armada-cp110-master.dtsi"
	50	+#include "armada-cp110-slave.dtsi"
	51	+
	52	+/ {
	53	+ model = "Marvell Armada 8040";
	54	+ compatible = "marvell,armada8040", "marvell,armada-ap806-quad",
	55	+ "marvell,armada-ap806";
	56	+};

arch/arm/dts/armada-cp110-slave.dtsi

Diff comments View file @ bf2150b

	1	+/*
	2	+ * Copyright (C) 2016 Marvell Technology Group Ltd.
	3	+ *
	4	+ * This file is dual-licensed: you can use it either under the terms
	5	+ * of the GPLv2 or the X11 license, at your option. Note that this dual
	6	+ * licensing only applies to this file, and not this project as a
	7	+ * whole.
	8	+ *
	9	+ * a) This library is free software; you can redistribute it and/or
	10	+ * modify it under the terms of the GNU General Public License as
	11	+ * published by the Free Software Foundation; either version 2 of the
	12	+ * License, or (at your option) any later version.
	13	+ *
	14	+ * This library is distributed in the hope that it will be useful,
	15	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	+ * GNU General Public License for more details.
	18	+ *
	19	+ * Or, alternatively,
	20	+ *
	21	+ * b) Permission is hereby granted, free of charge, to any person
	22	+ * obtaining a copy of this software and associated documentation
	23	+ * files (the "Software"), to deal in the Software without
	24	+ * restriction, including without limitation the rights to use,
	25	+ * copy, modify, merge, publish, distribute, sublicense, and/or
	26	+ * sell copies of the Software, and to permit persons to whom the
	27	+ * Software is furnished to do so, subject to the following
	28	+ * conditions:
	29	+ *
	30	+ * The above copyright notice and this permission notice shall be
	31	+ * included in all copies or substantial portions of the Software.
	32	+ *
	33	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	34	+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	35	+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	36	+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	37	+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	38	+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	39	+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	40	+ * OTHER DEALINGS IN THE SOFTWARE.
	41	+ */
	42	+
	43	+/*
	44	+ * Device Tree file for Marvell Armada CP110 Slave.
	45	+ */
	46	+
	47	+/ {
	48	+ cp110-slave {
	49	+ #address-cells = <2>;
	50	+ #size-cells = <2>;
	51	+ compatible = "simple-bus";
	52	+ interrupt-parent = <&gic>;
	53	+ ranges;
	54	+
	55	+ config-space {
	56	+ #address-cells = <1>;
	57	+ #size-cells = <1>;
	58	+ compatible = "simple-bus";
	59	+ interrupt-parent = <&gic>;
	60	+ ranges = <0x0 0x0 0xf4000000 0x2000000>;
	61	+
	62	+ cps_syscon0: system-controller@440000 {
	63	+ compatible = "marvell,cp110-system-controller0",
	64	+ "syscon";
	65	+ reg = <0x440000 0x1000>;
	66	+ #clock-cells = <2>;
	67	+ core-clock-output-names =
	68	+ "cps-apll", "cps-ppv2-core", "cps-eip",
	69	+ "cps-core", "cps-nand-core";
	70	+ gate-clock-output-names =
	71	+ "cps-audio", "cps-communit", "cps-nand",
	72	+ "cps-ppv2", "cps-sdio", "cps-mg-domain",
	73	+ "cps-mg-core", "cps-xor1", "cps-xor0",
	74	+ "cps-gop-dp", "none", "cps-pcie_x10",
	75	+ "cps-pcie_x11", "cps-pcie_x4", "cps-pcie-xor",
	76	+ "cps-sata", "cps-sata-usb", "cps-main",
	77	+ "cps-sd-mmc", "none", "none",
	78	+ "cps-slow-io", "cps-usb3h0", "cps-usb3h1",
	79	+ "cps-usb3dev", "cps-eip150", "cps-eip197";
	80	+ };
	81	+
	82	+ cps_sata0: sata@540000 {
	83	+ compatible = "marvell,armada-8k-ahci";
	84	+ reg = <0x540000 0x30000>;
	85	+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
	86	+ clocks = <&cps_syscon0 1 15>;
	87	+ status = "disabled";
	88	+ };
	89	+
	90	+ cps_usb3_0: usb3@500000 {
	91	+ compatible = "marvell,armada-8k-xhci",
	92	+ "generic-xhci";
	93	+ reg = <0x500000 0x4000>;
	94	+ dma-coherent;
	95	+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
	96	+ clocks = <&cps_syscon0 1 22>;
	97	+ status = "disabled";
	98	+ };
	99	+
	100	+ cps_usb3_1: usb3@510000 {
	101	+ compatible = "marvell,armada-8k-xhci",
	102	+ "generic-xhci";
	103	+ reg = <0x510000 0x4000>;
	104	+ dma-coherent;
	105	+ interrupts = <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
	106	+ clocks = <&cps_syscon0 1 23>;
	107	+ status = "disabled";
	108	+ };
	109	+
	110	+ cps_xor0: xor@6a0000 {
	111	+ compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
	112	+ reg = <0x6a0000 0x1000>,
	113	+ <0x6b0000 0x1000>;
	114	+ dma-coherent;
	115	+ msi-parent = <&gic_v2m0>;
	116	+ clocks = <&cps_syscon0 1 8>;
	117	+ };
	118	+
	119	+ cps_xor1: xor@6c0000 {
	120	+ compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
	121	+ reg = <0x6c0000 0x1000>,
	122	+ <0x6d0000 0x1000>;
	123	+ dma-coherent;
	124	+ msi-parent = <&gic_v2m0>;
	125	+ clocks = <&cps_syscon0 1 7>;
	126	+ };
	127	+
	128	+ cps_spi0: spi@700600 {
	129	+ compatible = "marvell,armada-380-spi";
	130	+ reg = <0x700600 0x50>;
	131	+ #address-cells = <0x1>;
	132	+ #size-cells = <0x0>;
	133	+ cell-index = <1>;
	134	+ clocks = <&cps_syscon0 0 3>;
	135	+ status = "disabled";
	136	+ };
	137	+
	138	+ cps_spi1: spi@700680 {
	139	+ compatible = "marvell,armada-380-spi";
	140	+ reg = <0x700680 0x50>;
	141	+ #address-cells = <1>;
	142	+ #size-cells = <0>;
	143	+ cell-index = <2>;
	144	+ clocks = <&cps_syscon0 1 21>;
	145	+ status = "disabled";
	146	+ };
	147	+
	148	+ cps_i2c0: i2c@701000 {
	149	+ compatible = "marvell,mv78230-i2c";
	150	+ reg = <0x701000 0x20>;
	151	+ #address-cells = <1>;
	152	+ #size-cells = <0>;
	153	+ interrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>;
	154	+ clocks = <&cps_syscon0 1 21>;
	155	+ status = "disabled";
	156	+ };
	157	+
	158	+ cps_i2c1: i2c@701100 {
	159	+ compatible = "marvell,mv78230-i2c";
	160	+ reg = <0x701100 0x20>;
	161	+ #address-cells = <1>;
	162	+ #size-cells = <0>;
	163	+ interrupts = <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
	164	+ clocks = <&cps_syscon0 1 21>;
	165	+ status = "disabled";
	166	+ };
	167	+ };
	168	+
	169	+ cps_pcie0: pcie@f4600000 {
	170	+ compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
	171	+ reg = <0 0xf4600000 0 0x10000>,
	172	+ <0 0xfaf00000 0 0x80000>;
	173	+ reg-names = "ctrl", "config";
	174	+ #address-cells = <3>;
	175	+ #size-cells = <2>;
	176	+ #interrupt-cells = <1>;
	177	+ device_type = "pci";
	178	+ dma-coherent;
	179	+ msi-parent = <&gic_v2m0>;
	180	+
	181	+ bus-range = <0 0xff>;
	182	+ ranges =
	183	+ /* downstream I/O */
	184	+ <0x81000000 0 0xfd000000 0 0xfd000000 0 0x10000
	185	+ /* non-prefetchable memory */
	186	+ 0x82000000 0 0xfa000000 0 0xfa000000 0 0xf00000>;
	187	+ interrupt-map-mask = <0 0 0 0>;
	188	+ interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
	189	+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
	190	+ num-lanes = <1>;
	191	+ clocks = <&cps_syscon0 1 13>;
	192	+ status = "disabled";
	193	+ };
	194	+
	195	+ cps_pcie1: pcie@f4620000 {
	196	+ compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
	197	+ reg = <0 0xf4620000 0 0x10000>,
	198	+ <0 0xfbf00000 0 0x80000>;
	199	+ reg-names = "ctrl", "config";
	200	+ #address-cells = <3>;
	201	+ #size-cells = <2>;
	202	+ #interrupt-cells = <1>;
	203	+ device_type = "pci";
	204	+ dma-coherent;
	205	+ msi-parent = <&gic_v2m0>;
	206	+
	207	+ bus-range = <0 0xff>;
	208	+ ranges =
	209	+ /* downstream I/O */
	210	+ <0x81000000 0 0xfd010000 0 0xfd010000 0 0x10000
	211	+ /* non-prefetchable memory */
	212	+ 0x82000000 0 0xfb000000 0 0xfb000000 0 0xf00000>;
	213	+ interrupt-map-mask = <0 0 0 0>;
	214	+ interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
	215	+ interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
	216	+
	217	+ num-lanes = <1>;
	218	+ clocks = <&cps_syscon0 1 11>;
	219	+ status = "disabled";
	220	+ };
	221	+
	222	+ cps_pcie2: pcie@f4640000 {
	223	+ compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
	224	+ reg = <0 0xf4640000 0 0x10000>,
	225	+ <0 0xfcf00000 0 0x80000>;
	226	+ reg-names = "ctrl", "config";
	227	+ #address-cells = <3>;
	228	+ #size-cells = <2>;
	229	+ #interrupt-cells = <1>;
	230	+ device_type = "pci";
	231	+ dma-coherent;
	232	+ msi-parent = <&gic_v2m0>;
	233	+
	234	+ bus-range = <0 0xff>;
	235	+ ranges =
	236	+ /* downstream I/O */
	237	+ <0x81000000 0 0xfd020000 0 0xfd020000 0 0x10000
	238	+ /* non-prefetchable memory */
	239	+ 0x82000000 0 0xfc000000 0 0xfc000000 0 0xf00000>;
	240	+ interrupt-map-mask = <0 0 0 0>;
	241	+ interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
	242	+ interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
	243	+
	244	+ num-lanes = <1>;
	245	+ clocks = <&cps_syscon0 1 12>;
	246	+ status = "disabled";
	247	+ };
	248	+ };
	249	+};