Commit c08cfc2d2cf43c443f74549aefd7a7f2ffc3d7de
1 parent
92fa7f53f1
Exists in
v2017.01-smarct4x
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ARM: zynq: Enable the Neon instructions
Added the lowlevel_init to enable the Neon instructions. Initially the u-boot was causing undefined instruction exception if loaded through tcl, and working fine if loaded through FSBL. The exception was causing in convertion formula of given time to ticks. It was because, the Neon instructions were disabled and hence causing the undefined exception. In FSBL case, the FSBL was enabling the Neon instructions. Hence, added the lowlevel_init to enable the Neon instructions. Also enable neon instructions for non-xilinx toolchain. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Acked-by: Radhey Shyam Pandey <radheys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Showing 4 changed files with 34 additions and 3 deletions Side-by-side Diff
arch/arm/cpu/armv7/zynq/Makefile
arch/arm/cpu/armv7/zynq/config.mk
arch/arm/cpu/armv7/zynq/cpu.c
arch/arm/cpu/armv7/zynq/lowlevel_init.S
1 | +/* | |
2 | + * Copyright (C) 2013 Xilinx, Inc. All rights reserved. | |
3 | + * | |
4 | + * SPDX-License-Identifier: GPL-2.0+ | |
5 | + */ | |
6 | + | |
7 | +#include <asm-offsets.h> | |
8 | +#include <config.h> | |
9 | +#include <linux/linkage.h> | |
10 | + | |
11 | +ENTRY(lowlevel_init) | |
12 | + | |
13 | + /* Enable the the VFP */ | |
14 | + mrc p15, 0, r1, c1, c0, 2 | |
15 | + orr r1, r1, #(0x3 << 20) | |
16 | + orr r1, r1, #(0x3 << 20) | |
17 | + mcr p15, 0, r1, c1, c0, 2 | |
18 | + isb | |
19 | + fmrx r1, FPEXC | |
20 | + orr r1,r1, #(1<<30) | |
21 | + fmxr FPEXC, r1 | |
22 | + | |
23 | + /* Move back to caller */ | |
24 | + mov pc, lr | |
25 | + | |
26 | +ENDPROC(lowlevel_init) |