misc: Add gdsys_soc driver

This patch adds a driver for the bus associated with a IHS FPGA. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>

misc: Add gdsys_soc driver
This patch adds a driver for the bus associated with a IHS FPGA. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six · Simon Glass
1 parent 313d4cc3e9
Showing 5 changed files with 122 additions and 0 deletions Side-by-side Diff
Documentation/devicetree/bindings/misc/gdsys,soc.txt
drivers/misc/Kconfig
drivers/misc/Makefile
drivers/misc/gdsys_soc.c
drivers/misc/gdsys_soc.h
+gdsys soc bus driver
+
+This driver provides a simple interface for the busses associated with gdsys
+IHS FPGAs. The bus itself contains devices whose register maps are contained
+within the FPGA's register space.
+
+Required properties:
+- fpga: A phandle to the controlling IHS FPGA
+
+Example:
+
+FPGA0BUS: fpga0bus {
+	compatible = "gdsys,soc";
+	ranges = <0x0 0xe0600000 0x00004000>;
+	fpga = <&FPGA0>;
+};
@@ -312,5 +312,13 @@
 	  The consumer driver would then use this loader to program whatever,
 	  ie. the FPGA device.
  
+config GDSYS_SOC
+	bool "Enable gdsys SOC driver"
+	depends on MISC
+	help
+	  Support for gdsys IHS SOC, a simple bus associated with each gdsys
+	  IHS (Integrated Hardware Systems) FPGA, which holds all devices whose
+	  register maps are contained within the FPGA's register map.
+
 endmenu
@@ -35,6 +35,7 @@
 obj-$(CONFIG_FS_LOADER) += fs_loader.o
 obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
 obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
+obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o
 obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
 obj-$(CONFIG_IMX8) += imx8/
 obj-$(CONFIG_LED_STATUS) += status_led.o
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2017
+ * Mario Six,  Guntermann & Drunck GmbH, mario.six@gdsys.cc
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/lists.h>
+
+#include "gdsys_soc.h"
+
+/**
+ * struct gdsys_soc_priv - Private data for gdsys soc bus
+ * @fpga: The gdsys IHS FPGA this bus is associated with
+ */
+struct gdsys_soc_priv {
+	struct udevice *fpga;
+};
+
+static const struct udevice_id gdsys_soc_ids[] = {
+	{ .compatible = "gdsys,soc" },
+	{ /* sentinel */ }
+};
+
+int gdsys_soc_get_fpga(struct udevice *child, struct udevice **fpga)
+{
+	struct gdsys_soc_priv *bus_priv;
+
+	if (!child->parent) {
+		debug("%s: Invalid parent\n", child->name);
+		return -EINVAL;
+	}
+
+	if (!device_is_compatible(child->parent, "gdsys,soc")) {
+		debug("%s: Not child of a gdsys soc\n", child->name);
+		return -EINVAL;
+	}
+
+	bus_priv = dev_get_priv(child->parent);
+
+	*fpga = bus_priv->fpga;
+
+	return 0;
+}
+
+static int gdsys_soc_probe(struct udevice *dev)
+{
+	struct gdsys_soc_priv *priv = dev_get_priv(dev);
+	struct udevice *fpga;
+	int res = uclass_get_device_by_phandle(UCLASS_MISC, dev, "fpga",
+					       &fpga);
+	if (res == -ENOENT) {
+		debug("%s: Could not find 'fpga' phandle\n", dev->name);
+		return -EINVAL;
+	}
+
+	if (res == -ENODEV) {
+		debug("%s: Could not get FPGA device\n", dev->name);
+		return -EINVAL;
+	}
+
+	priv->fpga = fpga;
+
+	return 0;
+}
+
+U_BOOT_DRIVER(gdsys_soc_bus) = {
+	.name           = "gdsys_soc_bus",
+	.id             = UCLASS_SIMPLE_BUS,
+	.of_match       = gdsys_soc_ids,
+	.probe          = gdsys_soc_probe,
+	.priv_auto_alloc_size = sizeof(struct gdsys_soc_priv),
+};
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2017
+ * Mario Six,  Guntermann & Drunck GmbH, mario.six@gdsys.cc
+ */
+
+#ifndef _GDSYS_SOC_H_
+#define _GDSYS_SOC_H_
+
+/**
+ * gdsys_soc_get_fpga() - Retrieve pointer to parent bus' FPGA device
+ * @child:	The child device on the FPGA bus needing access to the FPGA.
+ * @fpga:	Pointer to the retrieved FPGA device.
+ *
+ * To access their register maps, devices on gdsys soc buses usually have
+ * facilitate the accessor function of the IHS FPGA their parent bus is
+ * attached to. To access the FPGA device from within the bus' children, this
+ * function returns a pointer to it.
+ *
+ * Return: 0 on success, -ve on failure
+ */
+int gdsys_soc_get_fpga(struct udevice *child, struct udevice **fpga);
+#endif /* _GDSYS_SOC_H_ */
	1	+gdsys soc bus driver
	2	+
	3	+This driver provides a simple interface for the busses associated with gdsys
	4	+IHS FPGAs. The bus itself contains devices whose register maps are contained
	5	+within the FPGA's register space.
	6	+
	7	+Required properties:
	8	+- fpga: A phandle to the controlling IHS FPGA
	9	+
	10	+Example:
	11	+
	12	+FPGA0BUS: fpga0bus {
	13	+ compatible = "gdsys,soc";
	14	+ ranges = <0x0 0xe0600000 0x00004000>;
	15	+ fpga = <&FPGA0>;
	16	+};
...	...	@@ -312,5 +312,13 @@
312	312	The consumer driver would then use this loader to program whatever,
313	313	ie. the FPGA device.
314	314
	315	+config GDSYS_SOC
	316	+ bool "Enable gdsys SOC driver"
	317	+ depends on MISC
	318	+ help
	319	+ Support for gdsys IHS SOC, a simple bus associated with each gdsys
	320	+ IHS (Integrated Hardware Systems) FPGA, which holds all devices whose
	321	+ register maps are contained within the FPGA's register map.
	322	+
315	323	endmenu
...	...	@@ -35,6 +35,7 @@
35	35	obj-$(CONFIG_FS_LOADER) += fs_loader.o
36	36	obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
37	37	obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
	38	+obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o
38	39	obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
39	40	obj-$(CONFIG_IMX8) += imx8/
40	41	obj-$(CONFIG_LED_STATUS) += status_led.o
	1	+// SPDX-License-Identifier: GPL-2.0+
	2	+/*
	3	+ * (C) Copyright 2017
	4	+ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
	5	+ */
	6	+
	7	+#include <common.h>
	8	+#include <dm.h>
	9	+#include <dm/lists.h>
	10	+
	11	+#include "gdsys_soc.h"
	12	+
	13	+/**
	14	+ * struct gdsys_soc_priv - Private data for gdsys soc bus
	15	+ * @fpga: The gdsys IHS FPGA this bus is associated with
	16	+ */
	17	+struct gdsys_soc_priv {
	18	+ struct udevice *fpga;
	19	+};
	20	+
	21	+static const struct udevice_id gdsys_soc_ids[] = {
	22	+ { .compatible = "gdsys,soc" },
	23	+ { /* sentinel */ }
	24	+};
	25	+
	26	+int gdsys_soc_get_fpga(struct udevice child, struct udevice *fpga)
	27	+{
	28	+ struct gdsys_soc_priv *bus_priv;
	29	+
	30	+ if (!child->parent) {
	31	+ debug("%s: Invalid parent\n", child->name);
	32	+ return -EINVAL;
	33	+ }
	34	+
	35	+ if (!device_is_compatible(child->parent, "gdsys,soc")) {
	36	+ debug("%s: Not child of a gdsys soc\n", child->name);
	37	+ return -EINVAL;
	38	+ }
	39	+
	40	+ bus_priv = dev_get_priv(child->parent);
	41	+
	42	+ *fpga = bus_priv->fpga;
	43	+
	44	+ return 0;
	45	+}
	46	+
	47	+static int gdsys_soc_probe(struct udevice *dev)
	48	+{
	49	+ struct gdsys_soc_priv *priv = dev_get_priv(dev);
	50	+ struct udevice *fpga;
	51	+ int res = uclass_get_device_by_phandle(UCLASS_MISC, dev, "fpga",
	52	+ &fpga);
	53	+ if (res == -ENOENT) {
	54	+ debug("%s: Could not find 'fpga' phandle\n", dev->name);
	55	+ return -EINVAL;
	56	+ }
	57	+
	58	+ if (res == -ENODEV) {
	59	+ debug("%s: Could not get FPGA device\n", dev->name);
	60	+ return -EINVAL;
	61	+ }
	62	+
	63	+ priv->fpga = fpga;
	64	+
	65	+ return 0;
	66	+}
	67	+
	68	+U_BOOT_DRIVER(gdsys_soc_bus) = {
	69	+ .name = "gdsys_soc_bus",
	70	+ .id = UCLASS_SIMPLE_BUS,
	71	+ .of_match = gdsys_soc_ids,
	72	+ .probe = gdsys_soc_probe,
	73	+ .priv_auto_alloc_size = sizeof(struct gdsys_soc_priv),
	74	+};
	1	+/* SPDX-License-Identifier: GPL-2.0+ */
	2	+/*
	3	+ * (C) Copyright 2017
	4	+ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
	5	+ */
	6	+
	7	+#ifndef _GDSYS_SOC_H_
	8	+#define _GDSYS_SOC_H_
	9	+
	10	+/**
	11	+ * gdsys_soc_get_fpga() - Retrieve pointer to parent bus' FPGA device
	12	+ * @child: The child device on the FPGA bus needing access to the FPGA.
	13	+ * @fpga: Pointer to the retrieved FPGA device.
	14	+ *
	15	+ * To access their register maps, devices on gdsys soc buses usually have
	16	+ * facilitate the accessor function of the IHS FPGA their parent bus is
	17	+ * attached to. To access the FPGA device from within the bus' children, this
	18	+ * function returns a pointer to it.
	19	+ *
	20	+ * Return: 0 on success, -ve on failure
	21	+ */
	22	+int gdsys_soc_get_fpga(struct udevice child, struct udevice *fpga);
	23	+#endif /* _GDSYS_SOC_H_ */