board: stm32: add stm32f469-discovery board support

This board offers : _ STM32F469NIH6 microcontroller featuring 2 Mbytes of Flash memory and 324 Kbytes of RAM in BGA216 package _ On-board ST-LINK/V2-1 SWD debugger, supporting USB reenumeration capability: _ Mbed-enabled (mbed.org) _ USB functions: USB virtual COM port, mass storage, debug port _ 4 inches 800x480 pixel TFT color LCD with MIPI DSI interface and capacitive touch screen _ SAI Audio DAC, with a stereo headphone output jack _ 3 MEMS microphones _ MicroSD card connector _ I2C extension connector _ 4Mx32bit SDRAM _ 128-Mbit Quad-SPI NOR Flash _ Reset and wake-up buttons _ 4 color user LEDs _ USB OTG FS with Micro-AB connector _ Three power supply options: _ Expansion connectors and Arduino™ UNO V3 connectors Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

board: stm32: add stm32f469-discovery board support
This board offers : _ STM32F469NIH6 microcontroller featuring 2 Mbytes of Flash memory and 324 Kbytes of RAM in BGA216 package _ On-board ST-LINK/V2-1 SWD debugger, supporting USB reenumeration capability: _ Mbed-enabled (mbed.org) _ USB functions: USB virtual COM port, mass storage, debug port _ 4 inches 800x480 pixel TFT color LCD with MIPI DSI interface and capacitive touch screen _ SAI Audio DAC, with a stereo headphone output jack _ 3 MEMS microphones _ MicroSD card connector _ I2C extension connector _ 4Mx32bit SDRAM _ 128-Mbit Quad-SPI NOR Flash _ Reset and wake-up buttons _ 4 color user LEDs _ USB OTG FS with Micro-AB connector _ Three power supply options: _ Expansion connectors and Arduino™ UNO V3 connectors Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard · Tom Rini
1 parent d95faab201
Showing 7 changed files with 221 additions and 0 deletions Side-by-side Diff
arch/arm/mach-stm32/stm32f4/Kconfig
board/st/stm32f469-discovery/Kconfig
board/st/stm32f469-discovery/MAINTAINERS
board/st/stm32f469-discovery/Makefile
board/st/stm32f469-discovery/stm32f469-discovery.c
configs/stm32f469-discovery_defconfig
include/configs/stm32f469-discovery.h
@@ -3,7 +3,11 @@
 config TARGET_STM32F429_DISCOVERY
 	bool "STM32F429 Discovery board"
  
+config TARGET_STM32F469_DISCOVERY
+	bool "STM32F469 Discovery board"
+
 source "board/st/stm32f429-discovery/Kconfig"
+source "board/st/stm32f469-discovery/Kconfig"
  
 endif
+if TARGET_STM32F469_DISCOVERY
+
+config SYS_BOARD
+	string
+	default "stm32f469-discovery"
+
+config SYS_VENDOR
+	string
+	default "st"
+
+config SYS_SOC
+	string
+	default "stm32f4"
+
+config SYS_CONFIG_NAME
+	string
+	default "stm32f469-discovery"
+
+endif
+STM32F469-DISCOVERY BOARD
+M:	Patrice Chotard <patrice.chotard@st.com>
+S:	Maintained
+F:	board/st/stm32f469-discovery/
+F:	include/configs/stm32f469-discovery.h
+F:	configs/stm32f469-discovery_defconfig
+#
+# Copyright (C) STMicroelectronics SA 2017
+# Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= stm32f469-discovery.o
+/*
+ * Copyright (C) STMicroelectronics SA 2017
+ * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+
+#include <asm/io.h>
+#include <asm/arch/stm32.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	int rv;
+	struct udevice *dev;
+
+	rv = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (rv) {
+		debug("DRAM init failed: %d\n", rv);
+		return rv;
+	}
+
+	if (fdtdec_setup_memory_size() != 0)
+		rv = -EINVAL;
+
+	return rv;
+}
+
+int dram_init_banksize(void)
+{
+	fdtdec_setup_memory_banksize();
+
+	return 0;
+}
+
+u32 get_board_rev(void)
+{
+	return 0;
+}
+
+int board_early_init_f(void)
+{
+	return 0;
+}
+
+int board_init(void)
+{
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+	return 0;
+}
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+	char serialno[25];
+	u32 u_id_low, u_id_mid, u_id_high;
+
+	if (!env_get("serial#")) {
+		u_id_low  = readl(&STM32_U_ID->u_id_low);
+		u_id_mid  = readl(&STM32_U_ID->u_id_mid);
+		u_id_high = readl(&STM32_U_ID->u_id_high);
+		sprintf(serialno, "%08x%08x%08x",
+			u_id_high, u_id_mid, u_id_low);
+		env_set("serial#", serialno);
+	}
+
+	return 0;
+}
+#endif
+CONFIG_ARM=y
+CONFIG_STM32=y
+CONFIG_SYS_MALLOC_F_LEN=0xF00
+CONFIG_STM32F4=y
+CONFIG_TARGET_STM32F469_DISCOVERY=y
+CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco"
+CONFIG_BOOTDELAY=3
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="U-Boot > "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_GPT=y
+# CONFIG_RANDOM_UUID is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+# CONFIG_DOS_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
+# CONFIG_BLK is not set
+CONFIG_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_MISC=y
+CONFIG_STM32_RCC=y
+CONFIG_DM_MMC=y
+CONFIG_ARM_PL180_MMCI=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_STM32=y
+CONFIG_RAM=y
+CONFIG_STM32_SDRAM=y
+CONFIG_DM_RESET=y
+CONFIG_STM32_RESET=y
+CONFIG_STM32X7_SERIAL=y
+/*
+ * Copyright (C) STMicroelectronics SA 2017
+ * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_STM32F4DISCOVERY
+
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_SYS_FLASH_BASE		0x08000000
+
+#define CONFIG_SYS_INIT_SP_ADDR		0x10010000
+#define CONFIG_SYS_TEXT_BASE		0x08000000
+
+#define CONFIG_SYS_ICACHE_OFF
+#define CONFIG_SYS_DCACHE_OFF
+
+/*
+ * Configuration of the external SDRAM memory
+ */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_RAM_FREQ_DIV		2
+#define CONFIG_SYS_RAM_BASE		0x00000000
+#define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_RAM_BASE
+#define CONFIG_SYS_LOAD_ADDR		0x00400000
+#define CONFIG_LOADADDR			0x00400000
+
+#define CONFIG_SYS_MAX_FLASH_SECT	12
+#define CONFIG_SYS_MAX_FLASH_BANKS	2
+
+#define CONFIG_ENV_OFFSET		(256 << 10)
+#define CONFIG_ENV_SECT_SIZE		(128 << 10)
+#define CONFIG_ENV_SIZE			(8 << 10)
+
+#define CONFIG_STM32_FLASH
+
+#define CONFIG_STM32_HSE_HZ		8000000
+#define CONFIG_SYS_CLK_FREQ		180000000 /* 180 MHz */
+#define CONFIG_SYS_HZ_CLOCK		1000000	/* Timer is clocked at 1MHz */
+
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
+
+#define CONFIG_SYS_CBSIZE		1024
+
+#define CONFIG_SYS_MALLOC_LEN		(1 * 1024 * 1024)
+
+#define CONFIG_BOOTCOMMAND						\
+	"run boot_sd"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"boot_sd=mmc dev 0;fatload mmc 0 0x00700000 stm32f469-disco.dtb; fatload mmc 0 0x00008000 zImage; icache off; bootz 0x00008000 - 0x00700000"
+
+/*
+ * Command line configuration.
+ */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+
+#endif /* __CONFIG_H */
...	...	@@ -3,7 +3,11 @@
3	3	config TARGET_STM32F429_DISCOVERY
4	4	bool "STM32F429 Discovery board"
5	5
	6	+config TARGET_STM32F469_DISCOVERY
	7	+ bool "STM32F469 Discovery board"
	8	+
6	9	source "board/st/stm32f429-discovery/Kconfig"
	10	+source "board/st/stm32f469-discovery/Kconfig"
7	11
8	12	endif
	1	+if TARGET_STM32F469_DISCOVERY
	2	+
	3	+config SYS_BOARD
	4	+ string
	5	+ default "stm32f469-discovery"
	6	+
	7	+config SYS_VENDOR
	8	+ string
	9	+ default "st"
	10	+
	11	+config SYS_SOC
	12	+ string
	13	+ default "stm32f4"
	14	+
	15	+config SYS_CONFIG_NAME
	16	+ string
	17	+ default "stm32f469-discovery"
	18	+
	19	+endif
	1	+STM32F469-DISCOVERY BOARD
	2	+M: Patrice Chotard <patrice.chotard@st.com>
	3	+S: Maintained
	4	+F: board/st/stm32f469-discovery/
	5	+F: include/configs/stm32f469-discovery.h
	6	+F: configs/stm32f469-discovery_defconfig
	1	+#
	2	+# Copyright (C) STMicroelectronics SA 2017
	3	+# Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
	4	+#
	5	+# SPDX-License-Identifier: GPL-2.0+
	6	+#
	7	+
	8	+obj-y := stm32f469-discovery.o
	1	+/*
	2	+ * Copyright (C) STMicroelectronics SA 2017
	3	+ * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
	4	+ *
	5	+ * SPDX-License-Identifier: GPL-2.0+
	6	+ */
	7	+
	8	+#include <common.h>
	9	+#include <dm.h>
	10	+
	11	+#include <asm/io.h>
	12	+#include <asm/arch/stm32.h>
	13	+
	14	+DECLARE_GLOBAL_DATA_PTR;
	15	+
	16	+int dram_init(void)
	17	+{
	18	+ int rv;
	19	+ struct udevice *dev;
	20	+
	21	+ rv = uclass_get_device(UCLASS_RAM, 0, &dev);
	22	+ if (rv) {
	23	+ debug("DRAM init failed: %d\n", rv);
	24	+ return rv;
	25	+ }
	26	+
	27	+ if (fdtdec_setup_memory_size() != 0)
	28	+ rv = -EINVAL;
	29	+
	30	+ return rv;
	31	+}
	32	+
	33	+int dram_init_banksize(void)
	34	+{
	35	+ fdtdec_setup_memory_banksize();
	36	+
	37	+ return 0;
	38	+}
	39	+
	40	+u32 get_board_rev(void)
	41	+{
	42	+ return 0;
	43	+}
	44	+
	45	+int board_early_init_f(void)
	46	+{
	47	+ return 0;
	48	+}
	49	+
	50	+int board_init(void)
	51	+{
	52	+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
	53	+
	54	+ return 0;
	55	+}
	56	+
	57	+#ifdef CONFIG_MISC_INIT_R
	58	+int misc_init_r(void)
	59	+{
	60	+ char serialno[25];
	61	+ u32 u_id_low, u_id_mid, u_id_high;
	62	+
	63	+ if (!env_get("serial#")) {
	64	+ u_id_low = readl(&STM32_U_ID->u_id_low);
	65	+ u_id_mid = readl(&STM32_U_ID->u_id_mid);
	66	+ u_id_high = readl(&STM32_U_ID->u_id_high);
	67	+ sprintf(serialno, "%08x%08x%08x",
	68	+ u_id_high, u_id_mid, u_id_low);
	69	+ env_set("serial#", serialno);
	70	+ }
	71	+
	72	+ return 0;
	73	+}
	74	+#endif
	1	+CONFIG_ARM=y
	2	+CONFIG_STM32=y
	3	+CONFIG_SYS_MALLOC_F_LEN=0xF00
	4	+CONFIG_STM32F4=y
	5	+CONFIG_TARGET_STM32F469_DISCOVERY=y
	6	+CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco"
	7	+CONFIG_BOOTDELAY=3
	8	+# CONFIG_DISPLAY_CPUINFO is not set
	9	+CONFIG_BOARD_EARLY_INIT_F=y
	10	+CONFIG_HUSH_PARSER=y
	11	+CONFIG_SYS_PROMPT="U-Boot > "
	12	+CONFIG_CMD_BOOTZ=y
	13	+# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
	14	+CONFIG_CMD_IMLS=y
	15	+CONFIG_CMD_GPT=y
	16	+# CONFIG_RANDOM_UUID is not set
	17	+CONFIG_CMD_MMC=y
	18	+# CONFIG_CMD_SETEXPR is not set
	19	+CONFIG_CMD_CACHE=y
	20	+CONFIG_CMD_TIMER=y
	21	+CONFIG_CMD_EXT2=y
	22	+CONFIG_CMD_EXT4=y
	23	+CONFIG_CMD_FAT=y
	24	+CONFIG_CMD_FS_GENERIC=y
	25	+# CONFIG_DOS_PARTITION is not set
	26	+CONFIG_OF_CONTROL=y
	27	+CONFIG_OF_EMBED=y
	28	+# CONFIG_BLK is not set
	29	+CONFIG_CLK=y
	30	+CONFIG_DM_GPIO=y
	31	+CONFIG_MISC=y
	32	+CONFIG_STM32_RCC=y
	33	+CONFIG_DM_MMC=y
	34	+CONFIG_ARM_PL180_MMCI=y
	35	+CONFIG_MTD_NOR_FLASH=y
	36	+CONFIG_PINCTRL=y
	37	+CONFIG_PINCTRL_STM32=y
	38	+CONFIG_RAM=y
	39	+CONFIG_STM32_SDRAM=y
	40	+CONFIG_DM_RESET=y
	41	+CONFIG_STM32_RESET=y
	42	+CONFIG_STM32X7_SERIAL=y