Commit c26e454dfc6650428854fa2db3b1ed7f19e0ba0e
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Patches by Pantelis Antoniou, 16 Apr 2004:
- add support for a new version of an Intracom board and fix various other things on others. - add verify support to the crc32 command (define CONFIG_CRC32_VERIFY to enable it) - fix FEC driver for MPC8xx systems: 1. fix compilation problems for boards that use dynamic allocation of DPRAM 2. shut down FEC after network transfers - HUSH parser fixes: 1. A new test command was added. This is a simplified version of the one in the bourne shell. 2. A new exit command was added which terminates the current executing script. 3. Fixed handing of $? (exit code of last executed command)
Showing 13 changed files with 706 additions and 86 deletions Side-by-side Diff
CHANGELOG
... | ... | @@ -2,6 +2,22 @@ |
2 | 2 | Changes for U-Boot 1.1.1: |
3 | 3 | ====================================================================== |
4 | 4 | |
5 | +* Patches by Pantelis Antoniou, 16 Apr 2004: | |
6 | + - add support for a new version of an Intracom board and fix | |
7 | + various other things on others. | |
8 | + - add verify support to the crc32 command (define | |
9 | + CONFIG_CRC32_VERIFY to enable it) | |
10 | + - fix FEC driver for MPC8xx systems: | |
11 | + 1. fix compilation problems for boards that use dynamic | |
12 | + allocation of DPRAM | |
13 | + 2. shut down FEC after network transfers | |
14 | + - HUSH parser fixes: | |
15 | + 1. A new test command was added. This is a simplified version of | |
16 | + the one in the bourne shell. | |
17 | + 2. A new exit command was added which terminates the current | |
18 | + executing script. | |
19 | + 3. Fixed handing of $? (exit code of last executed command) | |
20 | + | |
5 | 21 | * Patch by George G. Davis, 02 Apr 2004: |
6 | 22 | add support for Intel Assabet board |
7 | 23 |
Makefile
... | ... | @@ -401,8 +401,18 @@ |
401 | 401 | } |
402 | 402 | @./mkconfig -a $(call xtract_NETVIA,$@) ppc mpc8xx netvia |
403 | 403 | |
404 | +xtract_NETPHONE = $(subst _V2,,$(subst _config,,$1)) | |
405 | + | |
406 | +NETPHONE_V2_config \ | |
404 | 407 | NETPHONE_config: unconfig |
405 | - @./mkconfig $(@:_config=) ppc mpc8xx netphone | |
408 | + @ >include/config.h | |
409 | + @[ -z "$(findstring NETPHONE_config,$@)" ] || \ | |
410 | + { echo "#define CONFIG_NETPHONE_VERSION 1" >>include/config.h ; \ | |
411 | + } | |
412 | + @[ -z "$(findstring NETPHONE_V2_config,$@)" ] || \ | |
413 | + { echo "#define CONFIG_NETPHONE_VERSION 2" >>include/config.h ; \ | |
414 | + } | |
415 | + @./mkconfig -a $(call xtract_NETPHONE,$@) ppc mpc8xx netphone | |
406 | 416 | |
407 | 417 | xtract_NETTA = $(subst _ISDN,,$(subst _config,,$1)) |
408 | 418 |
README
... | ... | @@ -1943,6 +1943,28 @@ |
1943 | 1943 | CFG_POCMR2_MASK_ATTRIB: (MPC826x only) |
1944 | 1944 | Overrides the default PCI memory map in cpu/mpc8260/pci.c if set. |
1945 | 1945 | |
1946 | +- CONFIG_ETHER_ON_FEC[12] | |
1947 | + Define to enable FEC[12] on a 8xx series processor. | |
1948 | + | |
1949 | +- CONFIG_FEC[12]_PHY | |
1950 | + Define to the hardcoded PHY address which corresponds | |
1951 | + to the given FEC. | |
1952 | + | |
1953 | + i.e. | |
1954 | + #define CONFIG_FEC1_PHY 4 | |
1955 | + means that the PHY with address 4 is connected to FEC1 | |
1956 | + | |
1957 | + When set to -1, means to probe for first available. | |
1958 | + | |
1959 | +- CONFIG_FEC[12]_PHY_NORXERR | |
1960 | + The PHY does not have a RXERR line (RMII only). | |
1961 | + (so program the FEC to ignore it). | |
1962 | + | |
1963 | +- CONFIG_RMII | |
1964 | + Enable RMII mode for all FECs. | |
1965 | + Note that this is a global option, we can't | |
1966 | + have one FEC in standard MII mode and another in RMII mode. | |
1967 | + | |
1946 | 1968 | Building the Software: |
1947 | 1969 | ====================== |
1948 | 1970 |
board/netphone/flash.c
... | ... | @@ -41,6 +41,9 @@ |
41 | 41 | volatile immap_t *immap = (immap_t *) CFG_IMMR; |
42 | 42 | volatile memctl8xx_t *memctl = &immap->im_memctl; |
43 | 43 | unsigned long size; |
44 | +#if CONFIG_NETPHONE_VERSION == 2 | |
45 | + unsigned long size1; | |
46 | +#endif | |
44 | 47 | int i; |
45 | 48 | |
46 | 49 | /* Init: no FLASHes known */ |
... | ... | @@ -81,6 +84,25 @@ |
81 | 84 | #endif |
82 | 85 | |
83 | 86 | flash_info[0].size = size; |
87 | + | |
88 | +#if CONFIG_NETPHONE_VERSION == 2 | |
89 | + size1 = flash_get_size((vu_long *) FLASH_BASE4_PRELIM, &flash_info[1]); | |
90 | + | |
91 | + if (flash_info[1].flash_id == FLASH_UNKNOWN && size1 > 0) { | |
92 | + printf("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n", size1, size1 << 20); | |
93 | + } | |
94 | + | |
95 | + /* Remap FLASH according to real size */ | |
96 | + memctl->memc_or4 = CFG_OR_TIMING_FLASH | (-size1 & 0xFFFF8000); | |
97 | + memctl->memc_br4 = (CFG_FLASH_BASE4 & BR_BA_MSK) | (memctl->memc_br4 & ~(BR_BA_MSK)); | |
98 | + | |
99 | + /* Re-do sizing to get full correct info */ | |
100 | + size1 = flash_get_size((vu_long *) CFG_FLASH_BASE4, &flash_info[1]); | |
101 | + | |
102 | + flash_get_offsets(CFG_FLASH_BASE4, &flash_info[1]); | |
103 | + | |
104 | + size += size1; | |
105 | +#endif | |
84 | 106 | |
85 | 107 | return (size); |
86 | 108 | } |
board/netphone/netphone.c
1 | 1 | /* |
2 | 2 | * (C) Copyright 2000-2004 |
3 | + * Pantelis Antoniou, Intracom S.A., panto@intracom.gr | |
3 | 4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
4 | 5 | * |
5 | 6 | * See file CREDITS for list of people who contributed to this |
... | ... | @@ -61,7 +62,7 @@ |
61 | 62 | |
62 | 63 | int checkboard(void) |
63 | 64 | { |
64 | - printf ("Intracom NetPhone\n"); | |
65 | + printf ("Intracom NetPhone V%d\n", CONFIG_NETPHONE_VERSION); | |
65 | 66 | return (0); |
66 | 67 | } |
67 | 68 | |
68 | 69 | |
69 | 70 | |
70 | 71 | |
... | ... | @@ -105,30 +106,30 @@ |
105 | 106 | #define BS_1110 0x0E000000 |
106 | 107 | #define BS_1111 0x0F000000 |
107 | 108 | |
108 | -#define A10_AAAA 0x00000000 | |
109 | -#define A10_AAA0 0x00200000 | |
110 | -#define A10_AAA1 0x00300000 | |
111 | -#define A10_000A 0x00800000 | |
112 | -#define A10_0000 0x00A00000 | |
113 | -#define A10_0001 0x00B00000 | |
114 | -#define A10_111A 0x00C00000 | |
115 | -#define A10_1110 0x00E00000 | |
116 | -#define A10_1111 0x00F00000 | |
109 | +#define GPL0_AAAA 0x00000000 | |
110 | +#define GPL0_AAA0 0x00200000 | |
111 | +#define GPL0_AAA1 0x00300000 | |
112 | +#define GPL0_000A 0x00800000 | |
113 | +#define GPL0_0000 0x00A00000 | |
114 | +#define GPL0_0001 0x00B00000 | |
115 | +#define GPL0_111A 0x00C00000 | |
116 | +#define GPL0_1110 0x00E00000 | |
117 | +#define GPL0_1111 0x00F00000 | |
117 | 118 | |
118 | -#define RAS_0000 0x00000000 | |
119 | -#define RAS_0001 0x00040000 | |
120 | -#define RAS_1110 0x00080000 | |
121 | -#define RAS_1111 0x000C0000 | |
119 | +#define GPL1_0000 0x00000000 | |
120 | +#define GPL1_0001 0x00040000 | |
121 | +#define GPL1_1110 0x00080000 | |
122 | +#define GPL1_1111 0x000C0000 | |
122 | 123 | |
123 | -#define CAS_0000 0x00000000 | |
124 | -#define CAS_0001 0x00010000 | |
125 | -#define CAS_1110 0x00020000 | |
126 | -#define CAS_1111 0x00030000 | |
124 | +#define GPL2_0000 0x00000000 | |
125 | +#define GPL2_0001 0x00010000 | |
126 | +#define GPL2_1110 0x00020000 | |
127 | +#define GPL2_1111 0x00030000 | |
127 | 128 | |
128 | -#define WE_0000 0x00000000 | |
129 | -#define WE_0001 0x00004000 | |
130 | -#define WE_1110 0x00008000 | |
131 | -#define WE_1111 0x0000C000 | |
129 | +#define GPL3_0000 0x00000000 | |
130 | +#define GPL3_0001 0x00004000 | |
131 | +#define GPL3_1110 0x00008000 | |
132 | +#define GPL3_1111 0x0000C000 | |
132 | 133 | |
133 | 134 | #define GPL4_0000 0x00000000 |
134 | 135 | #define GPL4_0001 0x00001000 |
... | ... | @@ -155,6 +156,31 @@ |
155 | 156 | |
156 | 157 | #define LAST 0x00000001 |
157 | 158 | |
159 | +#define A10_AAAA GPL0_AAAA | |
160 | +#define A10_AAA0 GPL0_AAA0 | |
161 | +#define A10_AAA1 GPL0_AAA1 | |
162 | +#define A10_000A GPL0_000A | |
163 | +#define A10_0000 GPL0_0000 | |
164 | +#define A10_0001 GPL0_0001 | |
165 | +#define A10_111A GPL0_111A | |
166 | +#define A10_1110 GPL0_1110 | |
167 | +#define A10_1111 GPL0_1111 | |
168 | + | |
169 | +#define RAS_0000 GPL1_0000 | |
170 | +#define RAS_0001 GPL1_0001 | |
171 | +#define RAS_1110 GPL1_1110 | |
172 | +#define RAS_1111 GPL1_1111 | |
173 | + | |
174 | +#define CAS_0000 GPL2_0000 | |
175 | +#define CAS_0001 GPL2_0001 | |
176 | +#define CAS_1110 GPL2_1110 | |
177 | +#define CAS_1111 GPL2_1111 | |
178 | + | |
179 | +#define WE_0000 GPL3_0000 | |
180 | +#define WE_0001 GPL3_0001 | |
181 | +#define WE_1110 GPL3_1110 | |
182 | +#define WE_1111 GPL3_1111 | |
183 | + | |
158 | 184 | /* #define CAS_LATENCY 3 */ |
159 | 185 | #define CAS_LATENCY 2 |
160 | 186 | |
... | ... | @@ -270,6 +296,55 @@ |
270 | 296 | CS_0001 | BS_1111 | A10_0001 | RAS_0001 | CAS_0001 | WE_0001 | AMX_MAR | UTA | LAST, |
271 | 297 | }; |
272 | 298 | |
299 | +#if CONFIG_NETPHONE_VERSION == 2 | |
300 | +static const uint nandcs_table[0x40] = { | |
301 | + /* RSS */ | |
302 | + CS_1000 | GPL4_1111 | GPL5_1111 | UTA, | |
303 | + CS_0000 | GPL4_1110 | GPL5_1111 | UTA, | |
304 | + CS_0000 | GPL4_0000 | GPL5_1111 | UTA, | |
305 | + CS_0000 | GPL4_0000 | GPL5_1111 | UTA, | |
306 | + CS_0000 | GPL4_0000 | GPL5_1111, | |
307 | + CS_0000 | GPL4_0001 | GPL5_1111 | UTA, | |
308 | + CS_0000 | GPL4_1111 | GPL5_1111 | UTA, | |
309 | + CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST, /* NOP */ | |
310 | + | |
311 | + /* RBS */ | |
312 | + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, | |
313 | + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, | |
314 | + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, | |
315 | + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, | |
316 | + | |
317 | + /* WSS */ | |
318 | + CS_1000 | GPL4_1111 | GPL5_1110 | UTA, | |
319 | + CS_0000 | GPL4_1111 | GPL5_0000 | UTA, | |
320 | + CS_0000 | GPL4_1111 | GPL5_0000 | UTA, | |
321 | + CS_0000 | GPL4_1111 | GPL5_0000 | UTA, | |
322 | + CS_0000 | GPL4_1111 | GPL5_0001 | UTA, | |
323 | + CS_0000 | GPL4_1111 | GPL5_1111 | UTA, | |
324 | + CS_0000 | GPL4_1111 | GPL5_1111, | |
325 | + CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST, | |
326 | + | |
327 | + /* WBS */ | |
328 | + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, | |
329 | + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, | |
330 | + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, | |
331 | + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, | |
332 | + | |
333 | + /* UPT */ | |
334 | + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, | |
335 | + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, | |
336 | + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, | |
337 | + | |
338 | + /* EXC */ | |
339 | + CS_0001 | LAST, | |
340 | + _NOT_USED_, | |
341 | + | |
342 | + /* REG */ | |
343 | + CS_1110 , | |
344 | + CS_0001 | LAST, | |
345 | +}; | |
346 | +#endif | |
347 | + | |
273 | 348 | /* 0xC8 = 0b11001000 , CAS3, >> 2 = 0b00 11 0 010 */ |
274 | 349 | /* 0x88 = 0b10001000 , CAS2, >> 2 = 0b00 10 0 010 */ |
275 | 350 | #define MAR_SDRAM_INIT ((CAS_LATENCY << 6) | 0x00000008LU) |
... | ... | @@ -329,7 +404,7 @@ |
329 | 404 | volatile memctl8xx_t *memctl = &immap->im_memctl; |
330 | 405 | long int size; |
331 | 406 | |
332 | - upmconfig(UPMB, (uint *) sdram_table, sizeof(sdram_table) / sizeof(uint)); | |
407 | + upmconfig(UPMB, (uint *) sdram_table, sizeof(sdram_table) / sizeof(sdram_table[0])); | |
333 | 408 | |
334 | 409 | /* |
335 | 410 | * Preliminary prescaler for refresh |
... | ... | @@ -384,17 +459,6 @@ |
384 | 459 | |
385 | 460 | size = get_ram_size((long *)0, SDRAM_MAX_SIZE); |
386 | 461 | |
387 | -#if 0 | |
388 | - printf("check 0\n"); | |
389 | - check_ram(( 0 << 20), (2 << 20)); | |
390 | - printf("check 16\n"); | |
391 | - check_ram((16 << 20), (2 << 20)); | |
392 | - printf("check 32\n"); | |
393 | - check_ram((32 << 20), (2 << 20)); | |
394 | - printf("check 48\n"); | |
395 | - check_ram((48 << 20), (2 << 20)); | |
396 | -#endif | |
397 | - | |
398 | 462 | if (size == 0) { |
399 | 463 | printf("SIZE is zero: LOOP on 0\n"); |
400 | 464 | for (;;) { |
401 | 465 | |
402 | 466 | |
403 | 467 | |
404 | 468 | |
... | ... | @@ -447,19 +511,30 @@ |
447 | 511 | #define PB_GP_OUTVAL (_B(26) | _B(27) | _B(29) | _B(30)) |
448 | 512 | #define PB_SP_DIRVAL 0 |
449 | 513 | |
514 | +#if CONFIG_NETPHONE_VERSION == 1 | |
450 | 515 | #define PC_GP_INMASK _BW(12) |
451 | 516 | #define PC_GP_OUTMASK (_BW(10) | _BW(11) | _BW(13) | _BW(15)) |
517 | +#elif CONFIG_NETPHONE_VERSION == 2 | |
518 | +#define PC_GP_INMASK (_BW(13) | _BW(15)) | |
519 | +#define PC_GP_OUTMASK (_BW(10) | _BW(11) | _BW(12)) | |
520 | +#endif | |
452 | 521 | #define PC_SP_MASK 0 |
453 | 522 | #define PC_SOVAL 0 |
454 | 523 | #define PC_INTVAL 0 |
455 | 524 | #define PC_GP_OUTVAL (_BW(10) | _BW(11)) |
456 | 525 | #define PC_SP_DIRVAL 0 |
457 | 526 | |
527 | +#if CONFIG_NETPHONE_VERSION == 1 | |
458 | 528 | #define PE_GP_INMASK _B(31) |
459 | 529 | #define PE_GP_OUTMASK (_B(17) | _B(18) |_B(20) | _B(24) | _B(27) | _B(28) | _B(29) | _B(30)) |
530 | +#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27) | _B(28)) | |
531 | +#elif CONFIG_NETPHONE_VERSION == 2 | |
532 | +#define PE_GP_INMASK _BR(28, 31) | |
533 | +#define PE_GP_OUTMASK (_B(17) | _B(18) |_B(20) | _B(24) | _B(27)) | |
534 | +#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27)) | |
535 | +#endif | |
460 | 536 | #define PE_SP_MASK 0 |
461 | 537 | #define PE_ODR_VAL 0 |
462 | -#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27) | _B(28)) | |
463 | 538 | #define PE_SP_DIRVAL 0 |
464 | 539 | |
465 | 540 | int board_early_init_f(void) |
466 | 541 | |
467 | 542 | |
... | ... | @@ -470,17 +545,23 @@ |
470 | 545 | volatile memctl8xx_t *memctl = &immap->im_memctl; |
471 | 546 | |
472 | 547 | /* NAND chip select */ |
548 | +#if CONFIG_NETPHONE_VERSION == 1 | |
473 | 549 | memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_SCY_8_CLK | OR_EHTR | OR_TRLX); |
474 | 550 | memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V); |
551 | +#elif CONFIG_NETPHONE_VERSION == 2 | |
552 | + upmconfig(UPMA, (uint *) nandcs_table, sizeof(nandcs_table) / sizeof(nandcs_table[0])); | |
553 | + memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_BI | OR_G5LS); | |
554 | + memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V | BR_MS_UPMA); | |
555 | + memctl->memc_mamr = 0; /* all clear */ | |
556 | +#endif | |
475 | 557 | |
476 | 558 | /* DSP chip select */ |
477 | 559 | memctl->memc_or2 = ((0xFFFFFFFFLU & ~(DSP_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_ACS_DIV2 | OR_SETA | OR_TRLX); |
478 | 560 | memctl->memc_br2 = ((DSP_BASE & BR_BA_MSK) | BR_PS_16 | BR_V); |
479 | 561 | |
480 | - /* External register chip select */ | |
481 | - memctl->memc_or4 = ((0xFFFFFFFFLU & ~(ER_SIZE - 1)) | OR_BI | OR_SCY_4_CLK); | |
482 | - memctl->memc_br4 = ((ER_BASE & BR_BA_MSK) | BR_PS_32 | BR_V); | |
483 | - | |
562 | +#if CONFIG_NETPHONE_VERSION == 1 | |
563 | + memctl->memc_br4 &= ~BR_V; | |
564 | +#endif | |
484 | 565 | memctl->memc_br5 &= ~BR_V; |
485 | 566 | memctl->memc_br6 &= ~BR_V; |
486 | 567 | memctl->memc_br7 &= ~BR_V; |
... | ... | @@ -588,6 +669,13 @@ |
588 | 669 | { |
589 | 670 | int i; |
590 | 671 | |
672 | +#if CONFIG_NETPHONE_VERSION == 2 | |
673 | + /* assert peripheral reset */ | |
674 | + ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat &= ~_BW(12); | |
675 | + for (i = 0; i < 10; i++) | |
676 | + udelay(1000); | |
677 | + ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat |= _BW(12); | |
678 | +#endif | |
591 | 679 | reset_phys(); |
592 | 680 | |
593 | 681 | /* check in order to enable the local console */ |
board/netphone/phone_console.c
... | ... | @@ -62,6 +62,7 @@ |
62 | 62 | #define KP_FORCE_DELAY_HZ (CFG_HZ/2) /* key was force pressed */ |
63 | 63 | #define KP_IDLE_DELAY_HZ (CFG_HZ/2) /* key was released and idle */ |
64 | 64 | |
65 | +#if CONFIG_NETPHONE_VERSION == 1 | |
65 | 66 | #define KP_SPI_RXD_PORT (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat) |
66 | 67 | #define KP_SPI_RXD_MASK 0x0008 |
67 | 68 | |
68 | 69 | |
... | ... | @@ -70,7 +71,17 @@ |
70 | 71 | |
71 | 72 | #define KP_SPI_CLK_PORT (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat) |
72 | 73 | #define KP_SPI_CLK_MASK 0x0001 |
74 | +#elif CONFIG_NETPHONE_VERSION == 2 | |
75 | +#define KP_SPI_RXD_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat) | |
76 | +#define KP_SPI_RXD_MASK 0x00000008 | |
73 | 77 | |
78 | +#define KP_SPI_TXD_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat) | |
79 | +#define KP_SPI_TXD_MASK 0x00000004 | |
80 | + | |
81 | +#define KP_SPI_CLK_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat) | |
82 | +#define KP_SPI_CLK_MASK 0x00000002 | |
83 | +#endif | |
84 | + | |
74 | 85 | #define KP_CS_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pedat) |
75 | 86 | #define KP_CS_MASK 0x00000010 |
76 | 87 | |
77 | 88 | |
78 | 89 | |
79 | 90 | |
... | ... | @@ -975,9 +986,19 @@ |
975 | 986 | |
976 | 987 | val = 0x80 | (row_mask & 0x7F); |
977 | 988 | (void)kp_data_transfer(val); |
989 | +#if CONFIG_NETPHONE_VERSION == 1 | |
978 | 990 | col_mask = kp_data_transfer(val) & 0x0F; |
991 | +#elif CONFIG_NETPHONE_VERSION == 2 | |
992 | + col_mask = ((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pedat & 0x0f; | |
993 | + /* XXX FUCK FUCK FUCK FUCK FUCK!!!! */ | |
994 | + col_mask = ((col_mask & 0x08) >> 3) | /* BKBR1 */ | |
995 | + ((col_mask & 0x04) << 1) | /* BKBR2 */ | |
996 | + (col_mask & 0x02) | /* BKBR3 */ | |
997 | + ((col_mask & 0x01) << 2); /* BKBR4 */ | |
979 | 998 | |
999 | +#endif | |
980 | 1000 | /* printf("col_mask(row_mask = 0x%x) -> col_mask = 0x%x\n", row_mask, col_mask); */ |
1001 | + | |
981 | 1002 | return col_mask; |
982 | 1003 | } |
983 | 1004 |
common/cmd_mem.c
... | ... | @@ -963,6 +963,8 @@ |
963 | 963 | return 0; |
964 | 964 | } |
965 | 965 | |
966 | +#ifndef CONFIG_CRC32_VERIFY | |
967 | + | |
966 | 968 | int do_mem_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
967 | 969 | { |
968 | 970 | ulong addr, length; |
... | ... | @@ -992,6 +994,62 @@ |
992 | 994 | return 0; |
993 | 995 | } |
994 | 996 | |
997 | +#else /* CONFIG_CRC32_VERIFY */ | |
998 | + | |
999 | +int do_mem_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) | |
1000 | +{ | |
1001 | + ulong addr, length; | |
1002 | + ulong crc; | |
1003 | + ulong *ptr; | |
1004 | + ulong vcrc; | |
1005 | + int verify; | |
1006 | + int ac; | |
1007 | + char **av; | |
1008 | + | |
1009 | + if (argc < 3) { | |
1010 | + usage: | |
1011 | + printf ("Usage:\n%s\n", cmdtp->usage); | |
1012 | + return 1; | |
1013 | + } | |
1014 | + | |
1015 | + av = argv + 1; | |
1016 | + ac = argc - 1; | |
1017 | + if (strcmp(*av, "-v") == 0) { | |
1018 | + verify = 1; | |
1019 | + av++; | |
1020 | + ac--; | |
1021 | + if (ac < 3) | |
1022 | + goto usage; | |
1023 | + } else | |
1024 | + verify = 0; | |
1025 | + | |
1026 | + addr = simple_strtoul(*av++, NULL, 16); | |
1027 | + addr += base_address; | |
1028 | + length = simple_strtoul(*av++, NULL, 16); | |
1029 | + | |
1030 | + crc = crc32(0, (const uchar *) addr, length); | |
1031 | + | |
1032 | + if (!verify) { | |
1033 | + printf ("CRC32 for %08lx ... %08lx ==> %08lx\n", | |
1034 | + addr, addr + length - 1, crc); | |
1035 | + if (ac > 2) { | |
1036 | + ptr = (ulong *) simple_strtoul (*av++, NULL, 16); | |
1037 | + *ptr = crc; | |
1038 | + } | |
1039 | + } else { | |
1040 | + vcrc = simple_strtoul(*av++, NULL, 16); | |
1041 | + if (vcrc != crc) { | |
1042 | + printf ("CRC32 for %08lx ... %08lx ==> %08lx != %08lx ** ERROR **\n", | |
1043 | + addr, addr + length - 1, crc, vcrc); | |
1044 | + return 1; | |
1045 | + } | |
1046 | + } | |
1047 | + | |
1048 | + return 0; | |
1049 | + | |
1050 | +} | |
1051 | +#endif /* CONFIG_CRC32_VERIFY */ | |
1052 | + | |
995 | 1053 | /**************************************************/ |
996 | 1054 | #if (CONFIG_COMMANDS & CFG_CMD_MEMORY) |
997 | 1055 | U_BOOT_CMD( |
998 | 1056 | |
... | ... | @@ -1032,11 +1090,24 @@ |
1032 | 1090 | "[.b, .w, .l] addr1 addr2 count\n - compare memory\n" |
1033 | 1091 | ); |
1034 | 1092 | |
1093 | +#ifndef CONFIG_CRC32_VERIFY | |
1094 | + | |
1035 | 1095 | U_BOOT_CMD( |
1036 | 1096 | crc32, 4, 1, do_mem_crc, |
1037 | 1097 | "crc32 - checksum calculation\n", |
1038 | 1098 | "address count [addr]\n - compute CRC32 checksum [save at addr]\n" |
1039 | 1099 | ); |
1100 | + | |
1101 | +#else /* CONFIG_CRC32_VERIFY */ | |
1102 | + | |
1103 | +U_BOOT_CMD( | |
1104 | + crc32, 5, 1, do_mem_crc, | |
1105 | + "crc32 - checksum calculation\n", | |
1106 | + "address count [addr]\n - compute CRC32 checksum [save at addr]\n" | |
1107 | + "-v address count crc\n - verify crc of memory area\n" | |
1108 | +); | |
1109 | + | |
1110 | +#endif /* CONFIG_CRC32_VERIFY */ | |
1040 | 1111 | |
1041 | 1112 | U_BOOT_CMD( |
1042 | 1113 | base, 2, 1, do_mem_base, |
common/cmd_pcmcia.c
common/command.c
... | ... | @@ -74,6 +74,159 @@ |
74 | 74 | " - echo args to console; \\c suppresses newline\n" |
75 | 75 | ); |
76 | 76 | |
77 | +#ifdef CFG_HUSH_PARSER | |
78 | + | |
79 | +int | |
80 | +do_test (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) | |
81 | +{ | |
82 | + char **ap; | |
83 | + int left, adv, expr, last_expr, neg, last_cmp; | |
84 | + | |
85 | + /* args? */ | |
86 | + if (argc < 3) | |
87 | + return 1; | |
88 | + | |
89 | +#if 0 | |
90 | + { | |
91 | + printf("test:"); | |
92 | + left = 1; | |
93 | + while (argv[left]) | |
94 | + printf(" %s", argv[left++]); | |
95 | + } | |
96 | +#endif | |
97 | + | |
98 | + last_expr = 0; | |
99 | + left = argc - 1; ap = argv + 1; | |
100 | + if (left > 0 && strcmp(ap[0], "!") == 0) { | |
101 | + neg = 1; | |
102 | + ap++; | |
103 | + left--; | |
104 | + } else | |
105 | + neg = 0; | |
106 | + | |
107 | + expr = -1; | |
108 | + last_cmp = -1; | |
109 | + last_expr = -1; | |
110 | + while (left > 0) { | |
111 | + | |
112 | + if (strcmp(ap[0], "-o") == 0 || strcmp(ap[0], "-a") == 0) | |
113 | + adv = 1; | |
114 | + else if (strcmp(ap[0], "-z") == 0 || strcmp(ap[0], "-n") == 0) | |
115 | + adv = 2; | |
116 | + else | |
117 | + adv = 3; | |
118 | + | |
119 | + if (left < adv) { | |
120 | + expr = 1; | |
121 | + break; | |
122 | + } | |
123 | + | |
124 | + if (adv == 1) { | |
125 | + if (strcmp(ap[0], "-o") == 0) { | |
126 | + last_expr = expr; | |
127 | + last_cmp = 0; | |
128 | + } else if (strcmp(ap[0], "-a") == 0) { | |
129 | + last_expr = expr; | |
130 | + last_cmp = 1; | |
131 | + } else { | |
132 | + expr = 1; | |
133 | + break; | |
134 | + } | |
135 | + } | |
136 | + | |
137 | + if (adv == 2) { | |
138 | + if (strcmp(ap[0], "-z") == 0) | |
139 | + expr = strlen(ap[1]) == 0 ? 0 : 1; | |
140 | + else if (strcmp(ap[0], "-n") == 0) | |
141 | + expr = strlen(ap[1]) == 0 ? 1 : 0; | |
142 | + else { | |
143 | + expr = 1; | |
144 | + break; | |
145 | + } | |
146 | + | |
147 | + if (last_cmp == 0) | |
148 | + expr = last_expr || expr; | |
149 | + else if (last_cmp == 1) | |
150 | + expr = last_expr && expr; | |
151 | + last_cmp = -1; | |
152 | + } | |
153 | + | |
154 | + if (adv == 3) { | |
155 | + if (strcmp(ap[1], "=") == 0) | |
156 | + expr = strcmp(ap[0], ap[2]) == 0; | |
157 | + else if (strcmp(ap[1], "!=") == 0) | |
158 | + expr = strcmp(ap[0], ap[2]) != 0; | |
159 | + else if (strcmp(ap[1], ">") == 0) | |
160 | + expr = strcmp(ap[0], ap[2]) > 0; | |
161 | + else if (strcmp(ap[1], "<") == 0) | |
162 | + expr = strcmp(ap[0], ap[2]) < 0; | |
163 | + else if (strcmp(ap[1], "-eq") == 0) | |
164 | + expr = simple_strtol(ap[0], NULL, 10) == simple_strtol(ap[2], NULL, 10); | |
165 | + else if (strcmp(ap[1], "-ne") == 0) | |
166 | + expr = simple_strtol(ap[0], NULL, 10) != simple_strtol(ap[2], NULL, 10); | |
167 | + else if (strcmp(ap[1], "-lt") == 0) | |
168 | + expr = simple_strtol(ap[0], NULL, 10) < simple_strtol(ap[2], NULL, 10); | |
169 | + else if (strcmp(ap[1], "-le") == 0) | |
170 | + expr = simple_strtol(ap[0], NULL, 10) <= simple_strtol(ap[2], NULL, 10); | |
171 | + else if (strcmp(ap[1], "-gt") == 0) | |
172 | + expr = simple_strtol(ap[0], NULL, 10) > simple_strtol(ap[2], NULL, 10); | |
173 | + else if (strcmp(ap[1], "-ge") == 0) | |
174 | + expr = simple_strtol(ap[0], NULL, 10) >= simple_strtol(ap[2], NULL, 10); | |
175 | + else { | |
176 | + expr = 1; | |
177 | + break; | |
178 | + } | |
179 | + | |
180 | + if (last_cmp == 0) | |
181 | + expr = last_expr || expr; | |
182 | + else if (last_cmp == 1) | |
183 | + expr = last_expr && expr; | |
184 | + last_cmp = -1; | |
185 | + } | |
186 | + | |
187 | + ap += adv; left -= adv; | |
188 | + } | |
189 | + | |
190 | + if (neg) | |
191 | + expr = !expr; | |
192 | + | |
193 | + expr = !expr; | |
194 | + | |
195 | +#if 0 | |
196 | + printf(": returns %d\n", expr); | |
197 | +#endif | |
198 | + | |
199 | + return expr; | |
200 | +} | |
201 | + | |
202 | +U_BOOT_CMD( | |
203 | + test, CFG_MAXARGS, 1, do_test, | |
204 | + "test - minimal test like /bin/sh\n", | |
205 | + "[args..]\n" | |
206 | + " - test functionality\n" | |
207 | +); | |
208 | + | |
209 | +int | |
210 | +do_exit (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) | |
211 | +{ | |
212 | + int r; | |
213 | + | |
214 | + r = 0; | |
215 | + if (argc > 1) | |
216 | + r = simple_strtoul(argv[1], NULL, 10); | |
217 | + | |
218 | + return -r - 2; | |
219 | +} | |
220 | + | |
221 | +U_BOOT_CMD( | |
222 | + exit, 2, 1, do_exit, | |
223 | + "exit - exit script\n", | |
224 | + " - exit functionality\n" | |
225 | +); | |
226 | + | |
227 | + | |
228 | +#endif | |
229 | + | |
77 | 230 | /* |
78 | 231 | * Use puts() instead of printf() to avoid printf buffer overflow |
79 | 232 | * for long help messages |
common/hush.c
... | ... | @@ -290,6 +290,7 @@ |
290 | 290 | unsigned int global_argc; |
291 | 291 | #endif |
292 | 292 | unsigned int last_return_code; |
293 | +int nesting_level; | |
293 | 294 | #ifndef __U_BOOT__ |
294 | 295 | extern char **environ; /* This is in <unistd.h>, but protected with __USE_GNU */ |
295 | 296 | #endif |
296 | 297 | |
... | ... | @@ -416,7 +417,9 @@ |
416 | 417 | static int b_addchr(o_string *o, int ch); |
417 | 418 | static void b_reset(o_string *o); |
418 | 419 | static int b_addqchr(o_string *o, int ch, int quote); |
420 | +#ifndef __U_BOOT__ | |
419 | 421 | static int b_adduint(o_string *o, unsigned int i); |
422 | +#endif | |
420 | 423 | /* in_str manipulations: */ |
421 | 424 | static int static_get(struct in_str *i); |
422 | 425 | static int static_peek(struct in_str *i); |
... | ... | @@ -936,6 +939,7 @@ |
936 | 939 | return p + 1; |
937 | 940 | } |
938 | 941 | |
942 | +#ifndef __U_BOOT__ | |
939 | 943 | static int b_adduint(o_string *o, unsigned int i) |
940 | 944 | { |
941 | 945 | int r; |
... | ... | @@ -944,6 +948,7 @@ |
944 | 948 | do r=b_addchr(o, *p++); while (r==0 && *p); |
945 | 949 | return r; |
946 | 950 | } |
951 | +#endif | |
947 | 952 | |
948 | 953 | static int static_get(struct in_str *i) |
949 | 954 | { |
... | ... | @@ -1921,6 +1926,10 @@ |
1921 | 1926 | } |
1922 | 1927 | last_return_code=rcode; |
1923 | 1928 | #else |
1929 | + if (rcode < -1) { | |
1930 | + last_return_code = -rcode - 2; | |
1931 | + return -2; /* exit */ | |
1932 | + } | |
1924 | 1933 | last_return_code=(rcode == 0) ? 0 : 1; |
1925 | 1934 | #endif |
1926 | 1935 | #ifndef __U_BOOT__ |
... | ... | @@ -2145,6 +2154,10 @@ |
2145 | 2154 | } |
2146 | 2155 | #endif |
2147 | 2156 | |
2157 | +#ifdef __U_BOOT__ | |
2158 | +static char *get_dollar_var(char ch); | |
2159 | +#endif | |
2160 | + | |
2148 | 2161 | /* This is used to get/check local shell variables */ |
2149 | 2162 | static char *get_local_var(const char *s) |
2150 | 2163 | { |
... | ... | @@ -2152,6 +2165,12 @@ |
2152 | 2165 | |
2153 | 2166 | if (!s) |
2154 | 2167 | return NULL; |
2168 | + | |
2169 | +#ifdef __U_BOOT__ | |
2170 | + if (*s == '$') | |
2171 | + return get_dollar_var(s[1]); | |
2172 | +#endif | |
2173 | + | |
2155 | 2174 | for (cur = top_vars; cur; cur=cur->next) |
2156 | 2175 | if(strcmp(cur->name, s)==0) |
2157 | 2176 | return cur->value; |
2158 | 2177 | |
... | ... | @@ -2168,12 +2187,19 @@ |
2168 | 2187 | int result=0; |
2169 | 2188 | struct variables *cur; |
2170 | 2189 | |
2190 | +#ifdef __U_BOOT__ | |
2191 | + /* might be possible! */ | |
2192 | + if (!isalpha(*s)) | |
2193 | + return -1; | |
2194 | +#endif | |
2195 | + | |
2171 | 2196 | name=strdup(s); |
2172 | 2197 | |
2173 | 2198 | #ifdef __U_BOOT__ |
2174 | 2199 | if (getenv(name) != NULL) { |
2175 | 2200 | printf ("ERROR: " |
2176 | 2201 | "There is a global environment variable with the same name.\n"); |
2202 | + free(name); | |
2177 | 2203 | return -1; |
2178 | 2204 | } |
2179 | 2205 | #endif |
... | ... | @@ -2278,7 +2304,10 @@ |
2278 | 2304 | |
2279 | 2305 | static int is_assignment(const char *s) |
2280 | 2306 | { |
2281 | - if (s==NULL || !isalpha(*s)) return 0; | |
2307 | + if (s == NULL) | |
2308 | + return 0; | |
2309 | + | |
2310 | + if (!isalpha(*s)) return 0; | |
2282 | 2311 | ++s; |
2283 | 2312 | while(isalnum(*s) || *s=='_') ++s; |
2284 | 2313 | return *s=='='; |
2285 | 2314 | |
2286 | 2315 | |
... | ... | @@ -2749,15 +2778,35 @@ |
2749 | 2778 | * see the bash man page under "Parameter Expansion" */ |
2750 | 2779 | static char *lookup_param(char *src) |
2751 | 2780 | { |
2752 | - char *p=NULL; | |
2753 | - if (src) { | |
2781 | + char *p; | |
2782 | + | |
2783 | + if (!src) | |
2784 | + return NULL; | |
2785 | + | |
2754 | 2786 | p = getenv(src); |
2755 | 2787 | if (!p) |
2756 | 2788 | p = get_local_var(src); |
2757 | - } | |
2789 | + | |
2758 | 2790 | return p; |
2759 | 2791 | } |
2760 | 2792 | |
2793 | +#ifdef __U_BOOT__ | |
2794 | +static char *get_dollar_var(char ch) | |
2795 | +{ | |
2796 | + static char buf[40]; | |
2797 | + | |
2798 | + buf[0] = '\0'; | |
2799 | + switch (ch) { | |
2800 | + case '?': | |
2801 | + sprintf(buf, "%u", (unsigned int)last_return_code); | |
2802 | + break; | |
2803 | + default: | |
2804 | + return NULL; | |
2805 | + } | |
2806 | + return buf; | |
2807 | +} | |
2808 | +#endif | |
2809 | + | |
2761 | 2810 | /* return code: 0 for OK, 1 for syntax error */ |
2762 | 2811 | static int handle_dollar(o_string *dest, struct p_context *ctx, struct in_str *input) |
2763 | 2812 | { |
2764 | 2813 | |
... | ... | @@ -2799,7 +2848,15 @@ |
2799 | 2848 | break; |
2800 | 2849 | #endif |
2801 | 2850 | case '?': |
2851 | +#ifndef __U_BOOT__ | |
2802 | 2852 | b_adduint(dest,last_return_code); |
2853 | +#else | |
2854 | + ctx->child->sp++; | |
2855 | + b_addchr(dest, SPECIAL_VAR_SYMBOL); | |
2856 | + b_addchr(dest, '$'); | |
2857 | + b_addchr(dest, '?'); | |
2858 | + b_addchr(dest, SPECIAL_VAR_SYMBOL); | |
2859 | +#endif | |
2803 | 2860 | advance = 1; |
2804 | 2861 | break; |
2805 | 2862 | #ifndef __U_BOOT__ |
... | ... | @@ -2885,8 +2942,11 @@ |
2885 | 2942 | if (input->__promptme == 0) return 1; |
2886 | 2943 | #endif |
2887 | 2944 | next = (ch == '\n') ? 0 : b_peek(input); |
2888 | - debug_printf("parse_stream: ch=%c (%d) m=%d quote=%d\n", | |
2889 | - ch,ch,m,dest->quote); | |
2945 | + | |
2946 | + debug_printf("parse_stream: ch=%c (%d) m=%d quote=%d - %c\n", | |
2947 | + ch >= ' ' ? ch : '.', ch, m, | |
2948 | + dest->quote, ctx->stack == NULL ? '*' : '.'); | |
2949 | + | |
2890 | 2950 | if (m==0 || ((m==1 || m==2) && dest->quote)) { |
2891 | 2951 | b_addqchr(dest, ch, dest->quote); |
2892 | 2952 | } else { |
... | ... | @@ -3107,7 +3167,18 @@ |
3107 | 3167 | #ifndef __U_BOOT__ |
3108 | 3168 | run_list(ctx.list_head); |
3109 | 3169 | #else |
3110 | - if (((code = run_list(ctx.list_head)) == -1)) | |
3170 | + code = run_list(ctx.list_head); | |
3171 | + if (code == -2) { /* exit */ | |
3172 | + b_free(&temp); | |
3173 | + code = 0; | |
3174 | + /* XXX hackish way to not allow exit from main loop */ | |
3175 | + if (inp->peek == file_peek) { | |
3176 | + printf("exit not allowed from main input shell.\n"); | |
3177 | + continue; | |
3178 | + } | |
3179 | + break; | |
3180 | + } | |
3181 | + if (code == -1) | |
3111 | 3182 | flag_repeat = 0; |
3112 | 3183 | #endif |
3113 | 3184 | } else { |
cpu/mpc8xx/fec.c
... | ... | @@ -60,22 +60,22 @@ |
60 | 60 | { |
61 | 61 | int ether_index; |
62 | 62 | int fecp_offset; |
63 | - int bd_offset; | |
64 | 63 | int phy_addr; |
65 | 64 | int actual_phy_addr; |
65 | + int initialized; | |
66 | 66 | } |
67 | 67 | ether_fcc_info[] = { |
68 | 68 | #if defined(CONFIG_ETHER_ON_FEC1) |
69 | 69 | { |
70 | 70 | 0, |
71 | 71 | offsetof(immap_t, im_cpm.cp_fec1), |
72 | - CPM_FEC_BASE, | |
73 | 72 | #if defined(CONFIG_FEC1_PHY) |
74 | 73 | CONFIG_FEC1_PHY, |
75 | 74 | #else |
76 | 75 | -1, /* discover */ |
77 | 76 | #endif |
78 | 77 | -1, |
78 | + 0, | |
79 | 79 | |
80 | 80 | }, |
81 | 81 | #endif |
82 | 82 | |
... | ... | @@ -83,13 +83,13 @@ |
83 | 83 | { |
84 | 84 | 1, |
85 | 85 | offsetof(immap_t, im_cpm.cp_fec2), |
86 | - CPM_FEC_BASE + 0x50, | |
87 | 86 | #if defined(CONFIG_FEC2_PHY) |
88 | 87 | CONFIG_FEC2_PHY, |
89 | 88 | #else |
90 | 89 | -1, |
91 | 90 | #endif |
92 | 91 | -1, |
92 | + 0, | |
93 | 93 | }, |
94 | 94 | #endif |
95 | 95 | }; |
... | ... | @@ -383,6 +383,11 @@ |
383 | 383 | */ |
384 | 384 | fecp->fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1; |
385 | 385 | |
386 | +#if defined(CONFIG_NETTA) || defined(CONFIG_NETPHONE) | |
387 | + /* our PHYs are the limit at 2.5 MHz */ | |
388 | + fecp->fec_mii_speed <<= 1; | |
389 | +#endif | |
390 | + | |
386 | 391 | #if defined(CONFIG_DUET) && defined(WANT_MII) |
387 | 392 | /* use MDC for MII */ |
388 | 393 | immr->im_ioport.iop_pdpar |= 0x0080; |
... | ... | @@ -695,6 +700,14 @@ |
695 | 700 | efis->actual_phy_addr = efis->phy_addr; |
696 | 701 | } |
697 | 702 | #if defined(CONFIG_MII) && defined(CONFIG_RMII) |
703 | + | |
704 | + /* the MII interface is connected to FEC1 | |
705 | + so for the miiphy_xxx function to work we must | |
706 | + call mii_init since fec_halt messes the thing up */ | |
707 | + | |
708 | + if (efis->ether_index != 0) | |
709 | + mii_init(); | |
710 | + | |
698 | 711 | /* |
699 | 712 | * adapt the RMII speed to the speed of the phy |
700 | 713 | */ |
701 | 714 | |
702 | 715 | |
703 | 716 | |
... | ... | @@ -719,25 +732,43 @@ |
719 | 732 | /* And last, try to fill Rx Buffer Descriptors */ |
720 | 733 | fecp->fec_r_des_active = 0x01000000; /* Descriptor polling active */ |
721 | 734 | |
735 | + efis->initialized = 1; | |
736 | + | |
722 | 737 | return 1; |
723 | 738 | } |
724 | 739 | |
725 | 740 | |
726 | 741 | static void fec_halt(struct eth_device* dev) |
727 | 742 | { |
728 | -#if 0 | |
729 | - volatile immap_t *immr = (immap_t *)CFG_IMMR; | |
730 | - immr->im_cpm.cp_scc[SCC_ENET].scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
731 | -#endif | |
732 | -} | |
743 | + struct ether_fcc_info_s *efis = dev->priv; | |
744 | + volatile fec_t *fecp = (volatile fec_t *)(CFG_IMMR + efis->fecp_offset); | |
745 | + int i; | |
733 | 746 | |
734 | -#if 0 | |
735 | -void restart(void) | |
736 | -{ | |
737 | - volatile immap_t *immr = (immap_t *)CFG_IMMR; | |
738 | - immr->im_cpm.cp_scc[SCC_ENET].scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
747 | + /* avoid halt if initialized; mii gets stuck otherwise */ | |
748 | + if (!efis->initialized) | |
749 | + return; | |
750 | + | |
751 | + /* Whack a reset. | |
752 | + * A delay is required between a reset of the FEC block and | |
753 | + * initialization of other FEC registers because the reset takes | |
754 | + * some time to complete. If you don't delay, subsequent writes | |
755 | + * to FEC registers might get killed by the reset routine which is | |
756 | + * still in progress. | |
757 | + */ | |
758 | + | |
759 | + fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET; | |
760 | + for (i = 0; | |
761 | + (fecp->fec_ecntrl & FEC_ECNTRL_RESET) && (i < FEC_RESET_DELAY); | |
762 | + ++i) { | |
763 | + udelay (1); | |
764 | + } | |
765 | + if (i == FEC_RESET_DELAY) { | |
766 | + printf ("FEC_RESET_DELAY timeout\n"); | |
767 | + return; | |
768 | + } | |
769 | + | |
770 | + efis->initialized = 0; | |
739 | 771 | } |
740 | -#endif | |
741 | 772 | |
742 | 773 | #if defined(CFG_DISCOVER_PHY) || defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII) |
743 | 774 | |
744 | 775 | |
... | ... | @@ -781,14 +812,20 @@ |
781 | 812 | { |
782 | 813 | uint mii_reply; |
783 | 814 | volatile fec_t *ep; |
815 | + int cnt; | |
784 | 816 | |
785 | 817 | ep = &(((immap_t *)CFG_IMMR)->im_cpm.cp_fec); |
786 | 818 | |
787 | 819 | ep->fec_mii_data = mii_cmd; /* command to phy */ |
788 | 820 | |
789 | 821 | /* wait for mii complete */ |
790 | - while (!(ep->fec_ievent & FEC_ENET_MII)) | |
791 | - ; /* spin until done */ | |
822 | + cnt = 0; | |
823 | + while (!(ep->fec_ievent & FEC_ENET_MII)) { | |
824 | + if (++cnt > 1000) { | |
825 | + printf("mii_send STUCK!\n"); | |
826 | + break; | |
827 | + } | |
828 | + } | |
792 | 829 | mii_reply = ep->fec_mii_data; /* result from phy */ |
793 | 830 | ep->fec_ievent = FEC_ENET_MII; /* clear MII complete */ |
794 | 831 | #if 0 |
... | ... | @@ -870,8 +907,6 @@ |
870 | 907 | |
871 | 908 | #if (defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)) && !defined(CONFIG_BITBANGMII) |
872 | 909 | |
873 | -static int mii_init_done = 0; | |
874 | - | |
875 | 910 | /**************************************************************************** |
876 | 911 | * mii_init -- Initialize the MII for MII command without ethernet |
877 | 912 | * This function is a subset of eth_init |
... | ... | @@ -883,10 +918,6 @@ |
883 | 918 | volatile fec_t *fecp = &(immr->im_cpm.cp_fec); |
884 | 919 | int i, j; |
885 | 920 | |
886 | - if (mii_init_done != 0) { | |
887 | - return; | |
888 | - } | |
889 | - | |
890 | 921 | for (j = 0; j < sizeof(ether_fcc_info) / sizeof(ether_fcc_info[0]); j++) { |
891 | 922 | |
892 | 923 | /* Whack a reset. |
... | ... | @@ -924,8 +955,6 @@ |
924 | 955 | */ |
925 | 956 | fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN; |
926 | 957 | } |
927 | - | |
928 | - mii_init_done = 1; | |
929 | 958 | } |
930 | 959 | |
931 | 960 | /***************************************************************************** |
include/configs/NETPHONE.h
... | ... | @@ -29,6 +29,10 @@ |
29 | 29 | #ifndef __CONFIG_H |
30 | 30 | #define __CONFIG_H |
31 | 31 | |
32 | +#if !defined(CONFIG_NETPHONE_VERSION) || CONFIG_NETPHONE_VERSION > 2 | |
33 | +#error Unsupported CONFIG_NETPHONE version | |
34 | +#endif | |
35 | + | |
32 | 36 | /* |
33 | 37 | * High Level Configuration Options |
34 | 38 | * (easy to change) |
... | ... | @@ -46,6 +50,7 @@ |
46 | 50 | /* #define CONFIG_XIN 10000000 */ |
47 | 51 | #define CONFIG_XIN 50000000 |
48 | 52 | #define MPC8XX_HZ 120000000 |
53 | +/* #define MPC8XX_HZ 66666666 */ | |
49 | 54 | |
50 | 55 | #define CONFIG_8xx_GCLK_FREQ MPC8XX_HZ |
51 | 56 | |
52 | 57 | |
... | ... | @@ -174,7 +179,12 @@ |
174 | 179 | #endif |
175 | 180 | #define CFG_MONITOR_BASE CFG_FLASH_BASE |
176 | 181 | #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ |
182 | +#if CONFIG_NETPHONE_VERSION == 2 | |
183 | +#define CFG_FLASH_BASE4 0x40080000 | |
184 | +#endif | |
177 | 185 | |
186 | +#define CFG_RESET_ADDRESS 0x80000000 | |
187 | + | |
178 | 188 | /* |
179 | 189 | * For booting Linux, the board info and command line data |
180 | 190 | * have to be in the first 8 MB of memory, since this is |
181 | 191 | |
... | ... | @@ -185,7 +195,11 @@ |
185 | 195 | /*----------------------------------------------------------------------- |
186 | 196 | * FLASH organization |
187 | 197 | */ |
198 | +#if CONFIG_NETPHONE_VERSION == 1 | |
188 | 199 | #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
200 | +#elif CONFIG_NETPHONE_VERSION == 2 | |
201 | +#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ | |
202 | +#endif | |
189 | 203 | #define CFG_MAX_FLASH_SECT 8 /* max number of sectors on one chip */ |
190 | 204 | |
191 | 205 | #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
... | ... | @@ -302,6 +316,10 @@ |
302 | 316 | #define CFG_PLPRCR ((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \ |
303 | 317 | (0 << PLPRCR_S_SHIFT) | (6 << PLPRCR_MFI_SHIFT) | (2 << PLPRCR_PDF_SHIFT) | \ |
304 | 318 | PLPRCR_TEXPS) |
319 | +#elif MPC8XX_HZ == 66666666 | |
320 | +#define CFG_PLPRCR ((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \ | |
321 | + (1 << PLPRCR_S_SHIFT) | (8 << PLPRCR_MFI_SHIFT) | (2 << PLPRCR_PDF_SHIFT) | \ | |
322 | + PLPRCR_TEXPS) | |
305 | 323 | #else |
306 | 324 | #error unsupported CPU freq for XIN = 50MHz |
307 | 325 | #endif |
... | ... | @@ -363,6 +381,16 @@ |
363 | 381 | #define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH) |
364 | 382 | #define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_PS_8 | BR_V ) |
365 | 383 | |
384 | +#if CONFIG_NETPHONE_VERSION == 2 | |
385 | + | |
386 | +#define FLASH_BASE4_PRELIM 0x40080000 /* FLASH bank #1 */ | |
387 | + | |
388 | +#define CFG_OR4_REMAP (CFG_REMAP_OR_AM | CFG_OR_TIMING_FLASH) | |
389 | +#define CFG_OR4_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH) | |
390 | +#define CFG_BR4_PRELIM ((FLASH_BASE4_PRELIM & BR_BA_MSK) | BR_PS_8 | BR_V ) | |
391 | + | |
392 | +#endif | |
393 | + | |
366 | 394 | /* |
367 | 395 | * BR3 and OR3 (SDRAM) |
368 | 396 | * |
369 | 397 | |
... | ... | @@ -454,11 +482,9 @@ |
454 | 482 | |
455 | 483 | #define DSP_SIZE 0x00010000 /* 64K */ |
456 | 484 | #define NAND_SIZE 0x00010000 /* 64K */ |
457 | -#define ER_SIZE 0x00010000 /* 64K */ | |
458 | 485 | |
459 | 486 | #define DSP_BASE 0xF1000000 |
460 | 487 | #define NAND_BASE 0xF1010000 |
461 | -#define ER_BASE 0xF1020000 | |
462 | 488 | |
463 | 489 | /****************************************************************/ |
464 | 490 | |
465 | 491 | |
466 | 492 | |
467 | 493 | |
... | ... | @@ -507,11 +533,23 @@ |
507 | 533 | (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 18)); \ |
508 | 534 | } while(0) |
509 | 535 | |
536 | +#if CONFIG_NETPHONE_VERSION == 1 | |
510 | 537 | #define NAND_WAIT_READY(nand) \ |
511 | 538 | do { \ |
539 | + int _tries = 0; \ | |
512 | 540 | while ((((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pedat & (1 << (31 - 31))) == 0) \ |
513 | - ; \ | |
541 | + if (++_tries > 100000) \ | |
542 | + break; \ | |
514 | 543 | } while (0) |
544 | +#elif CONFIG_NETPHONE_VERSION == 2 | |
545 | +#define NAND_WAIT_READY(nand) \ | |
546 | + do { \ | |
547 | + int _tries = 0; \ | |
548 | + while ((((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 15))) == 0) \ | |
549 | + if (++_tries > 100000) \ | |
550 | + break; \ | |
551 | + } while (0) | |
552 | +#endif | |
515 | 553 | |
516 | 554 | #define WRITE_NAND_COMMAND(d, adr) \ |
517 | 555 | do { \ |
518 | 556 | |
... | ... | @@ -533,7 +571,12 @@ |
533 | 571 | |
534 | 572 | /*****************************************************************************/ |
535 | 573 | |
574 | +#if CONFIG_NETPHONE_VERSION == 1 | |
536 | 575 | #define STATUS_LED_BIT 0x00000008 /* bit 28 */ |
576 | +#elif CONFIG_NETPHONE_VERSION == 2 | |
577 | +#define STATUS_LED_BIT 0x00000080 /* bit 24 */ | |
578 | +#endif | |
579 | + | |
537 | 580 | #define STATUS_LED_PERIOD (CFG_HZ / 2) |
538 | 581 | #define STATUS_LED_STATE STATUS_LED_BLINKING |
539 | 582 | |
... | ... | @@ -566,6 +609,13 @@ |
566 | 609 | |
567 | 610 | /*********************************************************************************************************** |
568 | 611 | |
612 | + ---------------------------------------------------------------------------------------------- | |
613 | + | |
614 | + (V1) version 1 of the board | |
615 | + (V2) version 2 of the board | |
616 | + | |
617 | + ---------------------------------------------------------------------------------------------- | |
618 | + | |
569 | 619 | Pin definitions: |
570 | 620 | |
571 | 621 | +------+----------------+--------+------------------------------------------------------------ |
572 | 622 | |
573 | 623 | |
574 | 624 | |
... | ... | @@ -585,20 +635,64 @@ |
585 | 635 | | PB30 | SPI_CLK | Output | SPI Clock |
586 | 636 | | PC10 | DISPA0 | Output | Display A0 |
587 | 637 | | PC11 | BACKLIGHT | Output | Display backlit |
588 | - | PC12 | SPI2RXD | Input | 2nd SPI RXD | |
589 | - | PC13 | SPI2TXD | Output | 2nd SPI TXD | |
590 | - | PC15 | SPI2CLK | Output | 2nd SPI CLK | |
638 | + | PC12 | SPI2RXD | Input | (V1) 2nd SPI RXD | |
639 | + | | IO_RESET | Output | (V2) General I/O reset | |
640 | + | PC13 | SPI2TXD | Output | (V1) 2nd SPI TXD (V1) | |
641 | + | | HOOK | Input | (V2) Hook input interrupt | |
642 | + | PC15 | SPI2CLK | Output | (V1) 2nd SPI CLK | |
643 | + | | F_RY_BY | Input | (V2) NAND F_RY_BY | |
591 | 644 | | PE17 | F_ALE | Output | NAND F_ALE |
592 | 645 | | PE18 | F_CLE | Output | NAND F_CLE |
593 | 646 | | PE20 | F_CE | Output | NAND F_CE |
594 | - | PE24 | SPICS_SCOUT | Output | Codec chip select | |
647 | + | PE24 | SPICS_SCOUT | Output | (V1) Codec chip select | |
648 | + | | LED | Output | (V2) LED | |
595 | 649 | | PE27 | SPICS_ER | Output | External serial register CS |
596 | - | PE28 | LEDIO1 | Output | LED | |
597 | - | PE29 | LEDIO2 | Output | LED hook for A (TA2) | |
598 | - | PE30 | LEDIO3 | Output | LED hook for A (TA2) | |
599 | - | PE31 | F_RY_BY | Input | NAND F_RY_BY | |
650 | + | PE28 | LEDIO1 | Output | (V1) LED | |
651 | + | | BKBR1 | Input | (V2) Keyboard input scan | |
652 | + | PE29 | LEDIO2 | Output | (V1) LED hook for A (TA2) | |
653 | + | | BKBR2 | Input | (V2) Keyboard input scan | |
654 | + | PE30 | LEDIO3 | Output | (V1) LED hook for A (TA2) | |
655 | + | | BKBR3 | Input | (V2) Keyboard input scan | |
656 | + | PE31 | F_RY_BY | Input | (V1) NAND F_RY_BY | |
657 | + | | BKBR4 | Input | (V2) Keyboard input scan | |
600 | 658 | +------+----------------+--------+--------------------------------------------------- |
601 | 659 | |
660 | + ---------------------------------------------------------------------------------------------- | |
661 | + | |
662 | + Serial register input: | |
663 | + | |
664 | + +------+----------------+------------------------------------------------------------ | |
665 | + | # | Name | Comment | |
666 | + +------+----------------+------------------------------------------------------------ | |
667 | + | 0 | BKBR1 | (V1) Keyboard input scan | |
668 | + | 1 | BKBR3 | (V1) Keyboard input scan | |
669 | + | 2 | BKBR4 | (V1) Keyboard input scan | |
670 | + | 3 | BKBR2 | (V1) Keyboard input scan | |
671 | + | 4 | HOOK | (V1) Hook switch | |
672 | + | 5 | BT_LINK | (V1) Bluetooth link status | |
673 | + | 6 | HOST_WAKE | (V1) Bluetooth host wake up | |
674 | + | 7 | OK_ETH | (V1) Cisco inline power OK status | |
675 | + +------+----------------+------------------------------------------------------------ | |
676 | + | |
677 | + ---------------------------------------------------------------------------------------------- | |
678 | + | |
679 | + Serial register output: | |
680 | + | |
681 | + +------+----------------+------------------------------------------------------------ | |
682 | + | # | Name | Comment | |
683 | + +------+----------------+------------------------------------------------------------ | |
684 | + | 0 | KEY1 | Keyboard output scan | |
685 | + | 1 | KEY2 | Keyboard output scan | |
686 | + | 2 | KEY3 | Keyboard output scan | |
687 | + | 3 | KEY4 | Keyboard output scan | |
688 | + | 4 | KEY5 | Keyboard output scan | |
689 | + | 5 | KEY6 | Keyboard output scan | |
690 | + | 6 | KEY7 | Keyboard output scan | |
691 | + | 7 | BT_WAKE | Bluetooth wake up | |
692 | + +------+----------------+------------------------------------------------------------ | |
693 | + | |
694 | + ---------------------------------------------------------------------------------------------- | |
695 | + | |
602 | 696 | Chip selects: |
603 | 697 | |
604 | 698 | +------+----------------+------------------------------------------------------------ |
605 | 699 | |
... | ... | @@ -608,8 +702,11 @@ |
608 | 702 | | CS1 | CS_FLASH | NAND flash |
609 | 703 | | CS2 | CS_DSP | DSP |
610 | 704 | | CS3 | DCS_DRAM | DRAM |
705 | + | CS4 | CS_FLASH2 | (V2) 2nd flash | |
611 | 706 | +------+----------------+------------------------------------------------------------ |
612 | 707 | |
708 | + ---------------------------------------------------------------------------------------------- | |
709 | + | |
613 | 710 | Interrupts: |
614 | 711 | |
615 | 712 | +------+----------------+------------------------------------------------------------ |
... | ... | @@ -621,6 +718,8 @@ |
621 | 718 | | IRQ7 | IRQ_MAX | MAX 3100 interrupt |
622 | 719 | +------+----------------+------------------------------------------------------------ |
623 | 720 | |
721 | + ---------------------------------------------------------------------------------------------- | |
722 | + | |
624 | 723 | Interrupts on PCMCIA pins: |
625 | 724 | |
626 | 725 | +------+----------------+------------------------------------------------------------ |
... | ... | @@ -630,6 +729,8 @@ |
630 | 729 | | IP_A1| PHY2_LINK | Link status changed for #2 Ethernet interface |
631 | 730 | | IP_A2| RMII1_MDINT | PHY interrupt for #1 |
632 | 731 | | IP_A3| RMII2_MDINT | PHY interrupt for #2 |
732 | + | IP_A5| HOST_WAKE | (V2) Bluetooth host wake | |
733 | + | IP_A6| OK_ETH | (V2) Cisco inline power OK | |
633 | 734 | +------+----------------+------------------------------------------------------------ |
634 | 735 | |
635 | 736 | *************************************************************************************************/ |
... | ... | @@ -691,5 +792,12 @@ |
691 | 792 | |
692 | 793 | /*************************************************************************************************/ |
693 | 794 | |
795 | +#define CONFIG_CRC32_VERIFY 1 | |
796 | + | |
797 | +/*************************************************************************************************/ | |
798 | + | |
799 | +#define CONFIG_HUSH_OLD_PARSER_COMPATIBLE 1 | |
800 | + | |
801 | +/*************************************************************************************************/ | |
694 | 802 | #endif /* __CONFIG_H */ |
include/configs/NETTA.h
... | ... | @@ -117,6 +117,7 @@ |
117 | 117 | CFG_CMD_MII | \ |
118 | 118 | CFG_CMD_PCMCIA | CFG_CMD_IDE | CFG_CMD_FAT | \ |
119 | 119 | CFG_CMD_DIAG | \ |
120 | + CFG_CMD_NFS | \ | |
120 | 121 | CFG_CMD_CDP \ |
121 | 122 | ) |
122 | 123 | |
... | ... | @@ -739,6 +740,14 @@ |
739 | 740 | /*************************************************************************************************/ |
740 | 741 | |
741 | 742 | #define CONFIG_AUTO_COMPLETE 1 |
743 | + | |
744 | +/*************************************************************************************************/ | |
745 | + | |
746 | +#define CONFIG_CRC32_VERIFY 1 | |
747 | + | |
748 | +/*************************************************************************************************/ | |
749 | + | |
750 | +#define CONFIG_HUSH_OLD_PARSER_COMPATIBLE 1 | |
742 | 751 | |
743 | 752 | /*************************************************************************************************/ |
744 | 753 |
-
mentioned in commit 8c4e3b