Commit c571d6828d980e555ba40baf85aab45b39e118ee
Committed by
Stefano Babic
1 parent
aa723b8dbf
Exists in
v2017.01-smarct4x
and in
25 other branches
power: pmic: add Ricoh RN5T567 PMIC support
Add device model enabled PMIC driver for Ricoh RN5T567 PMIC used on Colibri iMX7. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Showing 5 changed files with 203 additions and 0 deletions Side-by-side Diff
doc/device-tree-bindings/pmic/rn5t567.txt
1 | +Ricoh RN5T567 PMIC | |
2 | + | |
3 | +This file describes the binding info for the PMIC driver. | |
4 | + | |
5 | +Required properties: | |
6 | +- compatible: "ricoh,rn5t567" | |
7 | +- reg: depending on strapping, e.g. 0x33 | |
8 | + | |
9 | +With those two properties, the PMIC device can be used to read/write | |
10 | +registers. | |
11 | + | |
12 | +Example: | |
13 | + | |
14 | +rn5t567@33 { | |
15 | + compatible = "ricoh,rn5t567"; | |
16 | + reg = <0x33>; | |
17 | +}; |
drivers/power/pmic/Kconfig
... | ... | @@ -127,6 +127,14 @@ |
127 | 127 | driver provides basic register access and sets up the attached |
128 | 128 | regulators if regulator support is enabled. |
129 | 129 | |
130 | +config PMIC_RN5T567 | |
131 | + bool "Enable driver for Ricoh RN5T567 PMIC" | |
132 | + depends on DM_PMIC | |
133 | + ---help--- | |
134 | + The RN5T567 is a PMIC with 4 step-down DC/DC converters, 5 LDO | |
135 | + regulators Real-Time Clock and 4 GPIOs. This driver provides | |
136 | + register access only. | |
137 | + | |
130 | 138 | config PMIC_TPS65090 |
131 | 139 | bool "Enable driver for Texas Instruments TPS65090 PMIC" |
132 | 140 | depends on DM_PMIC |
drivers/power/pmic/Makefile
... | ... | @@ -13,6 +13,7 @@ |
13 | 13 | obj-$(CONFIG_PMIC_ACT8846) += act8846.o |
14 | 14 | obj-$(CONFIG_PMIC_PM8916) += pm8916.o |
15 | 15 | obj-$(CONFIG_PMIC_RK808) += rk808.o |
16 | +obj-$(CONFIG_PMIC_RN5T567) += rn5t567.o | |
16 | 17 | obj-$(CONFIG_PMIC_TPS65090) += tps65090.o |
17 | 18 | obj-$(CONFIG_PMIC_S5M8767) += s5m8767.o |
18 | 19 |
drivers/power/pmic/rn5t567.c
1 | +/* | |
2 | + * Copyright (C) 2016 Toradex AG | |
3 | + * Stefan Agner <stefan.agner@toradex.com> | |
4 | + * | |
5 | + * SPDX-License-Identifier: GPL-2.0+ | |
6 | + */ | |
7 | + | |
8 | +#include <common.h> | |
9 | +#include <dm.h> | |
10 | +#include <errno.h> | |
11 | +#include <fdtdec.h> | |
12 | +#include <libfdt.h> | |
13 | +#include <power/rn5t567_pmic.h> | |
14 | +#include <power/pmic.h> | |
15 | + | |
16 | +static int rn5t567_reg_count(struct udevice *dev) | |
17 | +{ | |
18 | + return RN5T567_NUM_OF_REGS; | |
19 | +} | |
20 | + | |
21 | +static int rn5t567_write(struct udevice *dev, uint reg, const uint8_t *buff, | |
22 | + int len) | |
23 | +{ | |
24 | + int ret; | |
25 | + | |
26 | + ret = dm_i2c_write(dev, reg, buff, len); | |
27 | + if (ret) { | |
28 | + debug("write error to device: %p register: %#x!", dev, reg); | |
29 | + return ret; | |
30 | + } | |
31 | + | |
32 | + return 0; | |
33 | +} | |
34 | + | |
35 | +static int rn5t567_read(struct udevice *dev, uint reg, uint8_t *buff, int len) | |
36 | +{ | |
37 | + int ret; | |
38 | + | |
39 | + ret = dm_i2c_read(dev, reg, buff, len); | |
40 | + if (ret) { | |
41 | + debug("read error from device: %p register: %#x!", dev, reg); | |
42 | + return ret; | |
43 | + } | |
44 | + | |
45 | + return 0; | |
46 | +} | |
47 | + | |
48 | +static struct dm_pmic_ops rn5t567_ops = { | |
49 | + .reg_count = rn5t567_reg_count, | |
50 | + .read = rn5t567_read, | |
51 | + .write = rn5t567_write, | |
52 | +}; | |
53 | + | |
54 | +static const struct udevice_id rn5t567_ids[] = { | |
55 | + { .compatible = "ricoh,rn5t567" }, | |
56 | + { } | |
57 | +}; | |
58 | + | |
59 | +U_BOOT_DRIVER(pmic_rn5t567) = { | |
60 | + .name = "rn5t567 pmic", | |
61 | + .id = UCLASS_PMIC, | |
62 | + .of_match = rn5t567_ids, | |
63 | + .ops = &rn5t567_ops, | |
64 | +}; |
include/power/rn5t567_pmic.h
1 | +/* | |
2 | + * Copyright (C) 2016 Toradex AG | |
3 | + * Stefan Agner <stefan.agner@toradex.com> | |
4 | + * | |
5 | + * SPDX-License-Identifier: GPL-2.0+ | |
6 | + */ | |
7 | +#ifndef __RN5T567_PMIC_H_ | |
8 | +#define __RN5T567_PMIC_H_ | |
9 | + | |
10 | +/* RN5T567 registers */ | |
11 | +enum { | |
12 | + RN5T567_LSIVER = 0x00, | |
13 | + RN5T567_OTPVER = 0x01, | |
14 | + RN5T567_IODAC = 0x02, | |
15 | + RN5T567_VINDAC = 0x03, | |
16 | + RN5T567_OUT32KEN = 0x05, | |
17 | + | |
18 | + RN5T567_CPUCNT = 0x06, | |
19 | + | |
20 | + RN5T567_PSWR = 0x07, | |
21 | + RN5T567_PONHIS = 0x09, | |
22 | + RN5T567_POFFHIS = 0x0A, | |
23 | + RN5T567_WATCHDOG = 0x0B, | |
24 | + RN5T567_WATCHDOGCNT = 0x0C, | |
25 | + RN5T567_PWRFUNC = 0x0D, | |
26 | + RN5T567_SLPCNT = 0x0E, | |
27 | + RN5T567_REPCNT = 0x0F, | |
28 | + RN5T567_PWRONTIMSET = 0x10, | |
29 | + RN5T567_NOETIMSETCNT = 0x11, | |
30 | + RN5T567_PWRIREN = 0x12, | |
31 | + RN5T567_PWRIRQ = 0x13, | |
32 | + RN5T567_PWRMON = 0x14, | |
33 | + RN5T567_PWRIRSEL = 0x15, | |
34 | + | |
35 | + RN5T567_DC1_SLOT = 0x16, | |
36 | + RN5T567_DC2_SLOT = 0x17, | |
37 | + RN5T567_DC3_SLOT = 0x18, | |
38 | + RN5T567_DC4_SLOT = 0x19, | |
39 | + | |
40 | + RN5T567_LDO1_SLOT = 0x1B, | |
41 | + RN5T567_LDO2_SLOT = 0x1C, | |
42 | + RN5T567_LDO3_SLOT = 0x1D, | |
43 | + RN5T567_LDO4_SLOT = 0x1E, | |
44 | + RN5T567_LDO5_SLOT = 0x1F, | |
45 | + | |
46 | + RN5T567_PSO0_SLOT = 0x25, | |
47 | + RN5T567_PSO1_SLOT = 0x26, | |
48 | + RN5T567_PSO2_SLOT = 0x27, | |
49 | + RN5T567_PSO3_SLOT = 0x28, | |
50 | + | |
51 | + RN5T567_LDORTC1_SLOT = 0x2A, | |
52 | + | |
53 | + RN5T567_DC1CTL = 0x2C, | |
54 | + RN5T567_DC1CTL2 = 0x2D, | |
55 | + RN5T567_DC2CTL = 0x2E, | |
56 | + RN5T567_DC2CTL2 = 0x2F, | |
57 | + RN5T567_DC3CTL = 0x30, | |
58 | + RN5T567_DC3CTL2 = 0x31, | |
59 | + RN5T567_DC4CTL = 0x32, | |
60 | + RN5T567_DC4CTL2 = 0x33, | |
61 | + | |
62 | + RN5T567_DC1DAC = 0x36, | |
63 | + RN5T567_DC2DAC = 0x37, | |
64 | + RN5T567_DC3DAC = 0x38, | |
65 | + RN5T567_DC4DAC = 0x39, | |
66 | + | |
67 | + RN5T567_DC1DAC_SLP = 0x3B, | |
68 | + RN5T567_DC2DAC_SLP = 0x3C, | |
69 | + RN5T567_DC3DAC_SLP = 0x3D, | |
70 | + RN5T567_DC4DAC_SLP = 0x3E, | |
71 | + | |
72 | + RN5T567_DCIREN = 0x40, | |
73 | + RN5T567_DCIRQ = 0x41, | |
74 | + RN5T567_DCIRMON = 0x42, | |
75 | + | |
76 | + RN5T567_LDOEN1 = 0x44, | |
77 | + RN5T567_LDOEN2 = 0x45, | |
78 | + RN5T567_LDODIS1 = 0x46, | |
79 | + | |
80 | + RN5T567_LDO1DAC = 0x4C, | |
81 | + RN5T567_LDO2DAC = 0x4D, | |
82 | + RN5T567_LDO3DAC = 0x4E, | |
83 | + RN5T567_LDO4DAC = 0x4F, | |
84 | + RN5T567_LDO5DAC = 0x50, | |
85 | + | |
86 | + RN5T567_LDORTC1DAC = 0x56, | |
87 | + RN5T567_LDORTC2DAC = 0x57, | |
88 | + | |
89 | + RN5T567_LDO1DAC_SLP = 0x58, | |
90 | + RN5T567_LDO2DAC_SLP = 0x59, | |
91 | + RN5T567_LDO3DAC_SLP = 0x5A, | |
92 | + RN5T567_LDO4DAC_SLP = 0x5B, | |
93 | + RN5T567_LDO5DAC_SLP = 0x5C, | |
94 | + | |
95 | + RN5T567_IOSEL = 0x90, | |
96 | + RN5T567_IOOUT = 0x91, | |
97 | + RN5T567_GPEDGE1 = 0x92, | |
98 | + RN5T567_EN_GPIR = 0x94, | |
99 | + RN5T567_IR_GPR = 0x95, | |
100 | + RN5T567_IR_GPF = 0x96, | |
101 | + RN5T567_MON_IOIN = 0x97, | |
102 | + RN5T567_GPLED_FUNC = 0x98, | |
103 | + RN5T567_INTPOL = 0x9C, | |
104 | + RN5T567_INTEN = 0x9D, | |
105 | + RN5T567_INTMON = 0x9E, | |
106 | + | |
107 | + RN5T567_PREVINDAC = 0xB0, | |
108 | + RN5T567_OVTEMP = 0xBC, | |
109 | + | |
110 | + RN5T567_NUM_OF_REGS = 0xBF, | |
111 | +}; | |
112 | + | |
113 | +#endif |