sandbox: Add 64-bit sandbox

To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org>

sandbox: Add 64-bit sandbox
To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org>
Mario Six · Simon Glass
1 parent 995b60b593
Showing 12 changed files with 571 additions and 17 deletions Side-by-side Diff
arch/sandbox/Kconfig
arch/sandbox/cpu/cpu.c
arch/sandbox/dts/Makefile
arch/sandbox/dts/sandbox64.dts
arch/sandbox/include/asm/io.h
arch/sandbox/include/asm/types.h
board/sandbox/MAINTAINERS
board/sandbox/README.sandbox
cmd/demo.c
configs/sandbox64_defconfig
drivers/demo/demo-simple.c
include/fdtdec.h
@@ -10,6 +10,11 @@
 config SYS_CPU
 	default "sandbox"
  
+config SANDBOX64
+	bool "Use 64-bit addresses"
+	select PHYS_64BIT
+	select HOST_64BIT
+
 config SANDBOX_SPL
 	bool "Enable SPL for sandbox"
 	select SUPPORT_SPL
  
  
  
  
@@ -20,25 +25,26 @@
  
 choice
 	prompt "Run sandbox on 32/64-bit host"
-	default SANDBOX_64BIT
+	default HOST_64BIT
 	help
 	  Sandbox can be built on 32-bit and 64-bit hosts.
 	  The default is to build on a 64-bit host and run
 	  on a 64-bit host. If you want to run sandbox on
 	  a 32-bit host, change it here.
  
-config SANDBOX_32BIT
+config HOST_32BIT
 	bool "32-bit host"
+	depends on !PHYS_64BIT
  
-config SANDBOX_64BIT
+config HOST_64BIT
 	bool "64-bit host"
  
 endchoice
  
 config SANDBOX_BITS_PER_LONG
 	int
-	default 32 if SANDBOX_32BIT
-	default 64 if SANDBOX_64BIT
+	default 32 if HOST_32BIT
+	default 64 if HOST_64BIT
  
 endmenu
@@ -76,7 +76,7 @@
 	if (enable_pci_map && !pci_map_physmem(paddr, &len, &map_dev, &ptr)) {
 		if (plen != len) {
 			printf("%s: Warning: partial map at %x, wanted %lx, got %lx\n",
-			       __func__, paddr, len, plen);
+			       __func__, (uint)paddr, len, plen);
 		}
 		map_len = len;
 		return ptr;
@@ -2,7 +2,11 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
  
+ifdef CONFIG_SANDBOX64
+dtb-$(CONFIG_SANDBOX) += sandbox64.dtb
+else
 dtb-$(CONFIG_SANDBOX) += sandbox.dtb
+endif
 dtb-$(CONFIG_UT_DM) += test.dtb
  
 targets += $(dtb-y)
+/dts-v1/;
+
+#define USB_CLASS_HUB			9
+
+/ {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	model = "sandbox";
+
+	aliases {
+		eth5 = "/eth@90000000";
+		i2c0 = &i2c_0;
+		pci0 = &pci;
+		rtc0 = &rtc_0;
+	};
+
+	chosen {
+		stdout-path = "/serial";
+	};
+
+	cros_ec: cros-ec@0 {
+		reg = <0 0 0 0>;
+		compatible = "google,cros-ec-sandbox";
+
+		/*
+		 * This describes the flash memory within the EC. Note
+		 * that the STM32L flash erases to 0, not 0xff.
+		 */
+		#address-cells = <1>;
+		#size-cells = <1>;
+		flash@8000000 {
+			reg = <0x08000000 0x20000>;
+			erase-value = <0>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			/* Information for sandbox */
+			ro {
+				reg = <0 0xf000>;
+			};
+			wp-ro {
+				reg = <0xf000 0x1000>;
+			};
+			rw {
+				reg = <0x10000 0x10000>;
+			};
+		};
+	};
+
+	eth@10002000 {
+		compatible = "sandbox,eth";
+		reg = <0x0 0x10002000 0x0 0x1000>;
+		fake-host-hwaddr = [00 00 66 44 22 00];
+	};
+
+	eth@80000000 {
+		compatible = "sandbox,eth-raw";
+		reg = <0x0 0x80000000 0x0 0x1000>;
+		host-raw-interface = "eth0";
+	};
+
+	eth@90000000 {
+		compatible = "sandbox,eth-raw";
+		reg = <0x0 0x90000000 0x0 0x1000>;
+		host-raw-interface = "lo";
+	};
+
+	gpio_a: gpios@0 {
+		gpio-controller;
+		compatible = "sandbox,gpio";
+		#gpio-cells = <1>;
+		gpio-bank-name = "a";
+		sandbox,gpio-count = <20>;
+	};
+
+	gpio_b: gpios@1 {
+		gpio-controller;
+		compatible = "sandbox,gpio";
+		#gpio-cells = <2>;
+		gpio-bank-name = "b";
+		sandbox,gpio-count = <10>;
+	};
+
+	hexagon {
+		compatible = "demo-simple";
+		colour = "white";
+		sides = <6>;
+	};
+
+	i2c_0: i2c@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0 0 0 0>;
+		compatible = "sandbox,i2c";
+		clock-frequency = <400000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_i2c0>;
+		eeprom@2c {
+			reg = <0x2c>;
+			compatible = "i2c-eeprom";
+			emul {
+				compatible = "sandbox,i2c-eeprom";
+				sandbox,filename = "i2c.bin";
+				sandbox,size = <128>;
+			};
+		};
+
+		rtc_0: rtc@43 {
+			reg = <0x43>;
+			compatible = "sandbox-rtc";
+			emul {
+				compatible = "sandbox,i2c-rtc";
+			};
+		};
+		sandbox_pmic: sandbox_pmic {
+			reg = <0x40>;
+		};
+	};
+
+	lcd {
+		u-boot,dm-pre-reloc;
+		compatible = "sandbox,lcd-sdl";
+		xres = <1366>;
+		yres = <768>;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		iracibble {
+			gpios = <&gpio_a 1 0>;
+			label = "sandbox:red";
+		};
+
+		martinet {
+			gpios = <&gpio_a 2 0>;
+			label = "sandbox:green";
+		};
+	};
+
+	pci: pci-controller {
+		compatible = "sandbox,pci";
+		device_type = "pci";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges = <0x02000000 0 0x10000000 0 0x10000000 0 0x2000
+				0x01000000 0 0x20000000 0 0x20000000 0 0x2000>;
+		pci@1f,0 {
+			compatible = "pci-generic";
+			reg = <0xf800 0 0 0 0>;
+			emul@1f,0 {
+				compatible = "sandbox,swap-case";
+			};
+		};
+	};
+
+	pinctrl {
+		compatible = "sandbox,pinctrl";
+
+		pinctrl_i2c0: i2c0 {
+			groups = "i2c";
+			function = "i2c";
+			bias-pull-up;
+		};
+
+		pinctrl_serial0: uart0 {
+			groups = "serial_a";
+			function = "serial";
+		};
+	};
+
+	reset@1 {
+		compatible = "sandbox,reset";
+	};
+
+	spi@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0 0 0 0>;
+		compatible = "sandbox,spi";
+		cs-gpios = <0>, <&gpio_a 0>;
+		firmware_storage_spi: flash@0 {
+			reg = <0>;
+			compatible = "spansion,m25p16", "sandbox,spi-flash";
+			spi-max-frequency = <40000000>;
+			sandbox,filename = "spi.bin";
+		};
+	};
+
+	spl-test {
+		u-boot,dm-pre-reloc;
+		compatible = "sandbox,spl-test";
+		boolval;
+		intval = <1>;
+		intarray = <2 3 4>;
+		byteval = [05];
+		bytearray = [06];
+		longbytearray = [09 0a 0b 0c 0d 0e 0f 10 11];
+		stringval = "message";
+		stringarray = "multi-word", "message";
+	};
+
+	spl-test2 {
+		u-boot,dm-pre-reloc;
+		compatible = "sandbox,spl-test";
+		intval = <3>;
+		intarray = <5>;
+		byteval = [08];
+		bytearray = [01 23 34];
+		longbytearray = [09 0a 0b 0c];
+		stringval = "message2";
+		stringarray = "another", "multi-word", "message";
+	};
+
+	spl-test3 {
+		u-boot,dm-pre-reloc;
+		compatible = "sandbox,spl-test";
+		stringarray = "one";
+	};
+
+	spl-test4 {
+		u-boot,dm-pre-reloc;
+		compatible = "sandbox,spl-test.2";
+	};
+
+	square {
+		compatible = "demo-shape";
+		colour = "blue";
+		sides = <4>;
+	};
+
+	timer {
+		compatible = "sandbox,timer";
+		clock-frequency = <1000000>;
+	};
+
+	tpm {
+		compatible = "google,sandbox-tpm";
+	};
+
+	triangle {
+		compatible = "demo-shape";
+		colour = "cyan";
+		sides = <3>;
+		character = <83>;
+		light-gpios = <&gpio_a 2>, <&gpio_b 6 0>;
+	};
+
+	/* Needs to be available prior to relocation */
+	uart0: serial {
+		compatible = "sandbox,serial";
+		sandbox,text-colour = "cyan";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_serial0>;
+	};
+
+	usb@0 {
+		compatible = "sandbox,usb";
+		status = "disabled";
+		hub {
+			compatible = "sandbox,usb-hub";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			flash-stick {
+				reg = <0>;
+				compatible = "sandbox,usb-flash";
+			};
+		};
+	};
+
+	usb@1 {
+		compatible = "sandbox,usb";
+		hub {
+			compatible = "usb-hub";
+			usb,device-class = <USB_CLASS_HUB>;
+			hub-emul {
+				compatible = "sandbox,usb-hub";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				flash-stick {
+					reg = <0>;
+					compatible = "sandbox,usb-flash";
+					sandbox,filepath = "flash.bin";
+				};
+			};
+		};
+	};
+
+	usb@2 {
+		compatible = "sandbox,usb";
+		status = "disabled";
+	};
+
+	spmi: spmi@0 {
+		compatible = "sandbox,spmi";
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		pm8916@0 {
+			compatible = "qcom,spmi-pmic";
+			reg = <0x0 0x1>;
+			#address-cells = <0x1>;
+			#size-cells = <0x1>;
+
+			spmi_gpios: gpios@c000 {
+				compatible = "qcom,pm8916-gpio";
+				reg = <0xc000 0x400>;
+				gpio-controller;
+				gpio-count = <4>;
+				#gpio-cells = <2>;
+				gpio-bank-name="spmi";
+			};
+		};
+	};
+};
+
+#include "cros-ec-keyboard.dtsi"
+#include "sandbox_pmic.dtsi"
@@ -43,9 +43,15 @@
 #define readb(addr) ((void)addr, 0)
 #define readw(addr) ((void)addr, 0)
 #define readl(addr) ((void)addr, 0)
+#ifdef CONFIG_SANDBOX64
+#define readq(addr) ((void)addr, 0)
+#endif
 #define writeb(v, addr) ((void)addr)
 #define writew(v, addr) ((void)addr)
 #define writel(v, addr) ((void)addr)
+#ifdef CONFIG_SANDBOX64
+#define writeq(v, addr) ((void)addr)
+#endif
  
 /*
  * Clear and set bits in one shot. These macros can be used to clear and
@@ -51,14 +51,23 @@
 #endif
  
 /*
- * Number of bits in a C 'long' on this architecture. Set this to 32 when
- * building on a 32-bit machine.
+ * Number of bits in a C 'long' on this architecture.
  */
-#define BITS_PER_LONG	32
+#ifdef	CONFIG_PHYS64
+#define BITS_PER_LONG 64
+#else	/* CONFIG_PHYS64 */
+#define BITS_PER_LONG 32
+#endif	/* CONFIG_PHYS64 */
  
+#ifdef	CONFIG_PHYS64
+typedef unsigned long long dma_addr_t;
+typedef u64 phys_addr_t;
+typedef u64 phys_size_t;
+#else	/* CONFIG_PHYS64 */
 typedef unsigned long dma_addr_t;
 typedef u32 phys_addr_t;
 typedef u32 phys_size_t;
+#endif	/* CONFIG_PHYS64 */
  
 #endif /* __KERNEL__ */
  
@@ -5,6 +5,14 @@
 F:	include/configs/sandbox.h
 F:	configs/sandbox_defconfig
  
+SANDBOX64 BOARD
+M:	Simon Glass <sjg@chromium.org>
+M:	Mario Six <mario.six@gdsys.cc>
+S:	Maintained
+F:	board/sandbox/
+F:	include/configs/sandbox.h
+F:	configs/sandbox64_defconfig
+
 SANDBOX_NOBLK BOARD
 M:	Simon Glass <sjg@chromium.org>
 S:	Maintained
@@ -24,8 +24,11 @@
 CONFIG_SANDBOX_BIG_ENDIAN should be defined when running on big-endian
 machines.
  
-By default sandbox builds and runs on 64-bit hosts. If you are going to build
-and run sandbox on a 32-bit host, select CONFIG_SANDBOX_32BIT.
+There are two versions of the sandbox: One using 32-bit-wide integers, and one
+using 64-bit-wide integers. The 32-bit version can be build and run on either
+32 or 64-bit hosts by either selecting or deselecting CONFIG_SANDBOX_32BIT; by
+default, the sandbox it built for a 32-bit host. The sandbox using 64-bit-wide
+integers can only be built on 64-bit hosts.
  
 Note that standalone/API support is not available at present.
  
@@ -71,9 +71,9 @@
 	     dev;
 	     ret = uclass_next_device(&dev)) {
 		printf("entry %d - instance %08x, ops %08x, platdata %08x\n",
-		       i++, map_to_sysmem(dev),
-		       map_to_sysmem(dev->driver->ops),
-		       map_to_sysmem(dev_get_platdata(dev)));
+		       i++, (uint)map_to_sysmem(dev),
+		       (uint)map_to_sysmem(dev->driver->ops),
+		       (uint)map_to_sysmem(dev_get_platdata(dev)));
 	}
  
 	return cmd_process_error(cmdtp, ret);
+CONFIG_SYS_TEXT_BASE=0
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SANDBOX64=y
+CONFIG_DEFAULT_DEVICE_TREE="sandbox64"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_BOOTSTAGE_FDT=y
+CONFIG_BOOTSTAGE_STASH=y
+CONFIG_BOOTSTAGE_STASH_ADDR=0x0
+CONFIG_BOOTSTAGE_STASH_SIZE=0x4096
+CONFIG_CONSOLE_RECORD=y
+CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000
+CONFIG_SILENT_CONSOLE=y
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_PRE_CON_BUF_ADDR=0x100000
+CONFIG_LOG=y
+CONFIG_LOG_MAX_LEVEL=6
+CONFIG_CMD_CPU=y
+CONFIG_CMD_LICENSE=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_ENV_CALLBACK=y
+CONFIG_CMD_ENV_FLAGS=y
+CONFIG_LOOPW=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MX_CYCLIC=y
+CONFIG_CMD_DEMO=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
+CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_READ=y
+CONFIG_CMD_REMOTEPROC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TFTPSRV=y
+CONFIG_CMD_RARP=y
+CONFIG_CMD_CDP=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_ETHSW=y
+CONFIG_CMD_BMP=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_SOUND=y
+CONFIG_CMD_QFW=y
+CONFIG_CMD_BOOTSTAGE=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_TPM=y
+CONFIG_CMD_TPM_TEST=y
+CONFIG_CMD_BTRFS=y
+CONFIG_CMD_CBFS=y
+CONFIG_CMD_CRAMFS=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_LOG=y
+CONFIG_MAC_PARTITION=y
+CONFIG_AMIGA_PARTITION=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_HOSTFILE=y
+CONFIG_NETCONSOLE=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_DEVRES=y
+CONFIG_DEBUG_DEVRES=y
+CONFIG_ADC=y
+CONFIG_ADC_SANDBOX=y
+CONFIG_CLK=y
+CONFIG_CPU=y
+CONFIG_DM_DEMO=y
+CONFIG_DM_DEMO_SIMPLE=y
+CONFIG_DM_DEMO_SHAPE=y
+CONFIG_PM8916_GPIO=y
+CONFIG_SANDBOX_GPIO=y
+CONFIG_DM_I2C_COMPAT=y
+CONFIG_I2C_CROS_EC_TUNNEL=y
+CONFIG_I2C_CROS_EC_LDO=y
+CONFIG_DM_I2C_GPIO=y
+CONFIG_SYS_I2C_SANDBOX=y
+CONFIG_I2C_MUX=y
+CONFIG_SPL_I2C_MUX=y
+CONFIG_I2C_ARB_GPIO_CHALLENGE=y
+CONFIG_CROS_EC_KEYB=y
+CONFIG_I8042_KEYB=y
+CONFIG_LED=y
+CONFIG_LED_BLINK=y
+CONFIG_LED_GPIO=y
+CONFIG_DM_MAILBOX=y
+CONFIG_SANDBOX_MBOX=y
+CONFIG_MISC=y
+CONFIG_CROS_EC=y
+CONFIG_CROS_EC_I2C=y
+CONFIG_CROS_EC_LPC=y
+CONFIG_CROS_EC_SANDBOX=y
+CONFIG_CROS_EC_SPI=y
+CONFIG_PWRSEQ=y
+CONFIG_SPL_PWRSEQ=y
+CONFIG_I2C_EEPROM=y
+CONFIG_MMC_SANDBOX=y
+CONFIG_SPI_FLASH_SANDBOX=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DM_ETH=y
+CONFIG_NVME=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCI_SANDBOX=y
+CONFIG_PHY=y
+CONFIG_PHY_SANDBOX=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_ROCKCHIP_RK3036=y
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
+CONFIG_PINCTRL_SANDBOX=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_SANDBOX_POWER_DOMAIN=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_ACT8846=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_PMIC_MAX77686=y
+CONFIG_PMIC_PM8916=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_PMIC_S2MPS11=y
+CONFIG_DM_PMIC_SANDBOX=y
+CONFIG_PMIC_S5M8767=y
+CONFIG_PMIC_TPS65090=y
+CONFIG_DM_REGULATOR=y
+CONFIG_REGULATOR_ACT8846=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_MAX77686=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_REGULATOR_S5M8767=y
+CONFIG_DM_REGULATOR_SANDBOX=y
+CONFIG_REGULATOR_TPS65090=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SANDBOX=y
+CONFIG_RAM=y
+CONFIG_REMOTEPROC_SANDBOX=y
+CONFIG_DM_RESET=y
+CONFIG_SANDBOX_RESET=y
+CONFIG_DM_RTC=y
+CONFIG_SANDBOX_SERIAL=y
+CONFIG_SOUND=y
+CONFIG_SOUND_SANDBOX=y
+CONFIG_SANDBOX_SPI=y
+CONFIG_SPMI=y
+CONFIG_SPMI_SANDBOX=y
+CONFIG_SYSRESET=y
+CONFIG_TIMER=y
+CONFIG_TIMER_EARLY=y
+CONFIG_SANDBOX_TIMER=y
+CONFIG_TPM_TIS_SANDBOX=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EMUL=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_DM_VIDEO=y
+CONFIG_CONSOLE_ROTATION=y
+CONFIG_CONSOLE_TRUETYPE=y
+CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
+CONFIG_VIDEO_SANDBOX_SDL=y
+CONFIG_WDT=y
+CONFIG_WDT_SANDBOX=y
+CONFIG_FS_CBFS=y
+CONFIG_FS_CRAMFS=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_TPM=y
+CONFIG_LZ4=y
+CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_UNIT_TEST=y
+CONFIG_UT_TIME=y
+CONFIG_UT_DM=y
+CONFIG_UT_ENV=y
+CONFIG_UT_OVERLAY=y
@@ -17,7 +17,7 @@
 {
 	const struct dm_demo_pdata *pdata = dev_get_platdata(dev);
  
-	printf("Hello from %08x: %s %d\n", map_to_sysmem(dev), pdata->colour,
+	printf("Hello from %08x: %s %d\n", (uint)map_to_sysmem(dev), pdata->colour,
 	       pdata->sides);
  
 	return 0;
@@ -24,7 +24,7 @@
 typedef phys_addr_t fdt_addr_t;
 typedef phys_size_t fdt_size_t;
 #ifdef CONFIG_PHYS_64BIT
-#define FDT_ADDR_T_NONE (-1ULL)
+#define FDT_ADDR_T_NONE (-1U)
 #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
 #define fdt_size_to_cpu(reg) be64_to_cpu(reg)
 typedef fdt64_t fdt_val_t;
...	...	@@ -10,6 +10,11 @@
10	10	config SYS_CPU
11	11	default "sandbox"
12	12
	13	+config SANDBOX64
	14	+ bool "Use 64-bit addresses"
	15	+ select PHYS_64BIT
	16	+ select HOST_64BIT
	17	+
13	18	config SANDBOX_SPL
14	19	bool "Enable SPL for sandbox"
15	20	select SUPPORT_SPL
16	21
17	22
18	23
19	24
...	...	@@ -20,25 +25,26 @@
20	25
21	26	choice
22	27	prompt "Run sandbox on 32/64-bit host"
23		- default SANDBOX_64BIT
	28	+ default HOST_64BIT
24	29	help
25	30	Sandbox can be built on 32-bit and 64-bit hosts.
26	31	The default is to build on a 64-bit host and run
27	32	on a 64-bit host. If you want to run sandbox on
28	33	a 32-bit host, change it here.
29	34
30		-config SANDBOX_32BIT
	35	+config HOST_32BIT
31	36	bool "32-bit host"
	37	+ depends on !PHYS_64BIT
32	38
33		-config SANDBOX_64BIT
	39	+config HOST_64BIT
34	40	bool "64-bit host"
35	41
36	42	endchoice
37	43
38	44	config SANDBOX_BITS_PER_LONG
39	45	int
40		- default 32 if SANDBOX_32BIT
41		- default 64 if SANDBOX_64BIT
	46	+ default 32 if HOST_32BIT
	47	+ default 64 if HOST_64BIT
42	48
43	49	endmenu
...	...	@@ -76,7 +76,7 @@
76	76	if (enable_pci_map && !pci_map_physmem(paddr, &len, &map_dev, &ptr)) {
77	77	if (plen != len) {
78	78	printf("%s: Warning: partial map at %x, wanted %lx, got %lx\n",
79		- __func__, paddr, len, plen);
	79	+ __func__, (uint)paddr, len, plen);
80	80	}
81	81	map_len = len;
82	82	return ptr;
...	...	@@ -2,7 +2,11 @@
2	2	# SPDX-License-Identifier: GPL-2.0+
3	3	#
4	4
	5	+ifdef CONFIG_SANDBOX64
	6	+dtb-$(CONFIG_SANDBOX) += sandbox64.dtb
	7	+else
5	8	dtb-$(CONFIG_SANDBOX) += sandbox.dtb
	9	+endif
6	10	dtb-$(CONFIG_UT_DM) += test.dtb
7	11
8	12	targets += $(dtb-y)
	1	+/dts-v1/;
	2	+
	3	+#define USB_CLASS_HUB 9
	4	+
	5	+/ {
	6	+ #address-cells = <2>;
	7	+ #size-cells = <2>;
	8	+ model = "sandbox";
	9	+
	10	+ aliases {
	11	+ eth5 = "/eth@90000000";
	12	+ i2c0 = &i2c_0;
	13	+ pci0 = &pci;
	14	+ rtc0 = &rtc_0;
	15	+ };
	16	+
	17	+ chosen {
	18	+ stdout-path = "/serial";
	19	+ };
	20	+
	21	+ cros_ec: cros-ec@0 {
	22	+ reg = <0 0 0 0>;
	23	+ compatible = "google,cros-ec-sandbox";
	24	+
	25	+ /*
	26	+ * This describes the flash memory within the EC. Note
	27	+ * that the STM32L flash erases to 0, not 0xff.
	28	+ */
	29	+ #address-cells = <1>;
	30	+ #size-cells = <1>;
	31	+ flash@8000000 {
	32	+ reg = <0x08000000 0x20000>;
	33	+ erase-value = <0>;
	34	+ #address-cells = <1>;
	35	+ #size-cells = <1>;
	36	+
	37	+ /* Information for sandbox */
	38	+ ro {
	39	+ reg = <0 0xf000>;
	40	+ };
	41	+ wp-ro {
	42	+ reg = <0xf000 0x1000>;
	43	+ };
	44	+ rw {
	45	+ reg = <0x10000 0x10000>;
	46	+ };
	47	+ };
	48	+ };
	49	+
	50	+ eth@10002000 {
	51	+ compatible = "sandbox,eth";
	52	+ reg = <0x0 0x10002000 0x0 0x1000>;
	53	+ fake-host-hwaddr = [00 00 66 44 22 00];
	54	+ };
	55	+
	56	+ eth@80000000 {
	57	+ compatible = "sandbox,eth-raw";
	58	+ reg = <0x0 0x80000000 0x0 0x1000>;
	59	+ host-raw-interface = "eth0";
	60	+ };
	61	+
	62	+ eth@90000000 {
	63	+ compatible = "sandbox,eth-raw";
	64	+ reg = <0x0 0x90000000 0x0 0x1000>;
	65	+ host-raw-interface = "lo";
	66	+ };
	67	+
	68	+ gpio_a: gpios@0 {
	69	+ gpio-controller;
	70	+ compatible = "sandbox,gpio";
	71	+ #gpio-cells = <1>;
	72	+ gpio-bank-name = "a";
	73	+ sandbox,gpio-count = <20>;
	74	+ };
	75	+
	76	+ gpio_b: gpios@1 {
	77	+ gpio-controller;
	78	+ compatible = "sandbox,gpio";
	79	+ #gpio-cells = <2>;
	80	+ gpio-bank-name = "b";
	81	+ sandbox,gpio-count = <10>;
	82	+ };
	83	+
	84	+ hexagon {
	85	+ compatible = "demo-simple";
	86	+ colour = "white";
	87	+ sides = <6>;
	88	+ };
	89	+
	90	+ i2c_0: i2c@0 {
	91	+ #address-cells = <1>;
	92	+ #size-cells = <0>;
	93	+ reg = <0 0 0 0>;
	94	+ compatible = "sandbox,i2c";
	95	+ clock-frequency = <400000>;
	96	+ pinctrl-names = "default";
	97	+ pinctrl-0 = <&pinctrl_i2c0>;
	98	+ eeprom@2c {
	99	+ reg = <0x2c>;
	100	+ compatible = "i2c-eeprom";
	101	+ emul {
	102	+ compatible = "sandbox,i2c-eeprom";
	103	+ sandbox,filename = "i2c.bin";
	104	+ sandbox,size = <128>;
	105	+ };
	106	+ };
	107	+
	108	+ rtc_0: rtc@43 {
	109	+ reg = <0x43>;
	110	+ compatible = "sandbox-rtc";
	111	+ emul {
	112	+ compatible = "sandbox,i2c-rtc";
	113	+ };
	114	+ };
	115	+ sandbox_pmic: sandbox_pmic {
	116	+ reg = <0x40>;
	117	+ };
	118	+ };
	119	+
	120	+ lcd {
	121	+ u-boot,dm-pre-reloc;
	122	+ compatible = "sandbox,lcd-sdl";
	123	+ xres = <1366>;
	124	+ yres = <768>;
	125	+ };
	126	+
	127	+ leds {
	128	+ compatible = "gpio-leds";
	129	+
	130	+ iracibble {
	131	+ gpios = <&gpio_a 1 0>;
	132	+ label = "sandbox:red";
	133	+ };
	134	+
	135	+ martinet {
	136	+ gpios = <&gpio_a 2 0>;
	137	+ label = "sandbox:green";
	138	+ };
	139	+ };
	140	+
	141	+ pci: pci-controller {
	142	+ compatible = "sandbox,pci";
	143	+ device_type = "pci";
	144	+ #address-cells = <3>;
	145	+ #size-cells = <2>;
	146	+ ranges = <0x02000000 0 0x10000000 0 0x10000000 0 0x2000
	147	+ 0x01000000 0 0x20000000 0 0x20000000 0 0x2000>;
	148	+ pci@1f,0 {
	149	+ compatible = "pci-generic";
	150	+ reg = <0xf800 0 0 0 0>;
	151	+ emul@1f,0 {
	152	+ compatible = "sandbox,swap-case";
	153	+ };
	154	+ };
	155	+ };
	156	+
	157	+ pinctrl {
	158	+ compatible = "sandbox,pinctrl";
	159	+
	160	+ pinctrl_i2c0: i2c0 {
	161	+ groups = "i2c";
	162	+ function = "i2c";
	163	+ bias-pull-up;
	164	+ };
	165	+
	166	+ pinctrl_serial0: uart0 {
	167	+ groups = "serial_a";
	168	+ function = "serial";
	169	+ };
	170	+ };
	171	+
	172	+ reset@1 {
	173	+ compatible = "sandbox,reset";
	174	+ };
	175	+
	176	+ spi@0 {
	177	+ #address-cells = <1>;
	178	+ #size-cells = <0>;
	179	+ reg = <0 0 0 0>;
	180	+ compatible = "sandbox,spi";
	181	+ cs-gpios = <0>, <&gpio_a 0>;
	182	+ firmware_storage_spi: flash@0 {
	183	+ reg = <0>;
	184	+ compatible = "spansion,m25p16", "sandbox,spi-flash";
	185	+ spi-max-frequency = <40000000>;
	186	+ sandbox,filename = "spi.bin";
	187	+ };
	188	+ };
	189	+
	190	+ spl-test {
	191	+ u-boot,dm-pre-reloc;
	192	+ compatible = "sandbox,spl-test";
	193	+ boolval;
	194	+ intval = <1>;
	195	+ intarray = <2 3 4>;
	196	+ byteval = [05];
	197	+ bytearray = [06];
	198	+ longbytearray = [09 0a 0b 0c 0d 0e 0f 10 11];
	199	+ stringval = "message";
	200	+ stringarray = "multi-word", "message";
	201	+ };
	202	+
	203	+ spl-test2 {
	204	+ u-boot,dm-pre-reloc;
	205	+ compatible = "sandbox,spl-test";
	206	+ intval = <3>;
	207	+ intarray = <5>;
	208	+ byteval = [08];
	209	+ bytearray = [01 23 34];
	210	+ longbytearray = [09 0a 0b 0c];
	211	+ stringval = "message2";
	212	+ stringarray = "another", "multi-word", "message";
	213	+ };
	214	+
	215	+ spl-test3 {
	216	+ u-boot,dm-pre-reloc;
	217	+ compatible = "sandbox,spl-test";
	218	+ stringarray = "one";
	219	+ };
	220	+
	221	+ spl-test4 {
	222	+ u-boot,dm-pre-reloc;
	223	+ compatible = "sandbox,spl-test.2";
	224	+ };
	225	+
	226	+ square {
	227	+ compatible = "demo-shape";
	228	+ colour = "blue";
	229	+ sides = <4>;
	230	+ };
	231	+
	232	+ timer {
	233	+ compatible = "sandbox,timer";
	234	+ clock-frequency = <1000000>;
	235	+ };
	236	+
	237	+ tpm {
	238	+ compatible = "google,sandbox-tpm";
	239	+ };
	240	+
	241	+ triangle {
	242	+ compatible = "demo-shape";
	243	+ colour = "cyan";
	244	+ sides = <3>;
	245	+ character = <83>;
	246	+ light-gpios = <&gpio_a 2>, <&gpio_b 6 0>;
	247	+ };
	248	+
	249	+ /* Needs to be available prior to relocation */
	250	+ uart0: serial {
	251	+ compatible = "sandbox,serial";
	252	+ sandbox,text-colour = "cyan";
	253	+ pinctrl-names = "default";
	254	+ pinctrl-0 = <&pinctrl_serial0>;
	255	+ };
	256	+
	257	+ usb@0 {
	258	+ compatible = "sandbox,usb";
	259	+ status = "disabled";
	260	+ hub {
	261	+ compatible = "sandbox,usb-hub";
	262	+ #address-cells = <1>;
	263	+ #size-cells = <0>;
	264	+ flash-stick {
	265	+ reg = <0>;
	266	+ compatible = "sandbox,usb-flash";
	267	+ };
	268	+ };
	269	+ };
	270	+
	271	+ usb@1 {
	272	+ compatible = "sandbox,usb";
	273	+ hub {
	274	+ compatible = "usb-hub";
	275	+ usb,device-class = <USB_CLASS_HUB>;
	276	+ hub-emul {
	277	+ compatible = "sandbox,usb-hub";
	278	+ #address-cells = <1>;
	279	+ #size-cells = <0>;
	280	+ flash-stick {
	281	+ reg = <0>;
	282	+ compatible = "sandbox,usb-flash";
	283	+ sandbox,filepath = "flash.bin";
	284	+ };
	285	+ };
	286	+ };
	287	+ };
	288	+
	289	+ usb@2 {
	290	+ compatible = "sandbox,usb";
	291	+ status = "disabled";
	292	+ };
	293	+
	294	+ spmi: spmi@0 {
	295	+ compatible = "sandbox,spmi";
	296	+ #address-cells = <0x1>;
	297	+ #size-cells = <0x1>;
	298	+ pm8916@0 {
	299	+ compatible = "qcom,spmi-pmic";
	300	+ reg = <0x0 0x1>;
	301	+ #address-cells = <0x1>;
	302	+ #size-cells = <0x1>;
	303	+
	304	+ spmi_gpios: gpios@c000 {
	305	+ compatible = "qcom,pm8916-gpio";
	306	+ reg = <0xc000 0x400>;
	307	+ gpio-controller;
	308	+ gpio-count = <4>;
	309	+ #gpio-cells = <2>;
	310	+ gpio-bank-name="spmi";
	311	+ };
	312	+ };
	313	+ };
	314	+};
	315	+
	316	+#include "cros-ec-keyboard.dtsi"
	317	+#include "sandbox_pmic.dtsi"
...	...	@@ -43,9 +43,15 @@
43	43	#define readb(addr) ((void)addr, 0)
44	44	#define readw(addr) ((void)addr, 0)
45	45	#define readl(addr) ((void)addr, 0)
	46	+#ifdef CONFIG_SANDBOX64
	47	+#define readq(addr) ((void)addr, 0)
	48	+#endif
46	49	#define writeb(v, addr) ((void)addr)
47	50	#define writew(v, addr) ((void)addr)
48	51	#define writel(v, addr) ((void)addr)
	52	+#ifdef CONFIG_SANDBOX64
	53	+#define writeq(v, addr) ((void)addr)
	54	+#endif
49	55
50	56	/*
51	57	* Clear and set bits in one shot. These macros can be used to clear and
...	...	@@ -51,14 +51,23 @@
51	51	#endif
52	52
53	53	/*
54		- * Number of bits in a C 'long' on this architecture. Set this to 32 when
55		- * building on a 32-bit machine.
	54	+ * Number of bits in a C 'long' on this architecture.
56	55	*/
57		-#define BITS_PER_LONG 32
	56	+#ifdef CONFIG_PHYS64
	57	+#define BITS_PER_LONG 64
	58	+#else /* CONFIG_PHYS64 */
	59	+#define BITS_PER_LONG 32
	60	+#endif /* CONFIG_PHYS64 */
58	61
	62	+#ifdef CONFIG_PHYS64
	63	+typedef unsigned long long dma_addr_t;
	64	+typedef u64 phys_addr_t;
	65	+typedef u64 phys_size_t;
	66	+#else /* CONFIG_PHYS64 */
59	67	typedef unsigned long dma_addr_t;
60	68	typedef u32 phys_addr_t;
61	69	typedef u32 phys_size_t;
	70	+#endif /* CONFIG_PHYS64 */
62	71
63	72	#endif /* __KERNEL__ */
64	73
...	...	@@ -5,6 +5,14 @@
5	5	F: include/configs/sandbox.h
6	6	F: configs/sandbox_defconfig
7	7
	8	+SANDBOX64 BOARD
	9	+M: Simon Glass <sjg@chromium.org>
	10	+M: Mario Six <mario.six@gdsys.cc>
	11	+S: Maintained
	12	+F: board/sandbox/
	13	+F: include/configs/sandbox.h
	14	+F: configs/sandbox64_defconfig
	15	+
8	16	SANDBOX_NOBLK BOARD
9	17	M: Simon Glass <sjg@chromium.org>
10	18	S: Maintained
...	...	@@ -24,8 +24,11 @@
24	24	CONFIG_SANDBOX_BIG_ENDIAN should be defined when running on big-endian
25	25	machines.
26	26
27		-By default sandbox builds and runs on 64-bit hosts. If you are going to build
28		-and run sandbox on a 32-bit host, select CONFIG_SANDBOX_32BIT.
	27	+There are two versions of the sandbox: One using 32-bit-wide integers, and one
	28	+using 64-bit-wide integers. The 32-bit version can be build and run on either
	29	+32 or 64-bit hosts by either selecting or deselecting CONFIG_SANDBOX_32BIT; by
	30	+default, the sandbox it built for a 32-bit host. The sandbox using 64-bit-wide
	31	+integers can only be built on 64-bit hosts.
29	32
30	33	Note that standalone/API support is not available at present.
31	34
...	...	@@ -71,9 +71,9 @@
71	71	dev;
72	72	ret = uclass_next_device(&dev)) {
73	73	printf("entry %d - instance %08x, ops %08x, platdata %08x\n",
74		- i++, map_to_sysmem(dev),
75		- map_to_sysmem(dev->driver->ops),
76		- map_to_sysmem(dev_get_platdata(dev)));
	74	+ i++, (uint)map_to_sysmem(dev),
	75	+ (uint)map_to_sysmem(dev->driver->ops),
	76	+ (uint)map_to_sysmem(dev_get_platdata(dev)));
77	77	}
78	78
79	79	return cmd_process_error(cmdtp, ret);
	1	+CONFIG_SYS_TEXT_BASE=0
	2	+CONFIG_SYS_MALLOC_F_LEN=0x2000
	3	+CONFIG_SANDBOX64=y
	4	+CONFIG_DEFAULT_DEVICE_TREE="sandbox64"
	5	+CONFIG_DISTRO_DEFAULTS=y
	6	+CONFIG_ANDROID_BOOT_IMAGE=y
	7	+CONFIG_FIT=y
	8	+CONFIG_FIT_SIGNATURE=y
	9	+CONFIG_FIT_VERBOSE=y
	10	+CONFIG_BOOTSTAGE=y
	11	+CONFIG_BOOTSTAGE_REPORT=y
	12	+CONFIG_BOOTSTAGE_FDT=y
	13	+CONFIG_BOOTSTAGE_STASH=y
	14	+CONFIG_BOOTSTAGE_STASH_ADDR=0x0
	15	+CONFIG_BOOTSTAGE_STASH_SIZE=0x4096
	16	+CONFIG_CONSOLE_RECORD=y
	17	+CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000
	18	+CONFIG_SILENT_CONSOLE=y
	19	+CONFIG_PRE_CONSOLE_BUFFER=y
	20	+CONFIG_PRE_CON_BUF_ADDR=0x100000
	21	+CONFIG_LOG=y
	22	+CONFIG_LOG_MAX_LEVEL=6
	23	+CONFIG_CMD_CPU=y
	24	+CONFIG_CMD_LICENSE=y
	25	+CONFIG_CMD_BOOTZ=y
	26	+# CONFIG_CMD_ELF is not set
	27	+CONFIG_CMD_ASKENV=y
	28	+CONFIG_CMD_GREPENV=y
	29	+CONFIG_CMD_ENV_CALLBACK=y
	30	+CONFIG_CMD_ENV_FLAGS=y
	31	+CONFIG_LOOPW=y
	32	+CONFIG_CMD_MD5SUM=y
	33	+CONFIG_CMD_MEMINFO=y
	34	+CONFIG_CMD_MEMTEST=y
	35	+CONFIG_CMD_MX_CYCLIC=y
	36	+CONFIG_CMD_DEMO=y
	37	+CONFIG_CMD_GPIO=y
	38	+CONFIG_CMD_GPT=y
	39	+CONFIG_CMD_GPT_RENAME=y
	40	+CONFIG_CMD_IDE=y
	41	+CONFIG_CMD_I2C=y
	42	+CONFIG_CMD_PCI=y
	43	+CONFIG_CMD_READ=y
	44	+CONFIG_CMD_REMOTEPROC=y
	45	+CONFIG_CMD_SF=y
	46	+CONFIG_CMD_SPI=y
	47	+CONFIG_CMD_USB=y
	48	+CONFIG_CMD_TFTPPUT=y
	49	+CONFIG_CMD_TFTPSRV=y
	50	+CONFIG_CMD_RARP=y
	51	+CONFIG_CMD_CDP=y
	52	+CONFIG_CMD_SNTP=y
	53	+CONFIG_CMD_DNS=y
	54	+CONFIG_CMD_LINK_LOCAL=y
	55	+CONFIG_CMD_ETHSW=y
	56	+CONFIG_CMD_BMP=y
	57	+CONFIG_CMD_TIME=y
	58	+CONFIG_CMD_TIMER=y
	59	+CONFIG_CMD_SOUND=y
	60	+CONFIG_CMD_QFW=y
	61	+CONFIG_CMD_BOOTSTAGE=y
	62	+CONFIG_CMD_PMIC=y
	63	+CONFIG_CMD_REGULATOR=y
	64	+CONFIG_CMD_TPM=y
	65	+CONFIG_CMD_TPM_TEST=y
	66	+CONFIG_CMD_BTRFS=y
	67	+CONFIG_CMD_CBFS=y
	68	+CONFIG_CMD_CRAMFS=y
	69	+CONFIG_CMD_EXT4_WRITE=y
	70	+CONFIG_CMD_MTDPARTS=y
	71	+CONFIG_CMD_LOG=y
	72	+CONFIG_MAC_PARTITION=y
	73	+CONFIG_AMIGA_PARTITION=y
	74	+CONFIG_OF_CONTROL=y
	75	+CONFIG_OF_LIVE=y
	76	+CONFIG_OF_HOSTFILE=y
	77	+CONFIG_NETCONSOLE=y
	78	+CONFIG_REGMAP=y
	79	+CONFIG_SYSCON=y
	80	+CONFIG_DEVRES=y
	81	+CONFIG_DEBUG_DEVRES=y
	82	+CONFIG_ADC=y
	83	+CONFIG_ADC_SANDBOX=y
	84	+CONFIG_CLK=y
	85	+CONFIG_CPU=y
	86	+CONFIG_DM_DEMO=y
	87	+CONFIG_DM_DEMO_SIMPLE=y
	88	+CONFIG_DM_DEMO_SHAPE=y
	89	+CONFIG_PM8916_GPIO=y
	90	+CONFIG_SANDBOX_GPIO=y
	91	+CONFIG_DM_I2C_COMPAT=y
	92	+CONFIG_I2C_CROS_EC_TUNNEL=y
	93	+CONFIG_I2C_CROS_EC_LDO=y
	94	+CONFIG_DM_I2C_GPIO=y
	95	+CONFIG_SYS_I2C_SANDBOX=y
	96	+CONFIG_I2C_MUX=y
	97	+CONFIG_SPL_I2C_MUX=y
	98	+CONFIG_I2C_ARB_GPIO_CHALLENGE=y
	99	+CONFIG_CROS_EC_KEYB=y
	100	+CONFIG_I8042_KEYB=y
	101	+CONFIG_LED=y
	102	+CONFIG_LED_BLINK=y
	103	+CONFIG_LED_GPIO=y
	104	+CONFIG_DM_MAILBOX=y
	105	+CONFIG_SANDBOX_MBOX=y
	106	+CONFIG_MISC=y
	107	+CONFIG_CROS_EC=y
	108	+CONFIG_CROS_EC_I2C=y
	109	+CONFIG_CROS_EC_LPC=y
	110	+CONFIG_CROS_EC_SANDBOX=y
	111	+CONFIG_CROS_EC_SPI=y
	112	+CONFIG_PWRSEQ=y
	113	+CONFIG_SPL_PWRSEQ=y
	114	+CONFIG_I2C_EEPROM=y
	115	+CONFIG_MMC_SANDBOX=y
	116	+CONFIG_SPI_FLASH_SANDBOX=y
	117	+CONFIG_SPI_FLASH=y
	118	+CONFIG_SPI_FLASH_ATMEL=y
	119	+CONFIG_SPI_FLASH_EON=y
	120	+CONFIG_SPI_FLASH_GIGADEVICE=y
	121	+CONFIG_SPI_FLASH_MACRONIX=y
	122	+CONFIG_SPI_FLASH_SPANSION=y
	123	+CONFIG_SPI_FLASH_STMICRO=y
	124	+CONFIG_SPI_FLASH_SST=y
	125	+CONFIG_SPI_FLASH_WINBOND=y
	126	+CONFIG_DM_ETH=y
	127	+CONFIG_NVME=y
	128	+CONFIG_PCI=y
	129	+CONFIG_DM_PCI=y
	130	+CONFIG_DM_PCI_COMPAT=y
	131	+CONFIG_PCI_SANDBOX=y
	132	+CONFIG_PHY=y
	133	+CONFIG_PHY_SANDBOX=y
	134	+CONFIG_PINCTRL=y
	135	+CONFIG_PINCONF=y
	136	+CONFIG_PINCTRL_ROCKCHIP_RK3036=y
	137	+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
	138	+CONFIG_PINCTRL_SANDBOX=y
	139	+CONFIG_POWER_DOMAIN=y
	140	+CONFIG_SANDBOX_POWER_DOMAIN=y
	141	+CONFIG_DM_PMIC=y
	142	+CONFIG_PMIC_ACT8846=y
	143	+CONFIG_DM_PMIC_PFUZE100=y
	144	+CONFIG_DM_PMIC_MAX77686=y
	145	+CONFIG_PMIC_PM8916=y
	146	+CONFIG_PMIC_RK8XX=y
	147	+CONFIG_PMIC_S2MPS11=y
	148	+CONFIG_DM_PMIC_SANDBOX=y
	149	+CONFIG_PMIC_S5M8767=y
	150	+CONFIG_PMIC_TPS65090=y
	151	+CONFIG_DM_REGULATOR=y
	152	+CONFIG_REGULATOR_ACT8846=y
	153	+CONFIG_DM_REGULATOR_PFUZE100=y
	154	+CONFIG_DM_REGULATOR_MAX77686=y
	155	+CONFIG_DM_REGULATOR_FIXED=y
	156	+CONFIG_REGULATOR_RK8XX=y
	157	+CONFIG_REGULATOR_S5M8767=y
	158	+CONFIG_DM_REGULATOR_SANDBOX=y
	159	+CONFIG_REGULATOR_TPS65090=y
	160	+CONFIG_DM_PWM=y
	161	+CONFIG_PWM_SANDBOX=y
	162	+CONFIG_RAM=y
	163	+CONFIG_REMOTEPROC_SANDBOX=y
	164	+CONFIG_DM_RESET=y
	165	+CONFIG_SANDBOX_RESET=y
	166	+CONFIG_DM_RTC=y
	167	+CONFIG_SANDBOX_SERIAL=y
	168	+CONFIG_SOUND=y
	169	+CONFIG_SOUND_SANDBOX=y
	170	+CONFIG_SANDBOX_SPI=y
	171	+CONFIG_SPMI=y
	172	+CONFIG_SPMI_SANDBOX=y
	173	+CONFIG_SYSRESET=y
	174	+CONFIG_TIMER=y
	175	+CONFIG_TIMER_EARLY=y
	176	+CONFIG_SANDBOX_TIMER=y
	177	+CONFIG_TPM_TIS_SANDBOX=y
	178	+CONFIG_USB=y
	179	+CONFIG_DM_USB=y
	180	+CONFIG_USB_EMUL=y
	181	+CONFIG_USB_STORAGE=y
	182	+CONFIG_USB_KEYBOARD=y
	183	+CONFIG_DM_VIDEO=y
	184	+CONFIG_CONSOLE_ROTATION=y
	185	+CONFIG_CONSOLE_TRUETYPE=y
	186	+CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
	187	+CONFIG_VIDEO_SANDBOX_SDL=y
	188	+CONFIG_WDT=y
	189	+CONFIG_WDT_SANDBOX=y
	190	+CONFIG_FS_CBFS=y
	191	+CONFIG_FS_CRAMFS=y
	192	+CONFIG_CMD_DHRYSTONE=y
	193	+CONFIG_TPM=y
	194	+CONFIG_LZ4=y
	195	+CONFIG_ERRNO_STR=y
	196	+CONFIG_OF_LIBFDT_OVERLAY=y
	197	+CONFIG_UNIT_TEST=y
	198	+CONFIG_UT_TIME=y
	199	+CONFIG_UT_DM=y
	200	+CONFIG_UT_ENV=y
	201	+CONFIG_UT_OVERLAY=y