Commit c70afc348ee9fae242f00be56cde556822f93156

Authored by Abel Vesa
1 parent ab8d565f8a

MLK-19219-4 iMX8QXP/QM: Add support to get container image set size from QSPI

This transforms almost all related functions from mmc specific to device
independent. This allows the container size to be computed from QSPI and other
future devices that will be supported for boot.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>

Showing 3 changed files with 75 additions and 21 deletions Side-by-side Diff

arch/arm/include/asm/arch-imx8/image.h
... ... @@ -8,6 +8,7 @@
8 8  
9 9 #define CONTAINER_HDR_ALIGNMENT 0x400
10 10 #define CONTAINER_HDR_MMCSD_OFFSET SZ_32K
  11 +#define CONTAINER_HDR_QSPI_OFFSET SZ_4K
11 12  
12 13 struct container_hdr{
13 14 uint8_t version;
arch/arm/mach-imx/imx8/image.c
... ... @@ -8,9 +8,13 @@
8 8 #include <asm/io.h>
9 9 #include <dm.h>
10 10 #include <mmc.h>
  11 +#include <spi_flash.h>
11 12 #include <asm/arch/image.h>
12 13  
13   -static int get_container_size(ulong addr)
  14 +#define MMC_DEV 0
  15 +#define QSPI_DEV 1
  16 +
  17 +static int __get_container_size(ulong addr)
14 18 {
15 19 struct container_hdr *phdr;
16 20 struct boot_img_t *img_entry;
17 21  
18 22  
19 23  
20 24  
... ... @@ -50,23 +54,58 @@
50 54 return max_offset;
51 55 }
52 56  
53   -static int mmc_get_imageset_end(struct mmc *mmc)
  57 +static int get_container_size(void *dev, int dev_type, unsigned long offset)
54 58 {
55   - int value_container[2];
56   - unsigned long count;
57 59 uint8_t *buf = malloc(CONTAINER_HDR_ALIGNMENT);
  60 + unsigned long count = 0;
  61 + int ret = 0;
  62 +
58 63 if (!buf) {
59 64 printf("Malloc buffer failed\n");
60 65 return -ENOMEM;
61 66 }
62 67  
63   - count = blk_dread(mmc_get_blk_desc(mmc), CONTAINER_HDR_MMCSD_OFFSET/mmc->read_bl_len, CONTAINER_HDR_ALIGNMENT/mmc->read_bl_len, buf);
64   - if (count == 0) {
65   - printf("Read container image from MMC/SD failed\n");
66   - return -EIO;
  68 + if (dev_type == MMC_DEV) {
  69 + struct mmc *mmc = (struct mmc*)dev;
  70 + count = blk_dread(mmc_get_blk_desc(mmc), offset/mmc->read_bl_len,
  71 + CONTAINER_HDR_ALIGNMENT/mmc->read_bl_len, buf);
  72 + if (count == 0) {
  73 + printf("Read container image from MMC/SD failed\n");
  74 + return -EIO;
  75 + }
  76 +#ifdef CONFIG_SPL_SPI_LOAD
  77 + } else if (dev_type == QSPI_DEV) {
  78 + struct spi_flash *flash = (struct spi_flash *)dev;
  79 + ret = spi_flash_read(flash, offset,
  80 + CONTAINER_HDR_ALIGNMENT, buf);
  81 + if (ret != 0) {
  82 + printf("Read container image from QSPI failed\n");
  83 + return -EIO;
  84 + }
  85 +#endif
67 86 }
68 87  
69   - value_container[0] = get_container_size((ulong)buf);
  88 + ret = __get_container_size((ulong)buf);
  89 +
  90 + free(buf);
  91 +
  92 + return ret;
  93 +}
  94 +
  95 +static int get_imageset_end(void *dev, int dev_type)
  96 +{
  97 + unsigned long offset1 = 0, offset2 = 0;
  98 + int value_container[2];
  99 +
  100 + if (dev_type == MMC_DEV) {
  101 + offset1 = CONTAINER_HDR_MMCSD_OFFSET;
  102 + offset2 = CONTAINER_HDR_ALIGNMENT + offset1;
  103 + } else if (dev_type == QSPI_DEV) {
  104 + offset1 = CONTAINER_HDR_QSPI_OFFSET;
  105 + offset2 = CONTAINER_HDR_ALIGNMENT + offset1;
  106 + }
  107 +
  108 + value_container[0] = get_container_size(dev, dev_type, offset1);
70 109 if (value_container[0] < 0) {
71 110 printf("Parse seco container failed %d\n", value_container[0]);
72 111 return value_container[0];
73 112  
74 113  
75 114  
76 115  
... ... @@ -74,29 +113,34 @@
74 113  
75 114 debug("seco container size 0x%x\n", value_container[0]);
76 115  
77   - count = blk_dread(mmc_get_blk_desc(mmc), (CONTAINER_HDR_ALIGNMENT + CONTAINER_HDR_MMCSD_OFFSET)/mmc->read_bl_len,
78   - CONTAINER_HDR_ALIGNMENT/mmc->read_bl_len, buf);
79   - if (count == 0) {
80   - printf("Read container image from MMC/SD failed\n");
81   - return -EIO;
82   - }
83   -
84   - value_container[1] = get_container_size((ulong)buf);
  116 + value_container[1] = get_container_size(dev, dev_type, offset2);
85 117 if (value_container[1] < 0) {
86 118 debug("Parse scu container image failed %d, only seco container\n", value_container[1]);
87   - return value_container[0] + CONTAINER_HDR_MMCSD_OFFSET; /* return seco container total size */
  119 + return value_container[0] + offset1; /* return seco container total size */
88 120 }
89 121  
90 122 debug("scu container size 0x%x\n", value_container[1]);
91 123  
92   - return value_container[1] + (CONTAINER_HDR_ALIGNMENT + CONTAINER_HDR_MMCSD_OFFSET);
  124 + return value_container[1] + offset2;
93 125 }
94 126  
  127 +unsigned long spl_spi_get_uboot_raw_sector(struct spi_flash *flash)
  128 +{
  129 + int end;
  130 +
  131 + end = get_imageset_end(flash, QSPI_DEV);
  132 + end = ROUND(end, SZ_1K);
  133 +
  134 + printf("Load image from QSPI 0x%x\n", end);
  135 +
  136 + return end;
  137 +}
  138 +
95 139 unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc)
96 140 {
97 141 int end;
98 142  
99   - end = mmc_get_imageset_end(mmc);
  143 + end = get_imageset_end(mmc, MMC_DEV);
100 144 end = ROUND(end, SZ_1K);
101 145  
102 146 printf("Load image from MMC/SD 0x%x\n", end);
common/spl/spl_spi.c
... ... @@ -51,6 +51,13 @@
51 51 }
52 52 #endif
53 53  
  54 +#ifdef CONFIG_SYS_SPI_U_BOOT_OFFS
  55 +unsigned long __weak spl_spi_get_uboot_raw_sector(struct spi_flash *flash)
  56 +{
  57 + return CONFIG_SYS_SPI_U_BOOT_OFFS;
  58 +}
  59 +#endif
  60 +
54 61 static ulong spl_spi_fit_read(struct spl_load_info *load, ulong sector,
55 62 ulong count, void *buf)
56 63 {
... ... @@ -72,7 +79,7 @@
72 79 struct spl_boot_device *bootdev)
73 80 {
74 81 int err = 0;
75   - unsigned payload_offs = CONFIG_SYS_SPI_U_BOOT_OFFS;
  82 + unsigned payload_offs = 0;
76 83 struct spi_flash *flash;
77 84 struct image_header *header;
78 85  
... ... @@ -88,6 +95,8 @@
88 95 puts("SPI probe failed.\n");
89 96 return -ENODEV;
90 97 }
  98 +
  99 + payload_offs = spl_spi_get_uboot_raw_sector(flash);
91 100  
92 101 /* use CONFIG_SYS_TEXT_BASE as temporary storage area */
93 102 header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);