Eric Lee / smarc-uboot

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Commit c7ca8b07fcdd9af739fa3b1bfabe05d0da36c556

Authored by Gong Qianyu
Committed by York Sun
1 parent 8ef0d5c438
Exists in v2017.01-smarct4x and in 30 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

armv8/ls1043ardb: Add sd boot support 

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

Showing 8 changed files with 77 additions and 1 deletions Side-by-side Diff

board/freescale/ls1043ardb/README
Diff comments   View file @ c7ca8b0
... ... @@ -84,4 +84,5 @@
84 84 ---------------
85 85 a) NOR boot
86 86 b) NAND boot
  87 +c) SD boot
board/freescale/ls1043ardb/cpld.c
Diff comments   View file @ c7ca8b0
... ... @@ -61,6 +61,21 @@
61 61 CPLD_WRITE(system_rst, 1);
62 62 }
63 63  
  64 +void cpld_set_sd(void)
  65 +{
  66 + u16 reg = CPLD_CFG_RCW_SRC_SD;
  67 + u8 reg5 = (u8)(reg >> 1);
  68 + u8 reg6 = (u8)(reg & 1);
  69 +
  70 + cpld_rev_bit(&reg5);
  71 +
  72 + CPLD_WRITE(soft_mux_on, 1);
  73 +
  74 + CPLD_WRITE(cfg_rcw_src1, reg5);
  75 + CPLD_WRITE(cfg_rcw_src2, reg6);
  76 +
  77 + CPLD_WRITE(system_rst, 1);
  78 +}
64 79 #ifdef DEBUG
65 80 static void cpld_dump_regs(void)
66 81 {
... ... @@ -109,6 +124,8 @@
109 124 cpld_set_altbank();
110 125 else if (strcmp(argv[2], "nand") == 0)
111 126 cpld_set_nand();
  127 + else if (strcmp(argv[2], "sd") == 0)
  128 + cpld_set_sd();
112 129 else
113 130 cpld_set_defbank();
114 131 #ifdef DEBUG
... ... @@ -128,6 +145,7 @@
128 145 "reset: reset to default bank\n"
129 146 "cpld reset altbank: reset to alternate bank\n"
130 147 "cpld reset nand: reset to boot from NAND flash\n"
  148 + "cpld reset sd: reset to boot from SD card\n"
131 149 #ifdef DEBUG
132 150 "cpld dump - display the CPLD registers\n"
133 151 #endif
board/freescale/ls1043ardb/cpld.h
Diff comments   View file @ c7ca8b0
... ... @@ -41,5 +41,6 @@
41 41 #define CPLD_BANK_SEL_MASK 0x07
42 42 #define CPLD_BANK_SEL_ALTBANK 0x04
43 43 #define CPLD_CFG_RCW_SRC_NAND 0x106
  44 +#define CPLD_CFG_RCW_SRC_SD 0x040
44 45 #endif
board/freescale/ls1043ardb/ls1043ardb.c
Diff comments   View file @ c7ca8b0
... ... @@ -25,12 +25,17 @@
25 25 int checkboard(void)
26 26 {
27 27 static const char *freq[3] = {"100.00MHZ", "156.25MHZ"};
  28 +#ifndef CONFIG_SD_BOOT
28 29 u8 cfg_rcw_src1, cfg_rcw_src2;
29 30 u32 cfg_rcw_src;
  31 +#endif
30 32 u32 sd1refclk_sel;
31 33  
32 34 printf("Board: LS1043ARDB, boot from ");
33 35  
  36 +#ifdef CONFIG_SD_BOOT
  37 + puts("SD\n");
  38 +#else
34 39 cfg_rcw_src1 = CPLD_READ(cfg_rcw_src1);
35 40 cfg_rcw_src2 = CPLD_READ(cfg_rcw_src2);
36 41 cpld_rev_bit(&cfg_rcw_src1);
... ... @@ -43,6 +48,7 @@
43 48 puts("NAND\n");
44 49 else
45 50 printf("Invalid setting of SW4\n");
  51 +#endif
46 52  
47 53 printf("CPLD: V%x.%x\nPCBA: V%x.0\n", CPLD_READ(cpld_ver),
48 54 CPLD_READ(cpld_ver_sub), CPLD_READ(pcba_ver));
board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg
Diff comments   View file @ c7ca8b0
  1 +#PBL preamble and RCW header
  2 +aa55aa55 01ee0100
  3 +# RCW
  4 +0810000f 0c000000 00000000 00000000
  5 +14550002 80004012 60040000 61002000
  6 +00000000 00000000 00000000 00038800
  7 +00000000 00001100 00000096 00000001
configs/ls1043ardb_sdcard_defconfig
Diff comments   View file @ c7ca8b0
  1 +CONFIG_SPL=y
  2 +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SYS_FSL_DDR4"
  3 +CONFIG_ARM=y
  4 +CONFIG_TARGET_LS1043ARDB=y
include/configs/ls1043a_common.h
Diff comments   View file @ c7ca8b0
... ... @@ -60,6 +60,36 @@
60 60 #define CONFIG_BAUDRATE 115200
61 61 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
62 62  
  63 +/* SD boot SPL */
  64 +#ifdef CONFIG_SD_BOOT
  65 +#define CONFIG_SPL_FRAMEWORK
  66 +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
  67 +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
  68 +#define CONFIG_SPL_LIBCOMMON_SUPPORT
  69 +#define CONFIG_SPL_LIBGENERIC_SUPPORT
  70 +#define CONFIG_SPL_ENV_SUPPORT
  71 +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
  72 +#define CONFIG_SPL_WATCHDOG_SUPPORT
  73 +#define CONFIG_SPL_I2C_SUPPORT
  74 +#define CONFIG_SPL_SERIAL_SUPPORT
  75 +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
  76 +#define CONFIG_SPL_MMC_SUPPORT
  77 +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xf0
  78 +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x500
  79 +
  80 +#define CONFIG_SPL_TEXT_BASE 0x10000000
  81 +#define CONFIG_SPL_MAX_SIZE 0x1d000
  82 +#define CONFIG_SPL_STACK 0x1001e000
  83 +#define CONFIG_SPL_PAD_TO 0x1d000
  84 +
  85 +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \
  86 + CONFIG_SYS_MONITOR_LEN)
  87 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
  88 +#define CONFIG_SPL_BSS_START_ADDR 0x80100000
  89 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
  90 +#define CONFIG_SYS_MONITOR_LEN 0xa0000
  91 +#endif
  92 +
63 93 /* NAND SPL */
64 94 #ifdef CONFIG_NAND_BOOT
65 95 #define CONFIG_SPL_PBL_PAD
include/configs/ls1043ardb.h
Diff comments   View file @ c7ca8b0
... ... @@ -12,7 +12,7 @@
12 12 #define CONFIG_DISPLAY_CPUINFO
13 13 #define CONFIG_DISPLAY_BOARDINFO
14 14  
15   -#if defined(CONFIG_NAND_BOOT)
  15 +#if defined(CONFIG_NAND_BOOT) || defined(CONFIG_SD_BOOT)
16 16 #define CONFIG_SYS_TEXT_BASE 0x82000000
17 17 #else
18 18 #define CONFIG_SYS_TEXT_BASE 0x60100000
... ... @@ -45,6 +45,10 @@
45 45 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043ardb/ls1043ardb_rcw_nand.cfg
46 46 #endif
47 47  
  48 +#ifdef CONFIG_SD_BOOT
  49 +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg
  50 +#endif
  51 +
48 52 /*
49 53 * NOR Flash Definitions
50 54 */
... ... @@ -227,6 +231,11 @@
227 231 #define CONFIG_ENV_IS_IN_NAND
228 232 #define CONFIG_ENV_SIZE 0x2000
229 233 #define CONFIG_ENV_OFFSET (10 * CONFIG_SYS_NAND_BLOCK_SIZE)
  234 +#elif defined(CONFIG_SD_BOOT)
  235 +#define CONFIG_ENV_OFFSET (1024 * 1024)
  236 +#define CONFIG_ENV_IS_IN_MMC
  237 +#define CONFIG_SYS_MMC_ENV_DEV 0
  238 +#define CONFIG_ENV_SIZE 0x2000
230 239 #else
231 240 #define CONFIG_ENV_IS_IN_FLASH
232 241 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000)