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Commit c7d506d4ee477368d54f226065416648be08a60d

Authored by poonam aggrwal
Committed by York Sun
1 parent fb07c0a16d
Exists in v2017.01-smarct4x and in 48 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

85xx/b4860: Alternate serdes protocols for B4860/B4420 

On B4860 and B4420, some serdes protocols can be used with LC VCO as
well as Ring VCO options.

Addded Alternate options with LC VCO for such protocols.
For example protocol 0x2a on srds 1 becomes 0x29 if it is LC VCO.

The alternate option has the same functionality as the original option;
the only difference being LC VCO rather than Ring VCO.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

Showing 3 changed files with 36 additions and 0 deletions Side-by-side Diff

arch/powerpc/cpu/mpc85xx/b4860_serdes.c
Diff comments   View file @ c7d506d
... ... @@ -42,6 +42,8 @@
42 42 CPRI4, CPRI3, CPRI2, CPRI1}},
43 43 {0x12, {CPRI8, CPRI7, CPRI6, CPRI5,
44 44 CPRI4, CPRI3, CPRI2, CPRI1}},
  45 + {0x29, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6,
  46 + CPRI6, CPRI5, CPRI4, CPRI3, CPRI2, CPRI1} },
45 47 {0x2a, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6,
46 48 CPRI6, CPRI5, CPRI4, CPRI3, CPRI2, CPRI1}},
47 49 {0x2C, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6,
... ... @@ -50,6 +52,9 @@
50 52 CPRI6, CPRI5, CPRI4, CPRI3, CPRI2, CPRI1}},
51 53 {0x2E, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6,
52 54 CPRI6, CPRI5, CPRI4, CPRI3, CPRI2, CPRI1}},
  55 + {0x2F, {AURORA, AURORA,
  56 + SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
  57 + CPRI4, CPRI3, CPRI2, CPRI1} },
53 58 {0x30, {AURORA, AURORA,
54 59 SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
55 60 CPRI4, CPRI3, CPRI2, CPRI1}},
56 61  
... ... @@ -82,12 +87,18 @@
82 87 };
83 88 static struct serdes_config serdes2_cfg_tbl[] = {
84 89 /* SerDes 2 */
  90 + {0x17, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
  91 + SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
  92 + AURORA, AURORA, SRIO1, SRIO1} },
85 93 {0x18, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
86 94 SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
87 95 AURORA, AURORA, SRIO1, SRIO1}},
88 96 {0x1D, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
89 97 SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
90 98 AURORA, AURORA, SRIO1, SRIO1}},
  99 + {0x2A, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
  100 + SRIO2, SRIO2,
  101 + AURORA, AURORA, SRIO1, SRIO1} },
91 102 {0x2B, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
92 103 SRIO2, SRIO2,
93 104 AURORA, AURORA, SRIO1, SRIO1}},
... ... @@ -95,6 +106,9 @@
95 106 SRIO2, SRIO2,
96 107 AURORA, AURORA,
97 108 SRIO1, SRIO1}},
  109 + {0x48, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
  110 + SGMII_FM1_DTSEC3, AURORA,
  111 + SRIO1, SRIO1, SRIO1, SRIO1} },
98 112 {0x49, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
99 113 SGMII_FM1_DTSEC3, AURORA,
100 114 SRIO1, SRIO1, SRIO1, SRIO1}},
101 115  
102 116  
103 117  
... ... @@ -107,18 +121,30 @@
107 121 {0x4E, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
108 122 SGMII_FM1_DTSEC3, AURORA,
109 123 SRIO1, SRIO1, SRIO1, SRIO1}},
  124 + {0x79, {SRIO2, SRIO2, SRIO2, SRIO2,
  125 + SRIO1, SRIO1, SRIO1, SRIO1} },
110 126 {0x7A, {SRIO2, SRIO2, SRIO2, SRIO2,
111 127 SRIO1, SRIO1, SRIO1, SRIO1}},
  128 + {0x83, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
  129 + SRIO2, SRIO2, AURORA, AURORA,
  130 + XFI_FM1_MAC9, XFI_FM1_MAC10} },
112 131 {0x84, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
113 132 SRIO2, SRIO2, AURORA, AURORA,
114 133 XFI_FM1_MAC9, XFI_FM1_MAC10}},
115 134 {0x85, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
116 135 SRIO2, SRIO2, AURORA, AURORA,
117 136 XFI_FM1_MAC9, XFI_FM1_MAC10}},
  137 + {0x86, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
  138 + SRIO2, SRIO2,
  139 + SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
  140 + XFI_FM1_MAC9, XFI_FM1_MAC10} },
118 141 {0x87, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
119 142 SRIO2, SRIO2,
120 143 SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
121 144 XFI_FM1_MAC9, XFI_FM1_MAC10}},
  145 + {0x8C, {SRIO2, SRIO2, SRIO2, SRIO2,
  146 + SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
  147 + XFI_FM1_MAC9, XFI_FM1_MAC10} },
122 148 {0x8D, {SRIO2, SRIO2, SRIO2, SRIO2,
123 149 SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
124 150 XFI_FM1_MAC9, XFI_FM1_MAC10}},
... ... @@ -133,6 +159,9 @@
133 159 SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
134 160 XAUI_FM1_MAC10, XAUI_FM1_MAC10,
135 161 XAUI_FM1_MAC10, XAUI_FM1_MAC10}},
  162 + {0xB1, {PCIE1, PCIE1, PCIE1, PCIE1,
  163 + SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
  164 + XFI_FM1_MAC9, XFI_FM1_MAC10} },
136 165 {0xB2, {PCIE1, PCIE1, PCIE1, PCIE1,
137 166 SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
138 167 XFI_FM1_MAC9, XFI_FM1_MAC10}},
board/freescale/b4860qds/b4860qds.c
Diff comments   View file @ c7d506d
... ... @@ -121,6 +121,7 @@
121 121 debug("Using SERDES2 Protocol: 0x%x:\n", serdes2_prtcl);
122 122  
123 123 switch (serdes1_prtcl) {
  124 + case 0x29:
124 125 case 0x2a:
125 126 case 0x2C:
126 127 case 0x2D:
... ... @@ -200,6 +201,7 @@
200 201 break;
201 202  
202 203 #ifdef CONFIG_PPC_B4420
  204 + case 0x17:
203 205 case 0x18:
204 206 /*
205 207 * Configuration:
board/freescale/b4860qds/eth_b4860qds.c
Diff comments   View file @ c7d506d
... ... @@ -66,6 +66,7 @@
66 66 serdes2_prtcl);
67 67  
68 68 switch (serdes2_prtcl) {
  69 + case 0x17:
69 70 case 0x18:
70 71 /*
71 72 * Configuration:
... ... @@ -198,6 +199,7 @@
198 199 fm_info_set_phy_address(FM1_DTSEC6, CONFIG_SYS_FM1_DTSEC6_PHY_ADDR);
199 200  
200 201 switch (serdes1_prtcl) {
  202 + case 0x29:
201 203 case 0x2a:
202 204 /* Serdes 1: A-B SGMII, Configuring DTSEC 5 and 6 */
203 205 debug("Setting phy addresses for FM1_DTSEC5: %x and"
... ... @@ -209,6 +211,7 @@
209 211 CONFIG_SYS_FM1_DTSEC6_PHY_ADDR);
210 212 break;
211 213 #ifdef CONFIG_PPC_B4420
  214 + case 0x17:
212 215 case 0x18:
213 216 /* Serdes 1: A-D SGMII, Configuring on board dual SGMII Phy */
214 217 debug("Setting phy addresses for FM1_DTSEC3: %x and"
... ... @@ -228,6 +231,7 @@
228 231 break;
229 232 }
230 233 switch (serdes2_prtcl) {
  234 + case 0x17:
231 235 case 0x18:
232 236 debug("Setting phy addresses on SGMII Riser card for"
233 237 "FM1_DTSEC ports: \n");
... ... @@ -240,6 +244,7 @@
240 244 fm_info_set_phy_address(FM1_DTSEC4,
241 245 CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR);
242 246 break;
  247 + case 0x48:
243 248 case 0x49:
244 249 debug("Setting phy addresses on SGMII Riser card for"
245 250 "FM1_DTSEC ports: \n");