Commit ca19a79342cf953bc652ce41534c86ce4e79f26a

Authored by Bin Meng
Committed by Simon Glass
1 parent 868767c71a

net: pch_gbe: Convert to driver model

This commit converts pch_gbe ethernet driver to driver model.

Since this driver is only used by Intel Crown Bay board, the
conversion does not keep the non-dm version.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>

Showing 3 changed files with 73 additions and 66 deletions Side-by-side Diff

drivers/net/pch_gbe.c
... ... @@ -7,10 +7,10 @@
7 7 */
8 8  
9 9 #include <common.h>
  10 +#include <dm.h>
10 11 #include <errno.h>
11 12 #include <asm/io.h>
12 13 #include <pci.h>
13   -#include <malloc.h>
14 14 #include <miiphy.h>
15 15 #include "pch_gbe.h"
16 16  
... ... @@ -19,7 +19,7 @@
19 19 #endif
20 20  
21 21 static struct pci_device_id supported[] = {
22   - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_GBE },
  22 + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_GBE) },
23 23 { }
24 24 };
25 25  
26 26  
... ... @@ -62,9 +62,10 @@
62 62 return -ETIME;
63 63 }
64 64  
65   -static int pch_gbe_reset(struct eth_device *dev)
  65 +static int pch_gbe_reset(struct udevice *dev)
66 66 {
67   - struct pch_gbe_priv *priv = dev->priv;
  67 + struct pch_gbe_priv *priv = dev_get_priv(dev);
  68 + struct eth_pdata *plat = dev_get_platdata(dev);
68 69 struct pch_gbe_regs *mac_regs = priv->mac_regs;
69 70 ulong start;
70 71  
... ... @@ -97,7 +98,7 @@
97 98 * so we have to reload MAC address here in order to
98 99 * make linux pch_gbe driver happy.
99 100 */
100   - return pch_gbe_mac_write(mac_regs, dev->enetaddr);
  101 + return pch_gbe_mac_write(mac_regs, plat->enetaddr);
101 102 }
102 103  
103 104 udelay(10);
104 105  
... ... @@ -107,9 +108,9 @@
107 108 return -ETIME;
108 109 }
109 110  
110   -static void pch_gbe_rx_descs_init(struct eth_device *dev)
  111 +static void pch_gbe_rx_descs_init(struct udevice *dev)
111 112 {
112   - struct pch_gbe_priv *priv = dev->priv;
  113 + struct pch_gbe_priv *priv = dev_get_priv(dev);
113 114 struct pch_gbe_regs *mac_regs = priv->mac_regs;
114 115 struct pch_gbe_rx_desc *rx_desc = &priv->rx_desc[0];
115 116 int i;
116 117  
... ... @@ -128,9 +129,9 @@
128 129 &mac_regs->rx_dsc_sw_p);
129 130 }
130 131  
131   -static void pch_gbe_tx_descs_init(struct eth_device *dev)
  132 +static void pch_gbe_tx_descs_init(struct udevice *dev)
132 133 {
133   - struct pch_gbe_priv *priv = dev->priv;
  134 + struct pch_gbe_priv *priv = dev_get_priv(dev);
134 135 struct pch_gbe_regs *mac_regs = priv->mac_regs;
135 136 struct pch_gbe_tx_desc *tx_desc = &priv->tx_desc[0];
136 137  
137 138  
... ... @@ -183,9 +184,9 @@
183 184 return;
184 185 }
185 186  
186   -static int pch_gbe_init(struct eth_device *dev, bd_t *bis)
  187 +static int pch_gbe_start(struct udevice *dev)
187 188 {
188   - struct pch_gbe_priv *priv = dev->priv;
  189 + struct pch_gbe_priv *priv = dev_get_priv(dev);
189 190 struct pch_gbe_regs *mac_regs = priv->mac_regs;
190 191  
191 192 if (pch_gbe_reset(dev))
192 193  
193 194  
194 195  
... ... @@ -226,18 +227,18 @@
226 227 return 0;
227 228 }
228 229  
229   -static void pch_gbe_halt(struct eth_device *dev)
  230 +static void pch_gbe_stop(struct udevice *dev)
230 231 {
231   - struct pch_gbe_priv *priv = dev->priv;
  232 + struct pch_gbe_priv *priv = dev_get_priv(dev);
232 233  
233 234 pch_gbe_reset(dev);
234 235  
235 236 phy_shutdown(priv->phydev);
236 237 }
237 238  
238   -static int pch_gbe_send(struct eth_device *dev, void *packet, int length)
  239 +static int pch_gbe_send(struct udevice *dev, void *packet, int length)
239 240 {
240   - struct pch_gbe_priv *priv = dev->priv;
  241 + struct pch_gbe_priv *priv = dev_get_priv(dev);
241 242 struct pch_gbe_regs *mac_regs = priv->mac_regs;
242 243 struct pch_gbe_tx_desc *tx_head, *tx_desc;
243 244 u16 frame_ctrl = 0;
244 245  
245 246  
246 247  
247 248  
... ... @@ -277,15 +278,13 @@
277 278 return -ETIME;
278 279 }
279 280  
280   -static int pch_gbe_recv(struct eth_device *dev)
  281 +static int pch_gbe_recv(struct udevice *dev, int flags, uchar **packetp)
281 282 {
282   - struct pch_gbe_priv *priv = dev->priv;
  283 + struct pch_gbe_priv *priv = dev_get_priv(dev);
283 284 struct pch_gbe_regs *mac_regs = priv->mac_regs;
284   - struct pch_gbe_rx_desc *rx_head, *rx_desc;
  285 + struct pch_gbe_rx_desc *rx_desc;
285 286 u32 hw_desc, buffer_addr, length;
286   - int rx_swp;
287 287  
288   - rx_head = &priv->rx_desc[0];
289 288 rx_desc = &priv->rx_desc[priv->rx_idx];
290 289  
291 290 readl(&mac_regs->int_st);
292 291  
293 292  
294 293  
... ... @@ -293,12 +292,22 @@
293 292  
294 293 /* Just return if not receiving any packet */
295 294 if ((u32)rx_desc == hw_desc)
296   - return 0;
  295 + return -EAGAIN;
297 296  
298 297 buffer_addr = pci_mem_to_phys(priv->bdf, rx_desc->buffer_addr);
  298 + *packetp = (uchar *)buffer_addr;
299 299 length = rx_desc->rx_words_eob - 3 - ETH_FCS_LEN;
300   - net_process_received_packet((uchar *)buffer_addr, length);
301 300  
  301 + return length;
  302 +}
  303 +
  304 +static int pch_gbe_free_pkt(struct udevice *dev, uchar *packet, int length)
  305 +{
  306 + struct pch_gbe_priv *priv = dev_get_priv(dev);
  307 + struct pch_gbe_regs *mac_regs = priv->mac_regs;
  308 + struct pch_gbe_rx_desc *rx_head = &priv->rx_desc[0];
  309 + int rx_swp;
  310 +
302 311 /* Test the wrap-around condition */
303 312 if (++priv->rx_idx >= PCH_GBE_DESC_NUM)
304 313 priv->rx_idx = 0;
... ... @@ -309,7 +318,7 @@
309 318 writel(pci_phys_to_mem(priv->bdf, (u32)(rx_head + rx_swp)),
310 319 &mac_regs->rx_dsc_sw_p);
311 320  
312   - return length;
  321 + return 0;
313 322 }
314 323  
315 324 static int pch_gbe_mdio_ready(struct pch_gbe_regs *mac_regs)
... ... @@ -365,7 +374,7 @@
365 374 return 0;
366 375 }
367 376  
368   -static int pch_gbe_mdio_init(char *name, struct pch_gbe_regs *mac_regs)
  377 +static int pch_gbe_mdio_init(const char *name, struct pch_gbe_regs *mac_regs)
369 378 {
370 379 struct mii_dev *bus;
371 380  
372 381  
373 382  
... ... @@ -384,13 +393,14 @@
384 393 return mdio_register(bus);
385 394 }
386 395  
387   -static int pch_gbe_phy_init(struct eth_device *dev)
  396 +static int pch_gbe_phy_init(struct udevice *dev)
388 397 {
389   - struct pch_gbe_priv *priv = dev->priv;
  398 + struct pch_gbe_priv *priv = dev_get_priv(dev);
  399 + struct eth_pdata *plat = dev_get_platdata(dev);
390 400 struct phy_device *phydev;
391 401 int mask = 0xffffffff;
392 402  
393   - phydev = phy_find_by_mask(priv->bus, mask, priv->interface);
  403 + phydev = phy_find_by_mask(priv->bus, mask, plat->phy_interface);
394 404 if (!phydev) {
395 405 printf("pch_gbe: cannot find the phy\n");
396 406 return -1;
397 407  
398 408  
399 409  
400 410  
401 411  
402 412  
403 413  
404 414  
405 415  
406 416  
407 417  
408 418  
409 419  
... ... @@ -404,64 +414,67 @@
404 414 priv->phydev = phydev;
405 415 phy_config(phydev);
406 416  
407   - return 1;
  417 + return 0;
408 418 }
409 419  
410   -int pch_gbe_register(bd_t *bis)
  420 +int pch_gbe_probe(struct udevice *dev)
411 421 {
412   - struct eth_device *dev;
413 422 struct pch_gbe_priv *priv;
  423 + struct eth_pdata *plat = dev_get_platdata(dev);
414 424 pci_dev_t devno;
415 425 u32 iobase;
416 426  
417   - devno = pci_find_devices(supported, 0);
418   - if (devno == -1)
419   - return -ENODEV;
  427 + devno = pci_get_bdf(dev);
420 428  
421   - dev = (struct eth_device *)malloc(sizeof(*dev));
422   - if (!dev)
423   - return -ENOMEM;
424   - memset(dev, 0, sizeof(*dev));
425   -
426 429 /*
427 430 * The priv structure contains the descriptors and frame buffers which
428   - * need a strict buswidth alignment (64 bytes)
  431 + * need a strict buswidth alignment (64 bytes). This is guaranteed by
  432 + * DM_FLAG_ALLOC_PRIV_DMA flag in the U_BOOT_DRIVER.
429 433 */
430   - priv = (struct pch_gbe_priv *)memalign(PCH_GBE_ALIGN_SIZE,
431   - sizeof(*priv));
432   - if (!priv) {
433   - free(dev);
434   - return -ENOMEM;
435   - }
436   - memset(priv, 0, sizeof(*priv));
  434 + priv = dev_get_priv(dev);
437 435  
438   - dev->priv = priv;
439   - priv->dev = dev;
440 436 priv->bdf = devno;
441 437  
442 438 pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase);
443 439 iobase &= PCI_BASE_ADDRESS_MEM_MASK;
444 440 iobase = pci_mem_to_phys(devno, iobase);
445 441  
446   - dev->iobase = iobase;
  442 + plat->iobase = iobase;
447 443 priv->mac_regs = (struct pch_gbe_regs *)iobase;
448 444  
449   - sprintf(dev->name, "pch_gbe");
450   -
451 445 /* Read MAC address from SROM and initialize dev->enetaddr with it */
452   - pch_gbe_mac_read(priv->mac_regs, dev->enetaddr);
  446 + pch_gbe_mac_read(priv->mac_regs, plat->enetaddr);
453 447  
454   - dev->init = pch_gbe_init;
455   - dev->halt = pch_gbe_halt;
456   - dev->send = pch_gbe_send;
457   - dev->recv = pch_gbe_recv;
458   -
459   - eth_register(dev);
460   -
461   - priv->interface = PHY_INTERFACE_MODE_RGMII;
  448 + plat->phy_interface = PHY_INTERFACE_MODE_RGMII;
462 449 pch_gbe_mdio_init(dev->name, priv->mac_regs);
463 450 priv->bus = miiphy_get_dev_by_name(dev->name);
464 451  
465 452 return pch_gbe_phy_init(dev);
466 453 }
  454 +
  455 +static const struct eth_ops pch_gbe_ops = {
  456 + .start = pch_gbe_start,
  457 + .send = pch_gbe_send,
  458 + .recv = pch_gbe_recv,
  459 + .free_pkt = pch_gbe_free_pkt,
  460 + .stop = pch_gbe_stop,
  461 +};
  462 +
  463 +static const struct udevice_id pch_gbe_ids[] = {
  464 + { .compatible = "intel,pch-gbe" },
  465 + { }
  466 +};
  467 +
  468 +U_BOOT_DRIVER(eth_pch_gbe) = {
  469 + .name = "pch_gbe",
  470 + .id = UCLASS_ETH,
  471 + .of_match = pch_gbe_ids,
  472 + .probe = pch_gbe_probe,
  473 + .ops = &pch_gbe_ops,
  474 + .priv_auto_alloc_size = sizeof(struct pch_gbe_priv),
  475 + .platdata_auto_alloc_size = sizeof(struct eth_pdata),
  476 + .flags = DM_FLAG_ALLOC_PRIV_DMA,
  477 +};
  478 +
  479 +U_BOOT_PCI_DEVICE(eth_pch_gbe, supported);
drivers/net/pch_gbe.h
... ... @@ -287,12 +287,10 @@
287 287 struct pch_gbe_rx_desc rx_desc[PCH_GBE_DESC_NUM];
288 288 struct pch_gbe_tx_desc tx_desc[PCH_GBE_DESC_NUM];
289 289 char rx_buff[PCH_GBE_DESC_NUM][PCH_GBE_RX_FRAME_LEN];
290   - struct eth_device *dev;
291 290 struct phy_device *phydev;
292 291 struct mii_dev *bus;
293 292 struct pch_gbe_regs *mac_regs;
294 293 pci_dev_t bdf;
295   - u32 interface;
296 294 int rx_idx;
297 295 int tx_idx;
298 296 };
... ... @@ -70,7 +70,6 @@
70 70 int ne2k_register(void);
71 71 int npe_initialize(bd_t *bis);
72 72 int ns8382x_initialize(bd_t *bis);
73   -int pch_gbe_register(bd_t *bis);
74 73 int pcnet_initialize(bd_t *bis);
75 74 int ppc_4xx_eth_initialize (bd_t *bis);
76 75 int rtl8139_initialize(bd_t *bis);
... ... @@ -122,9 +121,6 @@
122 121 #endif
123 122 #ifdef CONFIG_E1000
124 123 num += e1000_initialize(bis);
125   -#endif
126   -#ifdef CONFIG_PCH_GBE
127   - num += pch_gbe_register(bis);
128 124 #endif
129 125 #ifdef CONFIG_PCNET
130 126 num += pcnet_initialize(bis);