Commit ca75added10524a1f8e439e904ba72cb74c917a4
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Add I2C and RTC support for RMU board using software I2C driver
(because of better response to iprobe command); fix problem with "reset" command
Showing 3 changed files with 40 additions and 12 deletions Side-by-side Diff
CHANGELOG
... | ... | @@ -2,6 +2,10 @@ |
2 | 2 | Changes for U-Boot 0.4.7: |
3 | 3 | ====================================================================== |
4 | 4 | |
5 | +* Add I2C and RTC support for RMU board using software I2C driver | |
6 | + (because of better response to iprobe command); fix problem with | |
7 | + "reset" command | |
8 | + | |
5 | 9 | * Patch by Matthias Fuchs, 28 Aug 2003: |
6 | 10 | Added CONFIG_BOOTP_DNS2 and CONFIG_BOOTP_SEND_HOSTNAME to |
7 | 11 | CONFIG_BOOTP_MAKS (see README). |
include/configs/rmu.h
... | ... | @@ -61,8 +61,39 @@ |
61 | 61 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
62 | 62 | #undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */ |
63 | 63 | |
64 | +/* enable I2C and select the hardware/software driver */ | |
65 | +#undef CONFIG_HARD_I2C /* I2C with hardware support */ | |
66 | +#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ | |
67 | + | |
68 | +#define CFG_I2C_SPEED 40000 /* 40 kHz is supposed to work */ | |
69 | +#define CFG_I2C_SLAVE 0xFE | |
70 | + | |
71 | +/* Software (bit-bang) I2C driver configuration */ | |
72 | +#define PB_SCL 0x00000020 /* PB 26 */ | |
73 | +#define PB_SDA 0x00000010 /* PB 27 */ | |
74 | + | |
75 | +#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL) | |
76 | +#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA) | |
77 | +#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA) | |
78 | +#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0) | |
79 | +#define I2C_SDA(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \ | |
80 | + else immr->im_cpm.cp_pbdat &= ~PB_SDA | |
81 | +#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ | |
82 | + else immr->im_cpm.cp_pbdat &= ~PB_SCL | |
83 | +#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ | |
84 | + | |
85 | +/* M41T11 Serial Access Timekeeper(R) SRAM */ | |
86 | +#define CONFIG_RTC_M41T11 1 | |
87 | +#define CFG_I2C_RTC_ADDR 0x68 | |
88 | +#define CFG_M41T11_BASE_YEAR 1900 /* play along with the linux driver */ | |
89 | + | |
64 | 90 | #undef CONFIG_WATCHDOG /* watchdog disabled */ |
65 | 91 | |
92 | +#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ | |
93 | + CFG_CMD_DATE | \ | |
94 | + CFG_CMD_DHCP | \ | |
95 | + CFG_CMD_I2C ) | |
96 | + | |
66 | 97 | #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) |
67 | 98 | |
68 | 99 | /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
... | ... | @@ -151,6 +182,11 @@ |
151 | 182 | /* Address and size of Redundant Environment Sector */ |
152 | 183 | #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE) |
153 | 184 | #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) |
185 | + | |
186 | +/*----------------------------------------------------------------------- | |
187 | + * Reset address | |
188 | + */ | |
189 | +#define CFG_RESET_ADDRESS ((ulong)((((immap_t *)CFG_IMMR)->im_clkrst.res))) | |
154 | 190 | |
155 | 191 | /*----------------------------------------------------------------------- |
156 | 192 | * Cache Configuration |
include/watchdog.h
... | ... | @@ -85,17 +85,5 @@ |
85 | 85 | void reset_4xx_watchdog(void); |
86 | 86 | #endif |
87 | 87 | |
88 | -/* MPC 8260 */ | |
89 | -#if defined(CONFIG_MPC8260) && !defined(__ASSEMBLY__) | |
90 | -#if defined(CONFIG_WATCHDOG) | |
91 | -extern __inline__ void | |
92 | -reset_8260_watchdog(volatile immap_t *immr) | |
93 | -{ | |
94 | - immr->im_siu_conf.sc_swsr = 0x556c; | |
95 | - immr->im_siu_conf.sc_swsr = 0xaa39; | |
96 | -} | |
97 | -#endif /* !__ASSEMBLY__ && CONFIG_WATCHDOG */ | |
98 | -#endif /* CONFIG_MPC8260 && !__ASSEMBLY__ */ | |
99 | - | |
100 | 88 | #endif /* _WATCHDOG_H_ */ |