ftpmu010: fix relocation and enhance features

1. ftpmu010.h: fix and add definitions Enhanced for more features and asm related support according to datasheet. Note: - FTPMU010_PDLLCR0_HCLKOUTDIS is "incorrect" in datasheet. - FTPMU010_PDLLCR0_DLLFRANG is only 1 bit at bit #19. (not 20-19) - FTPMU010_PDLLCR0_HCLKOUTDIS is 4 bits at bit #20. (not 24-21) 2. ftpmu010.c: enhance features and fix relocation - The following functions is added for pmu features. ftpmu010_mfpsr_select_dev() ftpmu010_sdramhtc_set() - This patch also fix the declare statement for relocation. Signed-off-by: Macpaul Lin <macpaul@andestech.com>

ftpmu010: fix relocation and enhance features
1. ftpmu010.h: fix and add definitions Enhanced for more features and asm related support according to datasheet. Note: - FTPMU010_PDLLCR0_HCLKOUTDIS is "incorrect" in datasheet. - FTPMU010_PDLLCR0_DLLFRANG is only 1 bit at bit #19. (not 20-19) - FTPMU010_PDLLCR0_HCLKOUTDIS is 4 bits at bit #20. (not 24-21) 2. ftpmu010.c: enhance features and fix relocation - The following functions is added for pmu features. ftpmu010_mfpsr_select_dev() ftpmu010_sdramhtc_set() - This patch also fix the declare statement for relocation. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Macpaul Lin · Albert ARIBAUD
1 parent 286a5b253a
Showing 2 changed files with 72 additions and 5 deletions Side-by-side Diff
drivers/power/ftpmu010.c
include/faraday/ftpmu010.h
@@ -25,10 +25,10 @@
 #include <asm/io.h>
 #include <faraday/ftpmu010.h>
  
-static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
-
+/* OSCC: OSC Control Register */
 void ftpmu010_32768osc_enable(void)
 {
+	static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
 	unsigned int oscc;
  
 	/* enable the 32768Hz oscillator */
  
@@ -46,8 +46,31 @@
 	writel(oscc, &pmu->OSCC);
 }
  
+/* MFPSR: Multi-Function Port Setting Register */
+void ftpmu010_mfpsr_select_dev(unsigned int dev)
+{
+	static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
+	unsigned int mfpsr;
+
+	mfpsr = readl(&pmu->MFPSR);
+	mfpsr |= dev;
+	writel(mfpsr, &pmu->MFPSR);
+}
+
+void ftpmu010_mfpsr_diselect_dev(unsigned int dev)
+{
+	static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
+	unsigned int mfpsr;
+
+	mfpsr = readl(&pmu->MFPSR);
+	mfpsr &= ~dev;
+	writel(mfpsr, &pmu->MFPSR);
+}
+
+/* PDLLCR0: PLL/DLL Control Register 0 */
 void ftpmu010_dlldis_disable(void)
 {
+	static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
 	unsigned int pdllcr0;
  
 	pdllcr0 = readl(&pmu->PDLLCR0);
  
@@ -57,10 +80,22 @@
  
 void ftpmu010_sdram_clk_disable(unsigned int cr0)
 {
+	static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
 	unsigned int pdllcr0;
  
 	pdllcr0 = readl(&pmu->PDLLCR0);
 	pdllcr0 |= FTPMU010_PDLLCR0_HCLKOUTDIS(cr0);
 	writel(pdllcr0, &pmu->PDLLCR0);
+}
+
+/* SDRAMHTC: SDRAM Signal Hold Time Control */
+void ftpmu010_sdramhtc_set(unsigned int val)
+{
+	static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
+	unsigned int sdramhtc;
+
+	sdramhtc = readl(&pmu->SDRAMHTC);
+	sdramhtc |= val;
+	writel(sdramhtc, &pmu->SDRAMHTC);
 }
@@ -126,22 +126,54 @@
 /*
  * Multi-Function Port Setting Register
  */
+#define FTPMU010_MFPSR_DEBUGSEL		(1 << 17)
+#define FTPMU010_MFPSR_DMA0PINSEL	(1 << 16)
+#define FTPMU010_MFPSR_DMA1PINSEL	(1 << 15)
 #define FTPMU010_MFPSR_MODEMPINSEL	(1 << 14)
 #define FTPMU010_MFPSR_AC97CLKOUTSEL	(1 << 13)
+#define FTPMU010_MFPSR_PWM1PINSEL	(1 << 11)
+#define FTPMU010_MFPSR_PWM0PINSEL	(1 << 10)
+#define FTPMU010_MFPSR_IRDACLKSEL	(1 << 9)
+#define FTPMU010_MFPSR_UARTCLKSEL	(1 << 8)
+#define FTPMU010_MFPSR_SSPCLKSEL	(1 << 6)
+#define FTPMU010_MFPSR_I2SCLKSEL	(1 << 5)
+#define FTPMU010_MFPSR_AC97CLKSEL	(1 << 4)
 #define FTPMU010_MFPSR_AC97PINSEL	(1 << 3)
+#define FTPMU010_MFPSR_TRIAHBDIS	(1 << 1)
+#define FTPMU010_MFPSR_TRIAHBDBG	(1 << 0)
  
 /*
  * PLL/DLL Control Register 0
+ * Note:
+ *  1. FTPMU010_PDLLCR0_HCLKOUTDIS:
+ *	Datasheet indicated it starts at bit #21 which was wrong.
+ *  2. FTPMU010_PDLLCR0_DLLFRAG:
+ * 	Datasheet indicated it has 2 bit which was wrong.
  */
-#define FTPMU010_PDLLCR0_HCLKOUTDIS(cr0)	(((cr0) >> 20) & 0xf)
-#define FTPMU010_PDLLCR0_DLLFRAG		(1 << 19)
+#define FTPMU010_PDLLCR0_HCLKOUTDIS(cr0)	(((cr0) & 0xf) << 20)
+#define FTPMU010_PDLLCR0_DLLFRAG(cr0)		(1 << 19)
 #define FTPMU010_PDLLCR0_DLLSTSEL		(1 << 18)
 #define FTPMU010_PDLLCR0_DLLSTABLE		(1 << 17)
 #define FTPMU010_PDLLCR0_DLLDIS			(1 << 16)
-#define FTPMU010_PDLLCR0_PLL1NS(cr0)		(((cr0) >> 3) & 0x1ff)
+#define FTPMU010_PDLLCR0_PLL1FRANG(cr0)		(((cr0) & 0x3) << 12)
+#define FTPMU010_PDLLCR0_PLL1NS(cr0)		(((cr0) & 0x1ff) << 3)
 #define FTPMU010_PDLLCR0_PLL1STSEL		(1 << 2)
 #define FTPMU010_PDLLCR0_PLL1STABLE		(1 << 1)
 #define FTPMU010_PDLLCR0_PLL1DIS		(1 << 0)
+
+/*
+ * SDRAM Signal Hold Time Control Register
+ */
+#define FTPMU010_SDRAMHTC_RCLK_DLY(x)		(((x) & 0xf) << 28)
+#define FTPMU010_SDRAMHTC_CTL_WCLK_DLY(x)	(((x) & 0xf) << 24)
+#define FTPMU010_SDRAMHTC_DAT_WCLK_DLY(x)	(((x) & 0xf) << 20)
+#define FTPMU010_SDRAMHTC_EBICTRL_DCSR		(1 << 18)
+#define FTPMU010_SDRAMHTC_EBIDATA_DCSR		(1 << 17)
+#define FTPMU010_SDRAMHTC_SDRAMCS_DCSR		(1 << 16)
+#define FTPMU010_SDRAMHTC_SDRAMCTL_DCSR		(1 << 15)
+#define FTPMU010_SDRAMHTC_CKE_DCSR		(1 << 14)
+#define FTPMU010_SDRAMHTC_DQM_DCSR		(1 << 13)
+#define FTPMU010_SDRAMHTC_SDCLK_DCSR		(1 << 12)
  
 void ftpmu010_32768osc_enable(void);
 void ftpmu010_dlldis_disable(void);
...	...	@@ -25,10 +25,10 @@
25	25	#include <asm/io.h>
26	26	#include <faraday/ftpmu010.h>
27	27
28		-static struct ftpmu010 pmu = (struct ftpmu010 )CONFIG_FTPMU010_BASE;
29		-
	28	+/* OSCC: OSC Control Register */
30	29	void ftpmu010_32768osc_enable(void)
31	30	{
	31	+ static struct ftpmu010 pmu = (struct ftpmu010 )CONFIG_FTPMU010_BASE;
32	32	unsigned int oscc;
33	33
34	34	/* enable the 32768Hz oscillator */
35	35
...	...	@@ -46,8 +46,31 @@
46	46	writel(oscc, &pmu->OSCC);
47	47	}
48	48
	49	+/* MFPSR: Multi-Function Port Setting Register */
	50	+void ftpmu010_mfpsr_select_dev(unsigned int dev)
	51	+{
	52	+ static struct ftpmu010 pmu = (struct ftpmu010 )CONFIG_FTPMU010_BASE;
	53	+ unsigned int mfpsr;
	54	+
	55	+ mfpsr = readl(&pmu->MFPSR);
	56	+ mfpsr \|= dev;
	57	+ writel(mfpsr, &pmu->MFPSR);
	58	+}
	59	+
	60	+void ftpmu010_mfpsr_diselect_dev(unsigned int dev)
	61	+{
	62	+ static struct ftpmu010 pmu = (struct ftpmu010 )CONFIG_FTPMU010_BASE;
	63	+ unsigned int mfpsr;
	64	+
	65	+ mfpsr = readl(&pmu->MFPSR);
	66	+ mfpsr &= ~dev;
	67	+ writel(mfpsr, &pmu->MFPSR);
	68	+}
	69	+
	70	+/* PDLLCR0: PLL/DLL Control Register 0 */
49	71	void ftpmu010_dlldis_disable(void)
50	72	{
	73	+ static struct ftpmu010 pmu = (struct ftpmu010 )CONFIG_FTPMU010_BASE;
51	74	unsigned int pdllcr0;
52	75
53	76	pdllcr0 = readl(&pmu->PDLLCR0);
54	77
...	...	@@ -57,10 +80,22 @@
57	80
58	81	void ftpmu010_sdram_clk_disable(unsigned int cr0)
59	82	{
	83	+ static struct ftpmu010 pmu = (struct ftpmu010 )CONFIG_FTPMU010_BASE;
60	84	unsigned int pdllcr0;
61	85
62	86	pdllcr0 = readl(&pmu->PDLLCR0);
63	87	pdllcr0 \|= FTPMU010_PDLLCR0_HCLKOUTDIS(cr0);
64	88	writel(pdllcr0, &pmu->PDLLCR0);
	89	+}
	90	+
	91	+/* SDRAMHTC: SDRAM Signal Hold Time Control */
	92	+void ftpmu010_sdramhtc_set(unsigned int val)
	93	+{
	94	+ static struct ftpmu010 pmu = (struct ftpmu010 )CONFIG_FTPMU010_BASE;
	95	+ unsigned int sdramhtc;
	96	+
	97	+ sdramhtc = readl(&pmu->SDRAMHTC);
	98	+ sdramhtc \|= val;
	99	+ writel(sdramhtc, &pmu->SDRAMHTC);
65	100	}
...	...	@@ -126,22 +126,54 @@
126	126	/*
127	127	* Multi-Function Port Setting Register
128	128	*/
	129	+#define FTPMU010_MFPSR_DEBUGSEL (1 << 17)
	130	+#define FTPMU010_MFPSR_DMA0PINSEL (1 << 16)
	131	+#define FTPMU010_MFPSR_DMA1PINSEL (1 << 15)
129	132	#define FTPMU010_MFPSR_MODEMPINSEL (1 << 14)
130	133	#define FTPMU010_MFPSR_AC97CLKOUTSEL (1 << 13)
	134	+#define FTPMU010_MFPSR_PWM1PINSEL (1 << 11)
	135	+#define FTPMU010_MFPSR_PWM0PINSEL (1 << 10)
	136	+#define FTPMU010_MFPSR_IRDACLKSEL (1 << 9)
	137	+#define FTPMU010_MFPSR_UARTCLKSEL (1 << 8)
	138	+#define FTPMU010_MFPSR_SSPCLKSEL (1 << 6)
	139	+#define FTPMU010_MFPSR_I2SCLKSEL (1 << 5)
	140	+#define FTPMU010_MFPSR_AC97CLKSEL (1 << 4)
131	141	#define FTPMU010_MFPSR_AC97PINSEL (1 << 3)
	142	+#define FTPMU010_MFPSR_TRIAHBDIS (1 << 1)
	143	+#define FTPMU010_MFPSR_TRIAHBDBG (1 << 0)
132	144
133	145	/*
134	146	* PLL/DLL Control Register 0
	147	+ * Note:
	148	+ * 1. FTPMU010_PDLLCR0_HCLKOUTDIS:
	149	+ * Datasheet indicated it starts at bit #21 which was wrong.
	150	+ * 2. FTPMU010_PDLLCR0_DLLFRAG:
	151	+ * Datasheet indicated it has 2 bit which was wrong.
135	152	*/
136		-#define FTPMU010_PDLLCR0_HCLKOUTDIS(cr0) (((cr0) >> 20) & 0xf)
137		-#define FTPMU010_PDLLCR0_DLLFRAG (1 << 19)
	153	+#define FTPMU010_PDLLCR0_HCLKOUTDIS(cr0) (((cr0) & 0xf) << 20)
	154	+#define FTPMU010_PDLLCR0_DLLFRAG(cr0) (1 << 19)
138	155	#define FTPMU010_PDLLCR0_DLLSTSEL (1 << 18)
139	156	#define FTPMU010_PDLLCR0_DLLSTABLE (1 << 17)
140	157	#define FTPMU010_PDLLCR0_DLLDIS (1 << 16)
141		-#define FTPMU010_PDLLCR0_PLL1NS(cr0) (((cr0) >> 3) & 0x1ff)
	158	+#define FTPMU010_PDLLCR0_PLL1FRANG(cr0) (((cr0) & 0x3) << 12)
	159	+#define FTPMU010_PDLLCR0_PLL1NS(cr0) (((cr0) & 0x1ff) << 3)
142	160	#define FTPMU010_PDLLCR0_PLL1STSEL (1 << 2)
143	161	#define FTPMU010_PDLLCR0_PLL1STABLE (1 << 1)
144	162	#define FTPMU010_PDLLCR0_PLL1DIS (1 << 0)
	163	+
	164	+/*
	165	+ * SDRAM Signal Hold Time Control Register
	166	+ */
	167	+#define FTPMU010_SDRAMHTC_RCLK_DLY(x) (((x) & 0xf) << 28)
	168	+#define FTPMU010_SDRAMHTC_CTL_WCLK_DLY(x) (((x) & 0xf) << 24)
	169	+#define FTPMU010_SDRAMHTC_DAT_WCLK_DLY(x) (((x) & 0xf) << 20)
	170	+#define FTPMU010_SDRAMHTC_EBICTRL_DCSR (1 << 18)
	171	+#define FTPMU010_SDRAMHTC_EBIDATA_DCSR (1 << 17)
	172	+#define FTPMU010_SDRAMHTC_SDRAMCS_DCSR (1 << 16)
	173	+#define FTPMU010_SDRAMHTC_SDRAMCTL_DCSR (1 << 15)
	174	+#define FTPMU010_SDRAMHTC_CKE_DCSR (1 << 14)
	175	+#define FTPMU010_SDRAMHTC_DQM_DCSR (1 << 13)
	176	+#define FTPMU010_SDRAMHTC_SDCLK_DCSR (1 << 12)
145	177
146	178	void ftpmu010_32768osc_enable(void);
147	179	void ftpmu010_dlldis_disable(void);