Eric Lee / smarc-uboot

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Commit caf2233b281c03e3e359061a3dfa537d8a25c273

Authored by Alexander Graf
Committed by Tom Rini
1 parent 8996975ff8
Exists in smarc_8mq_lf_v2020.04 and in 17 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

bcm283x: Add pinctrl driver 

The bcm283x family of SoCs have a GPIO controller that also acts as
pinctrl controller.

This patch introduces a new pinctrl driver that can actually properly mux
devices into their device tree defined pin states and is now the primary
owner of the gpio device. The previous GPIO driver gets moved into a
subdevice of the pinctrl driver, bound to the same OF node.

That way whenever a device asks for pinctrl support, it gets it
automatically from the pinctrl driver and GPIO support is still available
in the normal command line phase.

Signed-off-by: Alexander Graf <agraf@suse.de>

Showing 14 changed files with 202 additions and 23 deletions Side-by-side Diff

... ... @@ -100,6 +100,7 @@
100 100 F: drivers/serial/serial_bcm283x_mu.c
101 101 F: drivers/video/bcm2835.c
102 102 F: include/dm/platform_data/serial_bcm283x_mu.h
  103 +F: drivers/pinctrl/broadcom/
103 104  
104 105 ARM FREESCALE IMX
105 106 M: Stefano Babic <sbabic@denx.de>
arch/arm/mach-bcm283x/include/mach/gpio.h
Diff comments   View file @ caf2233
... ... @@ -61,7 +61,5 @@
61 61 unsigned long base;
62 62 };
63 63  
64   -int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned gpio);
65   -
66 64 #endif /* _BCM2835_GPIO_H_ */
board/raspberrypi/rpi/rpi.c
Diff comments   View file @ caf2233
... ... @@ -24,6 +24,7 @@
24 24 #include <asm/armv8/mmu.h>
25 25 #endif
26 26 #include <watchdog.h>
  27 +#include <dm/pinctrl.h>
27 28  
28 29 DECLARE_GLOBAL_DATA_PTR;
29 30  
30 31  
... ... @@ -430,10 +431,10 @@
430 431 * out whether it is available is to check if the RX pin is muxed.
431 432 */
432 433  
433   - if (uclass_first_device(UCLASS_GPIO, &dev) || !dev)
  434 + if (uclass_first_device(UCLASS_PINCTRL, &dev) || !dev)
434 435 return true;
435 436  
436   - if (bcm2835_gpio_get_func_id(dev, serial_gpio) != BCM2835_GPIO_ALT5)
  437 + if (pinctrl_get_gpio_mux(dev, 0, serial_gpio) != BCM2835_GPIO_ALT5)
437 438 return false;
438 439  
439 440 return true;
configs/rpi_0_w_defconfig
Diff comments   View file @ caf2233
... ... @@ -32,4 +32,8 @@
32 32 CONFIG_CONSOLE_SCROLL_LINES=10
33 33 CONFIG_PHYS_TO_BUS=y
34 34 CONFIG_OF_LIBFDT_OVERLAY=y
  35 +CONFIG_PINCTRL=y
  36 +CONFIG_PINCTRL_FULL=y
  37 +# CONFIG_PINCTRL_GENERIC is not set
  38 +CONFIG_PINCTRL_BCM283X=y
configs/rpi_2_defconfig
Diff comments   View file @ caf2233
... ... @@ -32,4 +32,8 @@
32 32 CONFIG_CONSOLE_SCROLL_LINES=10
33 33 CONFIG_PHYS_TO_BUS=y
34 34 CONFIG_OF_LIBFDT_OVERLAY=y
  35 +CONFIG_PINCTRL=y
  36 +CONFIG_PINCTRL_FULL=y
  37 +# CONFIG_PINCTRL_GENERIC is not set
  38 +CONFIG_PINCTRL_BCM283X=y
configs/rpi_3_32b_defconfig
Diff comments   View file @ caf2233
... ... @@ -34,4 +34,8 @@
34 34 CONFIG_CONSOLE_SCROLL_LINES=10
35 35 CONFIG_PHYS_TO_BUS=y
36 36 CONFIG_OF_LIBFDT_OVERLAY=y
  37 +CONFIG_PINCTRL=y
  38 +CONFIG_PINCTRL_FULL=y
  39 +# CONFIG_PINCTRL_GENERIC is not set
  40 +CONFIG_PINCTRL_BCM283X=y
configs/rpi_3_defconfig
Diff comments   View file @ caf2233
... ... @@ -34,4 +34,8 @@
34 34 CONFIG_CONSOLE_SCROLL_LINES=10
35 35 CONFIG_PHYS_TO_BUS=y
36 36 CONFIG_OF_LIBFDT_OVERLAY=y
  37 +CONFIG_PINCTRL=y
  38 +CONFIG_PINCTRL_FULL=y
  39 +# CONFIG_PINCTRL_GENERIC is not set
  40 +CONFIG_PINCTRL_BCM283X=y
configs/rpi_defconfig
Diff comments   View file @ caf2233
... ... @@ -32,4 +32,8 @@
32 32 CONFIG_CONSOLE_SCROLL_LINES=10
33 33 CONFIG_PHYS_TO_BUS=y
34 34 CONFIG_OF_LIBFDT_OVERLAY=y
  35 +CONFIG_PINCTRL=y
  36 +CONFIG_PINCTRL_FULL=y
  37 +# CONFIG_PINCTRL_GENERIC is not set
  38 +CONFIG_PINCTRL_BCM283X=y
drivers/gpio/bcm2835_gpio.c
Diff comments   View file @ caf2233
... ... @@ -7,6 +7,7 @@
7 7  
8 8 #include <common.h>
9 9 #include <dm.h>
  10 +#include <dm/pinctrl.h>
10 11 #include <errno.h>
11 12 #include <asm/gpio.h>
12 13 #include <asm/io.h>
... ... @@ -14,6 +15,7 @@
14 15  
15 16 struct bcm2835_gpios {
16 17 struct bcm2835_gpio_regs *reg;
  18 + struct udevice *pinctrl;
17 19 };
18 20  
19 21 static int bcm2835_gpio_direction_input(struct udevice *dev, unsigned gpio)
... ... @@ -29,7 +31,7 @@
29 31 return 0;
30 32 }
31 33  
32   -static int bcm2835_gpio_direction_output(struct udevice *dev, unsigned gpio,
  34 +static int bcm2835_gpio_direction_output(struct udevice *dev, unsigned int gpio,
33 35 int value)
34 36 {
35 37 struct bcm2835_gpios *gpios = dev_get_priv(dev);
36 38  
37 39  
... ... @@ -73,20 +75,13 @@
73 75 return 0;
74 76 }
75 77  
76   -int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned gpio)
77   -{
78   - struct bcm2835_gpios *gpios = dev_get_priv(dev);
79   - u32 val;
80   -
81   - val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
82   -
83   - return (val >> BCM2835_GPIO_FSEL_SHIFT(gpio) & BCM2835_GPIO_FSEL_MASK);
84   -}
85   -
86 78 static int bcm2835_gpio_get_function(struct udevice *dev, unsigned offset)
87 79 {
88   - int funcid = bcm2835_gpio_get_func_id(dev, offset);
  80 + struct bcm2835_gpios *priv = dev_get_priv(dev);
  81 + int funcid;
89 82  
  83 + funcid = pinctrl_get_gpio_mux(priv->pinctrl, 0, offset);
  84 +
90 85 switch (funcid) {
91 86 case BCM2835_GPIO_OUTPUT:
92 87 return GPIOF_OUTPUT;
... ... @@ -97,7 +92,6 @@
97 92 }
98 93 }
99 94  
100   -
101 95 static const struct dm_gpio_ops gpio_bcm2835_ops = {
102 96 .direction_input = bcm2835_gpio_direction_input,
103 97 .direction_output = bcm2835_gpio_direction_output,
104 98  
... ... @@ -116,15 +110,13 @@
116 110 uc_priv->gpio_count = BCM2835_GPIO_COUNT;
117 111 gpios->reg = (struct bcm2835_gpio_regs *)plat->base;
118 112  
  113 + /* We know we're spawned by the pinctrl driver */
  114 + gpios->pinctrl = dev->parent;
  115 +
119 116 return 0;
120 117 }
121 118  
122 119 #if CONFIG_IS_ENABLED(OF_CONTROL)
123   -static const struct udevice_id bcm2835_gpio_id[] = {
124   - {.compatible = "brcm,bcm2835-gpio"},
125   - {}
126   -};
127   -
128 120 static int bcm2835_gpio_ofdata_to_platdata(struct udevice *dev)
129 121 {
130 122 struct bcm2835_gpio_platdata *plat = dev_get_platdata(dev);
... ... @@ -142,7 +134,6 @@
142 134 U_BOOT_DRIVER(gpio_bcm2835) = {
143 135 .name = "gpio_bcm2835",
144 136 .id = UCLASS_GPIO,
145   - .of_match = of_match_ptr(bcm2835_gpio_id),
146 137 .ofdata_to_platdata = of_match_ptr(bcm2835_gpio_ofdata_to_platdata),
147 138 .platdata_auto_alloc_size = sizeof(struct bcm2835_gpio_platdata),
148 139 .ops = &gpio_bcm2835_ops,
drivers/pinctrl/Kconfig
Diff comments   View file @ caf2233
... ... @@ -306,6 +306,7 @@
306 306 source "drivers/pinctrl/uniphier/Kconfig"
307 307 source "drivers/pinctrl/exynos/Kconfig"
308 308 source "drivers/pinctrl/mvebu/Kconfig"
  309 +source "drivers/pinctrl/broadcom/Kconfig"
309 310  
310 311 endmenu
drivers/pinctrl/Makefile
Diff comments   View file @ caf2233
... ... @@ -22,4 +22,5 @@
22 22 obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
23 23 obj-$(CONFIG_PINCTRL_STI) += pinctrl-sti.o
24 24 obj-$(CONFIG_PINCTRL_STM32) += pinctrl_stm32.o
  25 +obj-y += broadcom/
drivers/pinctrl/broadcom/Kconfig
Diff comments   View file @ caf2233
  1 +config PINCTRL_BCM283X
  2 + depends on ARCH_BCM283X && PINCTRL_FULL && OF_CONTROL
  3 + default y
  4 + bool "Broadcom 283x family pin control driver"
  5 + help
  6 + Support pin multiplexing and pin configuration control on
  7 + Broadcom's 283x family of SoCs.
drivers/pinctrl/broadcom/Makefile
Diff comments   View file @ caf2233
  1 +#
  2 +# Copyright (C) 2018 Alexander Graf <agraf@suse.de>
  3 +#
  4 +# SPDX-License-Identifier: GPL-2.0
  5 +# https://spdx.org/licenses
  6 +
  7 +obj-$(CONFIG_PINCTRL_BCM283X) += pinctrl-bcm283x.o
drivers/pinctrl/broadcom/pinctrl-bcm283x.c
Diff comments   View file @ caf2233
  1 +/*
  2 + * Copyright (C) 2018 Alexander Graf <agraf@suse.de>
  3 + *
  4 + * Based on drivers/pinctrl/mvebu/pinctrl-mvebu.c and
  5 + * drivers/gpio/bcm2835_gpio.c
  6 + *
  7 + * This driver gets instantiated by the GPIO driver, because both devices
  8 + * share the same device node.
  9 + *
  10 + * SPDX-License-Identifier: GPL-2.0
  11 + * https://spdx.org/licenses
  12 + */
  13 +
  14 +#include <common.h>
  15 +#include <config.h>
  16 +#include <errno.h>
  17 +#include <dm.h>
  18 +#include <dm/pinctrl.h>
  19 +#include <dm/root.h>
  20 +#include <dm/device-internal.h>
  21 +#include <dm/lists.h>
  22 +#include <asm/system.h>
  23 +#include <asm/io.h>
  24 +#include <asm/gpio.h>
  25 +
  26 +struct bcm283x_pinctrl_priv {
  27 + u32 *base_reg;
  28 +};
  29 +
  30 +#define MAX_PINS_PER_BANK 16
  31 +
  32 +static void bcm2835_gpio_set_func_id(struct udevice *dev, unsigned int gpio,
  33 + int func)
  34 +{
  35 + struct bcm283x_pinctrl_priv *priv = dev_get_priv(dev);
  36 + int reg_offset;
  37 + int field_offset;
  38 +
  39 + reg_offset = BCM2835_GPIO_FSEL_BANK(gpio);
  40 + field_offset = BCM2835_GPIO_FSEL_SHIFT(gpio);
  41 +
  42 + clrsetbits_le32(&priv->base_reg[reg_offset],
  43 + BCM2835_GPIO_FSEL_MASK << field_offset,
  44 + (func & BCM2835_GPIO_FSEL_MASK) << field_offset);
  45 +}
  46 +
  47 +static int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned int gpio)
  48 +{
  49 + struct bcm283x_pinctrl_priv *priv = dev_get_priv(dev);
  50 + u32 val;
  51 +
  52 + val = readl(&priv->base_reg[BCM2835_GPIO_FSEL_BANK(gpio)]);
  53 +
  54 + return (val >> BCM2835_GPIO_FSEL_SHIFT(gpio) & BCM2835_GPIO_FSEL_MASK);
  55 +}
  56 +
  57 +/*
  58 + * bcm283x_pinctrl_set_state: configure pin functions.
  59 + * @dev: the pinctrl device to be configured.
  60 + * @config: the state to be configured.
  61 + * @return: 0 in success
  62 + */
  63 +int bcm283x_pinctrl_set_state(struct udevice *dev, struct udevice *config)
  64 +{
  65 + u32 pin_arr[MAX_PINS_PER_BANK];
  66 + u32 function;
  67 + int i, len, pin_count = 0;
  68 +
  69 + if (!dev_read_prop(config, "brcm,pins", &len) || !len ||
  70 + len & 0x3 || dev_read_u32_array(config, "brcm,pins", pin_arr,
  71 + len / sizeof(u32))) {
  72 + debug("Failed reading pins array for pinconfig %s (%d)\n",
  73 + config->name, len);
  74 + return -EINVAL;
  75 + }
  76 +
  77 + pin_count = len / sizeof(u32);
  78 +
  79 + function = dev_read_u32_default(config, "brcm,function", -1);
  80 + if (function < 0) {
  81 + debug("Failed reading function for pinconfig %s (%d)\n",
  82 + config->name, function);
  83 + return -EINVAL;
  84 + }
  85 +
  86 + for (i = 0; i < pin_count; i++)
  87 + bcm2835_gpio_set_func_id(dev, pin_arr[i], function);
  88 +
  89 + return 0;
  90 +}
  91 +
  92 +static int bcm283x_pinctrl_get_gpio_mux(struct udevice *dev, int banknum,
  93 + int index)
  94 +{
  95 + if (banknum != 0)
  96 + return -EINVAL;
  97 +
  98 + return bcm2835_gpio_get_func_id(dev, index);
  99 +}
  100 +
  101 +static const struct udevice_id bcm2835_pinctrl_id[] = {
  102 + {.compatible = "brcm,bcm2835-gpio"},
  103 + {}
  104 +};
  105 +
  106 +int bcm283x_pinctl_probe(struct udevice *dev)
  107 +{
  108 + struct bcm283x_pinctrl_priv *priv;
  109 + int ret;
  110 + struct udevice *pdev;
  111 +
  112 + priv = dev_get_priv(dev);
  113 + if (!priv) {
  114 + debug("%s: Failed to get private\n", __func__);
  115 + return -EINVAL;
  116 + }
  117 +
  118 + priv->base_reg = dev_read_addr_ptr(dev);
  119 + if (priv->base_reg == (void *)FDT_ADDR_T_NONE) {
  120 + debug("%s: Failed to get base address\n", __func__);
  121 + return -EINVAL;
  122 + }
  123 +
  124 + /* Create GPIO device as well */
  125 + ret = device_bind(dev, lists_driver_lookup_name("gpio_bcm2835"),
  126 + "gpio_bcm2835", NULL, dev_of_offset(dev), &pdev);
  127 + if (ret) {
  128 + /*
  129 + * While we really want the pinctrl driver to work to make
  130 + * devices go where they should go, the GPIO controller is
  131 + * not quite as crucial as it's only rarely used, so don't
  132 + * fail here.
  133 + */
  134 + printf("Failed to bind GPIO driver\n");
  135 + }
  136 +
  137 + return 0;
  138 +}
  139 +
  140 +static struct pinctrl_ops bcm283x_pinctrl_ops = {
  141 + .set_state = bcm283x_pinctrl_set_state,
  142 + .get_gpio_mux = bcm283x_pinctrl_get_gpio_mux,
  143 +};
  144 +
  145 +U_BOOT_DRIVER(pinctrl_bcm283x) = {
  146 + .name = "bcm283x_pinctrl",
  147 + .id = UCLASS_PINCTRL,
  148 + .of_match = of_match_ptr(bcm2835_pinctrl_id),
  149 + .priv_auto_alloc_size = sizeof(struct bcm283x_pinctrl_priv),
  150 + .ops = &bcm283x_pinctrl_ops,
  151 + .probe = bcm283x_pinctl_probe
  152 +};