Commit cb082cf9061ccc24a4f374fd9b5c442b52ac05af
Committed by
Priyanka Jain
Priyanka Jain
1 parent
8793c3d8af
Exists in
smarc_8mq_lf_v2020.04
and in
4 other branches
board: fsl: ls2088ardb: Program GIC LPI configuration table
Program GIC LPI configuration table: 1. Redistributor PROCBASER configuration table (which is common for all redistributors) 2. Redistributor pending table (PENDBASER), for all the available redistributors. 3.Reserve DDR memory region used for GIC LPI configuration table. Signed-off-by: Nikhil Gupta <nikhil.gupta@nxp.com>
Showing 1 changed file with 26 additions and 1 deletions Side-by-side Diff
board/freescale/ls2080ardb/ls2080ardb.c
| 1 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | 2 | /* |
| 3 | 3 | * Copyright 2015 Freescale Semiconductor |
| 4 | - * Copyright 2017 NXP | |
| 4 | + * Copyright 2017-2020 NXP | |
| 5 | 5 | */ |
| 6 | 6 | #include <common.h> |
| 7 | 7 | #include <env.h> |
| 8 | 8 | |
| ... | ... | @@ -23,7 +23,10 @@ |
| 23 | 23 | #include <asm/arch/ppa.h> |
| 24 | 24 | #include <fsl_sec.h> |
| 25 | 25 | #include <asm/arch-fsl-layerscape/fsl_icid.h> |
| 26 | +#include <asm/gic-v3.h> | |
| 27 | +#include <cpu_func.h> | |
| 26 | 28 | |
| 29 | +#define GIC_LPI_SIZE 0x200000 | |
| 27 | 30 | #ifdef CONFIG_FSL_QIXIS |
| 28 | 31 | #include "../common/qixis.h" |
| 29 | 32 | #include "ls2080ardb_qixis.h" |
| ... | ... | @@ -347,6 +350,21 @@ |
| 347 | 350 | } |
| 348 | 351 | #endif |
| 349 | 352 | |
| 353 | +#ifdef CONFIG_GIC_V3_ITS | |
| 354 | +void fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base) | |
| 355 | +{ | |
| 356 | + u32 phandle; | |
| 357 | + int err; | |
| 358 | + struct fdt_memory gic_lpi; | |
| 359 | + | |
| 360 | + gic_lpi.start = gic_lpi_base; | |
| 361 | + gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1; | |
| 362 | + err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi, &phandle); | |
| 363 | + if (err < 0) | |
| 364 | + debug("failed to add reserved memory: %d\n", err); | |
| 365 | +} | |
| 366 | +#endif | |
| 367 | + | |
| 350 | 368 | #ifdef CONFIG_OF_BOARD_SETUP |
| 351 | 369 | void fsl_fdt_fixup_flash(void *fdt) |
| 352 | 370 | { |
| ... | ... | @@ -421,6 +439,7 @@ |
| 421 | 439 | u64 mc_memory_base = 0; |
| 422 | 440 | u64 mc_memory_size = 0; |
| 423 | 441 | u16 total_memory_banks; |
| 442 | + u64 gic_lpi_base; | |
| 424 | 443 | |
| 425 | 444 | ft_cpu_setup(blob, bd); |
| 426 | 445 | |
| ... | ... | @@ -439,6 +458,12 @@ |
| 439 | 458 | size[0] = gd->bd->bi_dram[0].size; |
| 440 | 459 | base[1] = gd->bd->bi_dram[1].start; |
| 441 | 460 | size[1] = gd->bd->bi_dram[1].size; |
| 461 | + | |
| 462 | +#ifdef CONFIG_GIC_V3_ITS | |
| 463 | + gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE; | |
| 464 | + gic_lpi_tables_init(gic_lpi_base, cpu_numcores()); | |
| 465 | + fdt_fixup_gic_lpi_memory(blob, gic_lpi_base); | |
| 466 | +#endif | |
| 442 | 467 | |
| 443 | 468 | #ifdef CONFIG_RESV_RAM |
| 444 | 469 | /* reduce size if reserved memory is within this bank */ |