Eric Lee / smarc-uboot

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Commit cb957cda2bedc31209f5c483cacb5ddc4f5754c8

Authored by Masahiro Yamada
Committed by Tom Rini
1 parent 50b82c4b70
Exists in v2017.01-smarct4x and in 37 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

ARM: davinci: remove hawkboard support 

This is still a non-generic board.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Sughosh Ganu <urwithsughosh@gmail.com>
Cc: Syed Mohammed Khasim <sm.khasim@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>

Showing 12 changed files with 1 additions and 540 deletions Side-by-side Diff

arch/arm/mach-davinci/Kconfig
Diff comments   View file @ cb957cd
... ... @@ -21,10 +21,6 @@
21 21 bool "CAM ENC 4xx board"
22 22 select SUPPORT_SPL
23 23  
24   -config TARGET_HAWKBOARD
25   - bool "Hawkboard"
26   - select SUPPORT_SPL
27   -
28 24 config TARGET_DAVINCI_DM355EVM
29 25 bool "DM355 EVM board"
30 26  
board/davinci/da8xxevm/Kconfig
Diff comments   View file @ cb957cd
... ... @@ -23,17 +23,4 @@
23 23 default "da850evm"
24 24  
25 25 endif
26   -
27   -if TARGET_HAWKBOARD
28   -
29   -config SYS_BOARD
30   - default "da8xxevm"
31   -
32   -config SYS_VENDOR
33   - default "davinci"
34   -
35   -config SYS_CONFIG_NAME
36   - default "hawkboard"
37   -
38   -endif
board/davinci/da8xxevm/MAINTAINERS
Diff comments   View file @ cb957cd
... ... @@ -12,12 +12,4 @@
12 12 F: configs/da850_am18xxevm_defconfig
13 13 F: configs/da850evm_defconfig
14 14 F: configs/da850evm_direct_nor_defconfig
15   -
16   -HAWKBOARD BOARD
17   -M: Syed Mohammed Khasim <sm.khasim@gmail.com>
18   -M: Sughosh Ganu <urwithsughosh@gmail.com>
19   -S: Maintained
20   -F: include/configs/hawkboard.h
21   -F: configs/hawkboard_defconfig
22   -F: configs/hawkboard_uart_defconfig
board/davinci/da8xxevm/Makefile
Diff comments   View file @ cb957cd
... ... @@ -9,5 +9,4 @@
9 9  
10 10 obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += da830evm.o
11 11 obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += da850evm.o
12   -obj-$(CONFIG_MACH_DAVINCI_HAWK) += hawkboard.o
board/davinci/da8xxevm/README.hawkboard
View file @ cb957cd
1   -Summary
2   -=======
3   -The README is for the boot procedure used for TI's OMAP-L138 based
4   -hawkboard. The hawkboard comes with a 128MiB Nand flash and a 128MiB
5   -DDR SDRAM along with a host of other controllers.
6   -
7   -The hawkboard is booted in three stages. The initial bootloader which
8   -executes upon reset is the Rom Boot Loader(RBL) which sits in the
9   -internal ROM of the omap. The RBL initialises the memory and the nand
10   -controller, and copies the image stored at a predefined location(block
11   -1) of the nand flash. The image loaded by the RBL to the memory is the
12   -AIS signed spl image. This, in turns copies the u-boot binary from the
13   -nand flash to the memory and jumps to the u-boot entry point.
14   -
15   -AIS is an image format defined by TI for the images that are to be
16   -loaded to memory by the RBL. The image is divided into a series of
17   -sections and the image's entry point is specified. Each section comes
18   -with meta data like the target address the section is to be copied to
19   -and the size of the section, which is used by the RBL to load the
20   -image. At the end of the image the RBL jumps to the image entry
21   -point.
22   -
23   -The secondary stage bootloader(spl) which is loaded by the RBL then
24   -loads the u-boot from a predefined location in the nand to the memory
25   -and jumps to the u-boot entry point.
26   -
27   -The reason a secondary stage bootloader is used is because the ECC
28   -layout expected by the RBL is not the same as that used by
29   -u-boot/linux. This also implies that for flashing the spl image,we
30   -need to use the u-boot which uses the ECC layout expected by the
31   -RBL[1]. Booting u-boot over UART(UART boot) is explained here[2].
32   -
33   -
34   -Compilation
35   -===========
36   -Three images might be needed
37   -
38   -* spl - This is the secondary bootloader which boots the u-boot
39   - binary.
40   -
41   -* u-boot binary - This is the image flashed to the nand and copied to
42   - the memory by the spl.
43   -
44   - Both the images get compiled with hawkboard_config, with the TOPDIR
45   - containing the u-boot images, and the spl image under the spl
46   - directory.
47   -
48   - The spl image needs to be processed with the AISGen tool for
49   - generating the AIS signed image to be flashed. Steps for generating
50   - the AIS image are explained here[3].
51   -
52   -* u-boot for uart boot - This is same as the u-boot binary generated
53   - above, with the sole difference of the CONFIG_SYS_TEXT_BASE being
54   - 0xc1080000, as expected by the RBL.
55   -
56   - hawkboard_uart_config
57   -
58   -
59   -Flashing the images to Nand
60   -===========================
61   -The spl AIS image needs to be flashed to the block 1 of the Nand
62   -flash, as that is the location the RBL expects the image[4]. For
63   -flashing the spl, boot over the u-boot specified in [1], and flash the
64   -image
65   -
66   -=> tftpboot 0xc0700000 <nand_spl_ais.bin>
67   -=> nand erase 0x20000 0x20000
68   -=> nand write.e 0xc0700000 0x20000 <nand_spl_size>
69   -
70   -The u-boot binary is flashed at location 0xe0000(block 6) of the nand
71   -flash. The spl loader expects the u-boot at this location. For
72   -flashing the u-boot binary
73   -
74   -=> tftpboot 0xc0700000 u-boot.bin
75   -=> nand erase 0xe0000 0x40000
76   -=> nand write.e 0xc0700000 0xe0000 <u-boot-size>
77   -
78   -
79   -Links
80   -=====
81   -
82   -[1]
83   - http://code.google.com/p/hawkboard/downloads/detail?name=u-boot_uart_ais_v1.bin
84   -
85   -[2]
86   - http://elinux.org/Hawkboard#Booting_u-boot_over_UART
87   -
88   -[3]
89   - http://elinux.org/Hawkboard#Signing_u-boot_for_UART_boot
90   -
91   -[4]
92   - http://processors.wiki.ti.com/index.php/RBL_UBL_and_host_program#RBL_booting_from_NAND_and_ECC.2FBad_blocks
board/davinci/da8xxevm/hawkboard-ais-nand.cfg
View file @ cb957cd
1   -# PLL0CFG0 PLL0CFG1
2   -PLL0 0x00180001 0x00000205
3   -# PLL1CFG0 PLL1CFG1 DRPYC1R SDCR SDTIMR1 SDTIMR2 SDRCR CLK2XSRC
4   -DDR2 0x15010001 0x00000002 0x00000043 0x00134632 0x26492a09 0x7d13c722 0x00000249 0x00000000
board/davinci/da8xxevm/hawkboard.c
View file @ cb957cd
1   -/*
2   - * Modified for Hawkboard - Syed Mohammed Khasim <khasim@beagleboard.org>
3   - *
4   - * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar@ti.com>
5   - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
6   - * Copyright (C) 2004 Texas Instruments.
7   - * Copyright (C) 2012 Sughosh Ganu <urwithsughosh@gmail.com>.
8   - *
9   - * ----------------------------------------------------------------------------
10   - * SPDX-License-Identifier: GPL-2.0+
11   - * ----------------------------------------------------------------------------
12   - */
13   -
14   -#include <common.h>
15   -#include <asm/errno.h>
16   -#include <asm/arch/hardware.h>
17   -#include <asm/io.h>
18   -#include <asm/arch/davinci_misc.h>
19   -#include <asm/arch/pinmux_defs.h>
20   -#include <asm/arch/da8xx-usb.h>
21   -#include <ns16550.h>
22   -
23   -DECLARE_GLOBAL_DATA_PTR;
24   -
25   -const struct pinmux_resource pinmuxes[] = {
26   - PINMUX_ITEM(emac_pins_mii),
27   - PINMUX_ITEM(emac_pins_mdio),
28   - PINMUX_ITEM(emifa_pins_cs3),
29   - PINMUX_ITEM(emifa_pins_cs4),
30   - PINMUX_ITEM(emifa_pins_nand),
31   - PINMUX_ITEM(uart2_pins_txrx),
32   - PINMUX_ITEM(uart2_pins_rtscts),
33   -};
34   -
35   -const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
36   -
37   -const struct lpsc_resource lpsc[] = {
38   - { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
39   - { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
40   - { DAVINCI_LPSC_EMAC }, /* image download */
41   - { DAVINCI_LPSC_UART2 }, /* console */
42   - { DAVINCI_LPSC_GPIO },
43   -};
44   -
45   -const int lpsc_size = ARRAY_SIZE(lpsc);
46   -
47   -int board_init(void)
48   -{
49   - /* arch number of the board */
50   - gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_HAWKBOARD;
51   -
52   - /* address of boot parameters */
53   - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
54   -
55   - return 0;
56   -}
57   -
58   -int board_early_init_f(void)
59   -{
60   - /*
61   - * Kick Registers need to be set to allow access to Pin Mux registers
62   - */
63   - writel(DV_SYSCFG_KICK0_UNLOCK, &davinci_syscfg_regs->kick0);
64   - writel(DV_SYSCFG_KICK1_UNLOCK, &davinci_syscfg_regs->kick1);
65   -
66   - /* set cfgchip3 to select mii */
67   - writel(readl(&davinci_syscfg_regs->cfgchip3) &
68   - ~(1 << 8), &davinci_syscfg_regs->cfgchip3);
69   -
70   - return 0;
71   -}
72   -
73   -int misc_init_r(void)
74   -{
75   - char buf[32];
76   -
77   - printf("ARM Clock : %s MHz\n",
78   - strmhz(buf, clk_get(DAVINCI_ARM_CLKID)));
79   -
80   - return 0;
81   -}
82   -
83   -int usb_phy_on(void)
84   -{
85   - u32 timeout;
86   - u32 cfgchip2;
87   -
88   - cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
89   -
90   - cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN |
91   - CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ |
92   - CFGCHIP2_USB1PHYCLKMUX);
93   - cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON |
94   - CFGCHIP2_REFFREQ_24MHZ | CFGCHIP2_USB2PHYCLKMUX |
95   - CFGCHIP2_USB1SUSPENDM;
96   -
97   - writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
98   -
99   - /* wait until the usb phy pll locks */
100   - timeout = DA8XX_USB_OTG_TIMEOUT;
101   - while (timeout--)
102   - if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD)
103   - return 1;
104   -
105   - /* USB phy was not turned on */
106   - return 0;
107   -}
108   -
109   -void usb_phy_off(void)
110   -{
111   - u32 cfgchip2;
112   -
113   - /*
114   - * Power down the on-chip PHY.
115   - */
116   - cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
117   - cfgchip2 &= ~(CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM);
118   - cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | CFGCHIP2_RESET;
119   - writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
120   -}
board/davinci/da8xxevm/u-boot-spl-hawk.lds
View file @ cb957cd
1   -/*
2   - * (C) Copyright 2002
3   - * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
4   - *
5   - * (C) Copyright 2008
6   - * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
7   - *
8   - * SPDX-License-Identifier: GPL-2.0+
9   - */
10   -
11   -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
12   -OUTPUT_ARCH(arm)
13   -ENTRY(_start)
14   -SECTIONS
15   -{
16   - . = 0xc1080000;
17   -
18   - . = ALIGN(4);
19   - .text :
20   - {
21   - *(.vectors)
22   - arch/arm/cpu/arm926ejs/start.o (.text*)
23   - arch/arm/cpu/arm926ejs/built-in.o (.text*)
24   - drivers/mtd/nand/built-in.o (.text*)
25   -
26   - *(.text*)
27   - }
28   -
29   - . = ALIGN(4);
30   - .rodata : { *(.rodata*) }
31   -
32   - . = ALIGN(4);
33   - .data : {
34   - *(.data)
35   - __datarel_start = .;
36   - *(.data.rel)
37   - __datarelrolocal_start = .;
38   - *(.data.rel.ro.local)
39   - __datarellocal_start = .;
40   - *(.data.rel.local)
41   - __datarelro_start = .;
42   - *(.data.rel.ro)
43   - }
44   -
45   - . = ALIGN(4);
46   - __image_copy_end = .;
47   - __rel_dyn_start = .;
48   - __rel_dyn_end = .;
49   -
50   - __got_start = .;
51   - . = ALIGN(4);
52   - .got : { *(.got) }
53   -
54   - __got_end = .;
55   -
56   - .bss :
57   - {
58   - . = ALIGN(4);
59   - __bss_start = .;
60   - *(.bss*)
61   - . = ALIGN(4);
62   - __bss_end = .;
63   - }
64   -
65   - .end :
66   - {
67   - *(.__end)
68   - }
69   -}
configs/hawkboard_defconfig
View file @ cb957cd
1   -CONFIG_SPL=y
2   -+S:CONFIG_ARM=y
3   -+S:CONFIG_ARCH_DAVINCI=y
4   -+S:CONFIG_TARGET_HAWKBOARD=y
configs/hawkboard_uart_defconfig
View file @ cb957cd
1   -CONFIG_SPL=y
2   -CONFIG_SYS_EXTRA_OPTIONS="UART_U_BOOT"
3   -+S:CONFIG_ARM=y
4   -+S:CONFIG_ARCH_DAVINCI=y
5   -+S:CONFIG_TARGET_HAWKBOARD=y
doc/README.scrapyard
Diff comments   View file @ cb957cd
... ... @@ -12,6 +12,7 @@
12 12  
13 13 Board Arch CPU Commit Removed Last known maintainer/contact
14 14 =================================================================================================
  15 +hawkboard arm arm926ejs - - Syed Mohammed Khasim <sm.khasim@gmail.com>:Sughosh Ganu <urwithsughosh@gmail.com>
15 16 tnetv107x arm arm1176 - - Chan-Taek Park <c-park@ti.com>
16 17 a320evb arm arm920t - - Po-Yu Chuang <ratbert@faraday-tech.com>
17 18 cm4008 arm arm920t - - Greg Ungerer <greg.ungerer@opengear.com>
include/configs/hawkboard.h
View file @ cb957cd
1   -/*
2   - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
3   - *
4   - * Based on davinci_dvevm.h. Original Copyrights follow:
5   - *
6   - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
7   - *
8   - * SPDX-License-Identifier: GPL-2.0+
9   - */
10   -
11   -#ifndef __CONFIG_H
12   -#define __CONFIG_H
13   -
14   -/*
15   - * Board
16   - */
17   -#define CONFIG_SYS_USE_NAND 1
18   -
19   -/*
20   - * SoC Configuration
21   - */
22   -#define CONFIG_MACH_DAVINCI_HAWK
23   -#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
24   -#define CONFIG_SOC_DA850 /* TI DA850 SoC */
25   -#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
26   -#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
27   -#define CONFIG_SYS_OSCIN_FREQ 24000000
28   -#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
29   -#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
30   -#define CONFIG_SKIP_LOWLEVEL_INIT
31   -#define CONFIG_BOARD_EARLY_INIT_F
32   -#define CONFIG_AIS_CONFIG_FILE "board/$(BOARDDIR)/hawkboard-ais-nand.cfg"
33   -
34   -#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \
35   - DAVINCI_SYSCFG_SUSPSRC_EMAC | \
36   - DAVINCI_SYSCFG_SUSPSRC_I2C | \
37   - DAVINCI_SYSCFG_SUSPSRC_SPI1 | \
38   - DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \
39   - DAVINCI_SYSCFG_SUSPSRC_UART2)
40   -
41   -#if defined(CONFIG_UART_U_BOOT)
42   -#define CONFIG_SYS_TEXT_BASE 0xc1080000
43   -#elif !defined(CONFIG_SPL_BUILD)
44   -#define CONFIG_SYS_TEXT_BASE 0xc1180000
45   -#endif
46   -
47   -/* Spl */
48   -#define CONFIG_SPL_FRAMEWORK
49   -#define CONFIG_SPL_BOARD_INIT
50   -#define CONFIG_SPL_NAND_SUPPORT
51   -#define CONFIG_SPL_NAND_BASE
52   -#define CONFIG_SPL_NAND_DRIVERS
53   -#define CONFIG_SPL_NAND_ECC
54   -#define CONFIG_SPL_NAND_SIMPLE
55   -#define CONFIG_SPL_LIBGENERIC_SUPPORT /* for udelay and __div64_32 for NAND */
56   -#define CONFIG_SPL_SERIAL_SUPPORT
57   -#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-hawk.lds"
58   -#define CONFIG_SPL_TEXT_BASE 0xc1080000
59   -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
60   -
61   -/*
62   - * Memory Info
63   - */
64   -#define CONFIG_SYS_MALLOC_LEN (1*1024*1024) /* malloc() len */
65   -#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE
66   -#define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */
67   -#define CONFIG_SYS_SDRAM_BASE 0xc0000000
68   -#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20)
69   -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 -\
70   - GENERATED_GBL_DATA_SIZE)
71   -#define CONFIG_SYS_MONITOR_LEN 0x60000
72   -
73   -/* memtest start addr */
74   -#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1)
75   -
76   -/* memtest will be run on 16MB */
77   -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024)
78   -
79   -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
80   -
81   -/*
82   - * Serial Driver info
83   - */
84   -#define CONFIG_SYS_NS16550
85   -#define CONFIG_SYS_NS16550_SERIAL
86   -#define CONFIG_SYS_NS16550_REG_SIZE -4
87   -#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE
88   -#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
89   -#define CONFIG_CONS_INDEX 1
90   -#define CONFIG_BAUDRATE 115200
91   -
92   -/*
93   - * Network & Ethernet Configuration
94   - */
95   -#define CONFIG_DRIVER_TI_EMAC
96   -#define CONFIG_MII
97   -#define CONFIG_BOOTP_DNS
98   -#define CONFIG_BOOTP_DNS2
99   -#define CONFIG_BOOTP_SEND_HOSTNAME
100   -#define CONFIG_NET_RETRY_COUNT 10
101   -
102   -/*
103   - * Nand Flash
104   - */
105   -#ifdef CONFIG_SYS_USE_NAND
106   -#define CONFIG_SYS_NO_FLASH
107   -#define CONFIG_ENV_IS_IN_NAND
108   -#define CONFIG_ENV_SIZE (128 << 10)
109   -#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
110   -#define CONFIG_CLE_MASK 0x10
111   -#define CONFIG_ALE_MASK 0x8
112   -#define CONFIG_SYS_NAND_USE_FLASH_BBT
113   -#define CONFIG_NAND_DAVINCI
114   -#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
115   -#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST /* SPL nand driver configuration */
116   -#define CFG_DAVINCI_STD_NAND_LAYOUT
117   -#define CONFIG_SYS_NAND_CS 3
118   -#define CONFIG_SYS_NAND_PAGE_2K
119   -/* Max number of NAND devices */
120   -#define CONFIG_SYS_MAX_NAND_DEVICE 1
121   -#define CONFIG_SYS_NAND_BASE_LIST { 0x62000000, }
122   -/* Block 0--not used by bootcode */
123   -#define CONFIG_ENV_OFFSET 0x0
124   -
125   -#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10)
126   -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
127   -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000
128   -#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000
129   -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
130   -#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \
131   - CONFIG_SYS_NAND_U_BOOT_SIZE - \
132   - CONFIG_SYS_MALLOC_LEN - \
133   - GENERATED_GBL_DATA_SIZE)
134   -#define CONFIG_SYS_NAND_ECCPOS { \
135   - 24, 25, 26, 27, 28, \
136   - 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \
137   - 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \
138   - 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \
139   - 59, 60, 61, 62, 63 }
140   -#define CONFIG_SYS_NAND_PAGE_COUNT 64
141   -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
142   -#define CONFIG_SYS_NAND_ECCSIZE 512
143   -#define CONFIG_SYS_NAND_ECCBYTES 10
144   -#define CONFIG_SYS_NAND_OOBSIZE 64
145   -
146   -#endif /* CONFIG_SYS_USE_NAND */
147   -
148   -/* USB Configs */
149   -#define CONFIG_SYS_USB_OHCI_CPU_INIT
150   -#define CONFIG_USB_OHCI_NEW
151   -#define CONFIG_USB_OHCI_DA8XX
152   -#define CONFIG_USB_STORAGE
153   -#define CONFIG_DOS_PARTITION
154   -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x01E25000
155   -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
156   -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "hawkboard"
157   -
158   -/*
159   - * U-Boot general configuration
160   - */
161   -#define CONFIG_MISC_INIT_R
162   -#define CONFIG_BOOTFILE "uImage" /* Boot file name */
163   -#define CONFIG_SYS_PROMPT "hawkboard > " /* Command Prompt */
164   -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
165   -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
166   -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
167   -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
168   -#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
169   -#define CONFIG_VERSION_VARIABLE
170   -#define CONFIG_AUTO_COMPLETE
171   -#define CONFIG_SYS_HUSH_PARSER
172   -#define CONFIG_CMDLINE_EDITING
173   -#define CONFIG_SYS_LONGHELP
174   -#define CONFIG_CRC32_VERIFY
175   -#define CONFIG_MX_CYCLIC
176   -
177   -/*
178   - * Linux Information
179   - */
180   -#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100)
181   -#define CONFIG_CMDLINE_TAG
182   -#define CONFIG_SETUP_MEMORY_TAGS
183   -#define CONFIG_BOOTARGS \
184   - "mem=128M console=ttyS2,115200n8 root=/dev/ram0 rw initrd=0xc1180000,"\
185   - "4M ip=static"
186   -#define CONFIG_BOOTDELAY 3
187   -
188   -/*
189   - * U-Boot commands
190   - */
191   -#include <config_cmd_default.h>
192   -#define CONFIG_CMD_ENV
193   -#define CONFIG_CMD_ASKENV
194   -#define CONFIG_CMD_DHCP
195   -#define CONFIG_CMD_DIAG
196   -#define CONFIG_CMD_MII
197   -#define CONFIG_CMD_PING
198   -#define CONFIG_CMD_SAVES
199   -#define CONFIG_CMD_MEMORY
200   -#define CONFIG_CMD_USB
201   -#define CONFIG_CMD_EXT2
202   -
203   -#ifdef CONFIG_CMD_BDI
204   -#define CONFIG_CLOCKS
205   -#endif
206   -
207   -#ifdef CONFIG_SYS_USE_NAND
208   -#undef CONFIG_CMD_FLASH
209   -#undef CONFIG_CMD_IMLS
210   -#define CONFIG_CMD_NAND
211   -#endif
212   -
213   -#ifndef CONFIG_DRIVER_TI_EMAC
214   -#undef CONFIG_CMD_NET
215   -#undef CONFIG_CMD_DHCP
216   -#undef CONFIG_CMD_MII
217   -#undef CONFIG_CMD_PING
218   -#endif
219   -
220   -#endif /* __CONFIG_H */