Commit cc175e6353b088c6c79d8d51b56d76972aab5c65
Committed by
Tom Rini
1 parent
166e5cc627
Exists in
master
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Add DDR3 support for IGEP COM AQUILA/CYGNUS.
These boards uses Samsung K4B2G1646E-BIH9 a 2Gb E-die DDR3 SDRAM. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Showing 1 changed file with 17 additions and 0 deletions Side-by-side Diff
arch/arm/include/asm/arch-am33xx/ddr_defs.h
... | ... | @@ -117,6 +117,23 @@ |
117 | 117 | #define MT41J512M8RH125_PHY_WR_DATA 0x74 |
118 | 118 | #define MT41J512M8RH125_IOCTRL_VALUE 0x18B |
119 | 119 | |
120 | +/* Samsung K4B2G1646E-BIH9 */ | |
121 | +#define K4B2G1646EBIH9_EMIF_READ_LATENCY 0x06 | |
122 | +#define K4B2G1646EBIH9_EMIF_TIM1 0x0888A39B | |
123 | +#define K4B2G1646EBIH9_EMIF_TIM2 0x2A04011A | |
124 | +#define K4B2G1646EBIH9_EMIF_TIM3 0x501F820F | |
125 | +#define K4B2G1646EBIH9_EMIF_SDCFG 0x61C24AB2 | |
126 | +#define K4B2G1646EBIH9_EMIF_SDREF 0x0000093B | |
127 | +#define K4B2G1646EBIH9_ZQ_CFG 0x50074BE4 | |
128 | +#define K4B2G1646EBIH9_DLL_LOCK_DIFF 0x1 | |
129 | +#define K4B2G1646EBIH9_RATIO 0x40 | |
130 | +#define K4B2G1646EBIH9_INVERT_CLKOUT 0x1 | |
131 | +#define K4B2G1646EBIH9_RD_DQS 0x3B | |
132 | +#define K4B2G1646EBIH9_WR_DQS 0x85 | |
133 | +#define K4B2G1646EBIH9_PHY_FIFO_WE 0x100 | |
134 | +#define K4B2G1646EBIH9_PHY_WR_DATA 0xC1 | |
135 | +#define K4B2G1646EBIH9_IOCTRL_VALUE 0x18B | |
136 | + | |
120 | 137 | /** |
121 | 138 | * Configure DMM |
122 | 139 | */ |