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Commit cd6ddc48134297497d226209a4e6ea72b71c87c5

Authored by Fabio Estevam
Committed by Stefano Babic
1 parent 9a8804a85e
Exists in v2017.01-smarct4x and in 34 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

mx6_common: Fix LOADADDR and SYS_TEXT_BASE for MX6SL and MX6SX 

Commit 8183058188cd2d942 ("imx6: centralise common boot options in
mx6_common.h") broke boot on mx6sl and mx6sx by assuming that all mx6
SoCs use the same LOADADDR/SYS_TEXT_BASE range, which is not correct.

DDR on mx6sx/mx6sl starts at 0x80000000.

Adjust LOADADDR/SYS_TEXT_BASE to the proper values for mx6sx/mx6sl,
so that these SoCs can boot again.

Also, TQMA6 requires a custom CONFIG_SYS_TEXT_BASE value, so move
its setting prior to the inclusion of mx6_common.h.

Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>

Showing 2 changed files with 16 additions and 8 deletions Side-by-side Diff

include/configs/mx6_common.h
Diff comments   View file @ cd6ddc4
... ... @@ -53,11 +53,19 @@
53 53 #define CONFIG_REVISION_TAG
54 54  
55 55 /* Boot options */
  56 +#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL))
  57 +#define CONFIG_LOADADDR 0x82000000
  58 +#ifndef CONFIG_SYS_TEXT_BASE
  59 +#define CONFIG_SYS_TEXT_BASE 0x87800000
  60 +#endif
  61 +#else
56 62 #define CONFIG_LOADADDR 0x12000000
57   -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
58 63 #ifndef CONFIG_SYS_TEXT_BASE
59 64 #define CONFIG_SYS_TEXT_BASE 0x17800000
60 65 #endif
  66 +#endif
  67 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  68 +
61 69 #ifndef CONFIG_BOOTDELAY
62 70 #define CONFIG_BOOTDELAY 3
63 71 #endif
include/configs/tqma6.h
Diff comments   View file @ cd6ddc4
... ... @@ -22,6 +22,13 @@
22 22  
23 23 /* #endif */
24 24  
  25 +/* place code in last 4 MiB of RAM */
  26 +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
  27 +#define CONFIG_SYS_TEXT_BASE 0x2fc00000
  28 +#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D)
  29 +#define CONFIG_SYS_TEXT_BASE 0x4fc00000
  30 +#endif
  31 +
25 32 #include "mx6_common.h"
26 33  
27 34 #if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
... ... @@ -117,13 +124,6 @@
117 124 #define CONFIG_CMD_BMODE
118 125 #define CONFIG_CMD_ITEST
119 126 #define CONFIG_CMD_SETEXPR
120   -
121   -/* place code in last 4 MiB of RAM */
122   -#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
123   -#define CONFIG_SYS_TEXT_BASE 0x2fc00000
124   -#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D)
125   -#define CONFIG_SYS_TEXT_BASE 0x4fc00000
126   -#endif
127 127  
128 128 #define CONFIG_ENV_SIZE (SZ_8K)
129 129 /* Size of malloc() pool */