Commit ce31ac7f724aaafd2760bd9d7c4d93a563505511

Authored by Madan Srinivas
Committed by Tom Rini
1 parent 98350f7f37

arm: am33xx: Kconfig: Add secure device definitions

Adds a new Kconfig file for AM33xx class devices. We
need a common place to define CONFIG parameters
for these SOCs, especially for adding support
for secure devices.

a) Adds a definition for ISW_ENTRY_ADDR. This is the
address to which the ROM branches when the SOC
ROM hands off execution to the boot loader.
CONFIG_SYS_TEXT_BASE and CONFIG_SPL_TEXT_BASE are set
to this value for AM43xx devices.

b) Adds CONFIG_PUB_ROM_DATA_SIZE which is used to
calculate CONFIG_SPL_MAX_SIZE. This value indicates the
amount of memory needed by the ROM to store data during
the boot process.

Currently, these CONFIG options are used only by AM43xx,
but in future other AM33xx class SOCs will also use them.

Signed-off-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Daniel Allred <d-allred@ti.com>

Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

Showing 1 changed file with 27 additions and 0 deletions Side-by-side Diff

arch/arm/cpu/armv7/am33xx/Kconfig
  1 +config ISW_ENTRY_ADDR
  2 + hex "Address in memory or XIP flash of bootloader entry point"
  3 + help
  4 + After any reset, the boot ROM on the AM43XX SOC
  5 + searches the boot media for a valid boot image.
  6 + For non-XIP devices, the ROM then copies the
  7 + image into internal memory.
  8 + For all boot modes, after the ROM processes the
  9 + boot image it eventually computes the entry
  10 + point address depending on the device type
  11 + (secure/non-secure), boot media (xip/non-xip) and
  12 + image headers.
  13 + default 0x402F4000
  14 +
  15 +config PUB_ROM_DATA_SIZE
  16 + hex "Size in bytes of the L3 SRAM reserved by ROM to store data"
  17 + help
  18 + During the device boot, the public ROM uses the top of
  19 + the public L3 OCMC RAM to store r/w data like stack,
  20 + heap, globals etc. When the ROM is copying the boot
  21 + image from the boot media into memory, the image must
  22 + not spill over into this area. This value can be used
  23 + during compile time to determine the maximum size of a
  24 + boot image. Once the ROM transfers control to the boot
  25 + image, this area is no longer used, and can be reclaimed
  26 + for run time use by the boot image.
  27 + default 0x8400