Eric Lee / smarc-uboot

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Commit ced8dc6ce85f2227a29a52d55836b73223e71e73

Authored by Ye Li
1 parent ebdf2c75f3
Exists in smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga and in 5 other branches smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga

MLK-19263-2 imx8mq_evk: Adjust SPL malloc pool and stack address 

Currently the SRAM is allocated to malloc pool due to large malloc needed
by USB SDP. The stack is moved to OCRAM. This causes a problem when enabling
HAB. The HAB authentication needs large memory on stack, so after ATF image loaded,
the stack overwrites the ATF image in OCRAM and causes authentication failed.

This patch moves the malloc pool to DDR and set back stack to SRAM. So SDP still
can run with enough memory on DDR. And the stack overwrite issue can be fixed by
enough memory 24KB left on SRAM.

This change also need to use a early malloc pool by defining the CONFIG_MALLOC_F_ADDR.
And in SPL codes, we have to adjust DDR init before board_init_r.

Signed-off-by: Ye Li <ye.li@nxp.com>

Showing 2 changed files with 25 additions and 13 deletions Side-by-side Diff

board/freescale/imx8mq_evk/spl.c
Diff comments   View file @ ced8dc6
... ... @@ -187,16 +187,6 @@
187 187  
188 188 void spl_board_init(void)
189 189 {
190   - enable_tzc380();
191   -
192   - /* Adjust pmic voltage to 1.0V for 800M */
193   - setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
194   -
195   - power_init_board();
196   -
197   - /* DDR initialization */
198   - spl_dram_init();
199   -
200 190 #ifndef CONFIG_SPL_USB_SDP_SUPPORT
201 191 /* Serial download mode */
202 192 if (is_usb_boot()) {
... ... @@ -205,6 +195,8 @@
205 195 }
206 196 #endif
207 197  
  198 + init_usb_clk();
  199 +
208 200 puts("Normal Boot\n");
209 201 }
210 202  
... ... @@ -220,6 +212,8 @@
220 212  
221 213 void board_init_f(ulong dummy)
222 214 {
  215 + int ret;
  216 +
223 217 /* Clear global data */
224 218 memset((void *)gd, 0, sizeof(gd_t));
225 219  
... ... @@ -235,6 +229,22 @@
235 229  
236 230 /* Clear the BSS. */
237 231 memset(__bss_start, 0, __bss_end - __bss_start);
  232 +
  233 + ret = spl_init();
  234 + if (ret) {
  235 + debug("spl_init() failed: %d\n", ret);
  236 + hang();
  237 + }
  238 +
  239 + enable_tzc380();
  240 +
  241 + /* Adjust pmic voltage to 1.0V for 800M */
  242 + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
  243 +
  244 + power_init_board();
  245 +
  246 + /* DDR initialization */
  247 + spl_dram_init();
238 248  
239 249 board_init_r(NULL, 0);
240 250 }
include/configs/imx8mq_evk.h
Diff comments   View file @ ced8dc6
... ... @@ -29,7 +29,7 @@
29 29 #define CONFIG_SPL_POWER_SUPPORT
30 30 #define CONFIG_SPL_I2C_SUPPORT
31 31 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
32   -#define CONFIG_SPL_STACK 0x91FFF0
  32 +#define CONFIG_SPL_STACK 0x187FF0
33 33 #define CONFIG_SPL_LIBCOMMON_SUPPORT
34 34 #define CONFIG_SPL_LIBGENERIC_SUPPORT
35 35 #define CONFIG_SPL_SERIAL_SUPPORT
36 36  
... ... @@ -37,11 +37,13 @@
37 37 #define CONFIG_SPL_MMC_SUPPORT
38 38 #define CONFIG_SPL_BSS_START_ADDR 0x00180000
39 39 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
40   -#define CONFIG_SYS_SPL_MALLOC_START 0x00182000
41   -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x6000 /* 24 KB */
  40 +#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
  41 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
42 42 #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
43 43 #define CONFIG_SYS_ICACHE_OFF
44 44 #define CONFIG_SYS_DCACHE_OFF
  45 +
  46 +#define CONFIG_MALLOC_F_ADDR 0x182000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
45 47  
46 48 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
47 49