Merge git://git.denx.de/u-boot-sunxi

Update A20-OLinuXino-Lime2-eMMC_defconfig to include CONFIG_SCSI Signed-off-by: Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-sunxi
Update A20-OLinuXino-Lime2-eMMC_defconfig to include CONFIG_SCSI Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini
2 parents 470135be27 585bf8ae6f
Showing 13 changed files Side-by-side Diff
arch/arm/dts/Makefile
arch/arm/dts/sun50i-a64-nanopi-a64.dts
arch/arm/dts/sun50i-a64-olinuxino.dts
arch/arm/dts/sun50i-a64.dtsi
arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts
arch/arm/include/asm/arch-sunxi/prcm.h
arch/arm/mach-sunxi/clock_sun6i.c
board/sunxi/MAINTAINERS
configs/A20-OLinuXino-Lime2-eMMC_defconfig
configs/a64-olinuxino_defconfig
configs/nanopi_a64_defconfig
configs/orangepi_pc2_defconfig
configs/orangepi_zero_defconfig
@@ -336,6 +336,8 @@
 	sun50i-h5-orangepi-zero-plus2.dtb
 dtb-$(CONFIG_MACH_SUN50I) += \
 	sun50i-a64-bananapi-m64.dtb \
+	sun50i-a64-nanopi-a64.dtb \
+	sun50i-a64-olinuxino.dtb \
 	sun50i-a64-orangepi-win.dtb \
 	sun50i-a64-pine64-plus.dtb \
 	sun50i-a64-pine64.dtb
+/*
+ * Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	model = "FriendlyARM NanoPi A64";
+	compatible = "friendlyarm,nanopi-a64", "allwinner,sun50i-a64";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	reg_vcc3v3: vcc3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&ehci1 {
+	status = "okay";
+};
+
+/* i2c1 connected with gpio headers like pine64, bananapi */
+&i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1_pins>;
+	status = "disabled";
+};
+
+&i2c1_pins {
+	bias-pull-up;
+};
+
+&mmc0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc0_pins>;
+	vmmc-supply = <&reg_vcc3v3>;
+	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
+	cd-inverted;
+	disable-wp;
+	bus-width = <4>;
+	status = "okay";
+};
+
+&ohci0 {
+	status = "okay";
+};
+
+&ohci1 {
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins_a>;
+	status = "okay";
+};
+
+&usbphy {
+	status = "okay";
+};
+/*
+ * Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	model = "Olimex A64-Olinuxino";
+	compatible = "olimex,a64-olinuxino", "allwinner,sun50i-a64";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	reg_vcc3v3: vcc3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+};
+
+&mmc0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc0_pins>;
+	vmmc-supply = <&reg_vcc3v3>;
+	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
+	cd-inverted;
+	disable-wp;
+	bus-width = <4>;
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins_a>;
+	status = "okay";
+};
@@ -204,6 +204,28 @@
 			#phy-cells = <1>;
 		};
  
+		ehci0: usb@01c1a000 {
+			compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
+			reg = <0x01c1a000 0x100>;
+			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_OHCI0>,
+				 <&ccu CLK_BUS_EHCI0>,
+				 <&ccu CLK_USB_OHCI0>;
+			resets = <&ccu RST_BUS_OHCI0>,
+				 <&ccu RST_BUS_EHCI0>;
+			status = "disabled";
+		};
+
+		ohci0: usb@01c1a400 {
+			compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
+			reg = <0x01c1a400 0x100>;
+			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_OHCI0>,
+				 <&ccu CLK_USB_OHCI0>;
+			resets = <&ccu RST_BUS_OHCI0>;
+			status = "disabled";
+		};
+
 		ehci1: usb@01c1b000 {
 			compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
 			reg = <0x01c1b000 0x100>;
@@ -56,7 +56,7 @@
 };
  
 &pio {
-	mmc2_pins_nrst: mmc2@0 {
+	mmc2_pins_nrst: mmc2-rst-pin {
 		allwinner,pins = "PC16";
 		allwinner,function = "gpio_out";
 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
@@ -196,6 +196,10 @@
 #define PRCM_CPU3_PWR_CLAMP(n) (((n) & 0xff) << 0)
 #define PRCM_CPU3_PWR_CLAMP_MASK PRCM_CPU3_PWR_CLAMP(0xff)
  
+#define PRCM_SEC_SWITCH_APB0_CLK_NONSEC (0x1 << 0)
+#define PRCM_SEC_SWITCH_PLL_CFG_NONSEC (0x1 << 1)
+#define PRCM_SEC_SWITCH_PWR_GATE_NONSEC (0x1 << 2)
+
 #ifndef __ASSEMBLY__
 #include <linux/compiler.h>
  
@@ -233,6 +237,8 @@
 	u32 dram_pwr;		/* 0x180 */
 	u8 res12[0xc];		/* 0x184 */
 	u32 dram_tst;		/* 0x190 */
+	u8 res13[0x3c];		/* 0x194 */
+	u32 prcm_sec_switch;	/* 0x1d0 */
 };
  
 void prcm_apb0_enable(u32 flags);
@@ -66,11 +66,17 @@
 #ifdef CONFIG_MACH_SUNXI_H3_H5
 	struct sunxi_ccm_reg * const ccm =
 		(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+	struct sunxi_prcm_reg * const prcm =
+		(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
  
 	setbits_le32(&ccm->ccu_sec_switch,
 		     CCM_SEC_SWITCH_MBUS_NONSEC |
 		     CCM_SEC_SWITCH_BUS_NONSEC |
 		     CCM_SEC_SWITCH_PLL_NONSEC);
+	setbits_le32(&prcm->prcm_sec_switch,
+		     PRCM_SEC_SWITCH_APB0_CLK_NONSEC |
+		     PRCM_SEC_SWITCH_PLL_CFG_NONSEC |
+		     PRCM_SEC_SWITCH_PWR_GATE_NONSEC);
 #endif
 }
  
@@ -88,11 +88,21 @@
 S:	Maintained
 F:	configs/A20-OLinuXino-Lime2_defconfig
  
+A20-OLINUXINO-LIME2-EMMC BOARD
+M:	Olliver Schinagl <oliver@schinagl.nl>
+S:	Maintained
+F:	configs/A20-OLinuXino-Lime2-eMMC_defconfig
+
 A33-OLINUXINO BOARD
 M:	Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
 S:	Maintained
 F:	configs/A33-OLinuXino_defconfig
  
+A64-OLINUXINO BOARD
+M:	Jagan Teki <jagan@amarulasolutions.com>
+S:	Maintained
+F:	configs/a64-olinuxino_defconfig
+
 A80 OPTIMUS BOARD
 M:	Chen-Yu Tsai <wens@csie.org>
 S:	Maintained
@@ -266,6 +276,11 @@
 M:	Jelle van der Waa <jelle@vdwaa.nl>
 S:	Maintained
 F:	configs/nanopi_neo_air_defconfig
+
+NANOPI-A64 BOARD
+M:	Jagan Teki <jagan@amarulasolutions.com>
+S:	Maintained
+F:	configs/nanopi_a64_defconfig
  
 NINTENDO NES CLASSIC EDITION BOARD
 M:	FUKAUMI Naoki <naobsd@gmail.com>
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN7I=y
+CONFIG_DRAM_CLK=384
+CONFIG_MMC0_CD_PIN="PH1"
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_USB0_VBUS_PIN="PC17"
+CONFIG_USB0_VBUS_DET="PH5"
+CONFIG_I2C1_ENABLE=y
+CONFIG_SATAPWR="PC3"
+CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2-emmc"
+CONFIG_AHCI=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+CONFIG_SPL_I2C_SUPPORT=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_DFU=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FPGA is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_PARTITION_UUIDS is not set
+CONFIG_DFU_RAM=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
+CONFIG_SUN7I_GMAC=y
+CONFIG_AXP_ALDO3_VOLT=2800
+CONFIG_AXP_ALDO4_VOLT=2800
+CONFIG_SCSI=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
+CONFIG_G_DNL_VENDOR_NUM=0x1f3a
+CONFIG_G_DNL_PRODUCT_NUM=0x1010
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN50I=y
+CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN50I=y
+CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-nanopi-a64"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
@@ -4,6 +4,7 @@
 CONFIG_MACH_SUN50I_H5=y
 CONFIG_DRAM_CLK=672
 CONFIG_DRAM_ZQ=3881977
+CONFIG_MACPWR="PD6"
 CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL=y
@@ -2,7 +2,7 @@
 CONFIG_ARCH_SUNXI=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_MACH_SUN8I_H3=y
-CONFIG_DRAM_CLK=672
+CONFIG_DRAM_CLK=624
 CONFIG_DRAM_ZQ=3881979
 CONFIG_DRAM_ODT_EN=y
 # CONFIG_VIDEO_DE2 is not set
...	...	@@ -336,6 +336,8 @@
336	336	sun50i-h5-orangepi-zero-plus2.dtb
337	337	dtb-$(CONFIG_MACH_SUN50I) += \
338	338	sun50i-a64-bananapi-m64.dtb \
	339	+ sun50i-a64-nanopi-a64.dtb \
	340	+ sun50i-a64-olinuxino.dtb \
339	341	sun50i-a64-orangepi-win.dtb \
340	342	sun50i-a64-pine64-plus.dtb \
341	343	sun50i-a64-pine64.dtb
	1	+/*
	2	+ * Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
	3	+ *
	4	+ * This file is dual-licensed: you can use it either under the terms
	5	+ * of the GPL or the X11 license, at your option. Note that this dual
	6	+ * licensing only applies to this file, and not this project as a
	7	+ * whole.
	8	+ *
	9	+ * a) This library is free software; you can redistribute it and/or
	10	+ * modify it under the terms of the GNU General Public License as
	11	+ * published by the Free Software Foundation; either version 2 of the
	12	+ * License, or (at your option) any later version.
	13	+ *
	14	+ * This library is distributed in the hope that it will be useful,
	15	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	+ * GNU General Public License for more details.
	18	+ *
	19	+ * Or, alternatively,
	20	+ *
	21	+ * b) Permission is hereby granted, free of charge, to any person
	22	+ * obtaining a copy of this software and associated documentation
	23	+ * files (the "Software"), to deal in the Software without
	24	+ * restriction, including without limitation the rights to use,
	25	+ * copy, modify, merge, publish, distribute, sublicense, and/or
	26	+ * sell copies of the Software, and to permit persons to whom the
	27	+ * Software is furnished to do so, subject to the following
	28	+ * conditions:
	29	+ *
	30	+ * The above copyright notice and this permission notice shall be
	31	+ * included in all copies or substantial portions of the Software.
	32	+ *
	33	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	34	+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	35	+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	36	+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	37	+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	38	+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	39	+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	40	+ * OTHER DEALINGS IN THE SOFTWARE.
	41	+ */
	42	+
	43	+/dts-v1/;
	44	+
	45	+#include "sun50i-a64.dtsi"
	46	+
	47	+#include <dt-bindings/gpio/gpio.h>
	48	+
	49	+/ {
	50	+ model = "FriendlyARM NanoPi A64";
	51	+ compatible = "friendlyarm,nanopi-a64", "allwinner,sun50i-a64";
	52	+
	53	+ aliases {
	54	+ serial0 = &uart0;
	55	+ };
	56	+
	57	+ chosen {
	58	+ stdout-path = "serial0:115200n8";
	59	+ };
	60	+
	61	+ reg_vcc3v3: vcc3v3 {
	62	+ compatible = "regulator-fixed";
	63	+ regulator-name = "vcc3v3";
	64	+ regulator-min-microvolt = <3300000>;
	65	+ regulator-max-microvolt = <3300000>;
	66	+ };
	67	+};
	68	+
	69	+&ehci0 {
	70	+ status = "okay";
	71	+};
	72	+
	73	+&ehci1 {
	74	+ status = "okay";
	75	+};
	76	+
	77	+/* i2c1 connected with gpio headers like pine64, bananapi */
	78	+&i2c1 {
	79	+ pinctrl-names = "default";
	80	+ pinctrl-0 = <&i2c1_pins>;
	81	+ status = "disabled";
	82	+};
	83	+
	84	+&i2c1_pins {
	85	+ bias-pull-up;
	86	+};
	87	+
	88	+&mmc0 {
	89	+ pinctrl-names = "default";
	90	+ pinctrl-0 = <&mmc0_pins>;
	91	+ vmmc-supply = <&reg_vcc3v3>;
	92	+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
	93	+ cd-inverted;
	94	+ disable-wp;
	95	+ bus-width = <4>;
	96	+ status = "okay";
	97	+};
	98	+
	99	+&ohci0 {
	100	+ status = "okay";
	101	+};
	102	+
	103	+&ohci1 {
	104	+ status = "okay";
	105	+};
	106	+
	107	+&uart0 {
	108	+ pinctrl-names = "default";
	109	+ pinctrl-0 = <&uart0_pins_a>;
	110	+ status = "okay";
	111	+};
	112	+
	113	+&usbphy {
	114	+ status = "okay";
	115	+};
...	...	@@ -204,6 +204,28 @@
204	204	#phy-cells = <1>;
205	205	};
206	206
	207	+ ehci0: usb@01c1a000 {
	208	+ compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
	209	+ reg = <0x01c1a000 0x100>;
	210	+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
	211	+ clocks = <&ccu CLK_BUS_OHCI0>,
	212	+ <&ccu CLK_BUS_EHCI0>,
	213	+ <&ccu CLK_USB_OHCI0>;
	214	+ resets = <&ccu RST_BUS_OHCI0>,
	215	+ <&ccu RST_BUS_EHCI0>;
	216	+ status = "disabled";
	217	+ };
	218	+
	219	+ ohci0: usb@01c1a400 {
	220	+ compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
	221	+ reg = <0x01c1a400 0x100>;
	222	+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
	223	+ clocks = <&ccu CLK_BUS_OHCI0>,
	224	+ <&ccu CLK_USB_OHCI0>;
	225	+ resets = <&ccu RST_BUS_OHCI0>;
	226	+ status = "disabled";
	227	+ };
	228	+
207	229	ehci1: usb@01c1b000 {
208	230	compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
209	231	reg = <0x01c1b000 0x100>;
...	...	@@ -56,7 +56,7 @@
56	56	};
57	57
58	58	&pio {
59		- mmc2_pins_nrst: mmc2@0 {
	59	+ mmc2_pins_nrst: mmc2-rst-pin {
60	60	allwinner,pins = "PC16";
61	61	allwinner,function = "gpio_out";
62	62	allwinner,drive = <SUN4I_PINCTRL_10_MA>;
...	...	@@ -196,6 +196,10 @@
196	196	#define PRCM_CPU3_PWR_CLAMP(n) (((n) & 0xff) << 0)
197	197	#define PRCM_CPU3_PWR_CLAMP_MASK PRCM_CPU3_PWR_CLAMP(0xff)
198	198
	199	+#define PRCM_SEC_SWITCH_APB0_CLK_NONSEC (0x1 << 0)
	200	+#define PRCM_SEC_SWITCH_PLL_CFG_NONSEC (0x1 << 1)
	201	+#define PRCM_SEC_SWITCH_PWR_GATE_NONSEC (0x1 << 2)
	202	+
199	203	#ifndef __ASSEMBLY__
200	204	#include <linux/compiler.h>
201	205
...	...	@@ -233,6 +237,8 @@
233	237	u32 dram_pwr; /* 0x180 */
234	238	u8 res12[0xc]; /* 0x184 */
235	239	u32 dram_tst; /* 0x190 */
	240	+ u8 res13[0x3c]; /* 0x194 */
	241	+ u32 prcm_sec_switch; /* 0x1d0 */
236	242	};
237	243
238	244	void prcm_apb0_enable(u32 flags);
...	...	@@ -66,11 +66,17 @@
66	66	#ifdef CONFIG_MACH_SUNXI_H3_H5
67	67	struct sunxi_ccm_reg * const ccm =
68	68	(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
	69	+ struct sunxi_prcm_reg * const prcm =
	70	+ (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
69	71
70	72	setbits_le32(&ccm->ccu_sec_switch,
71	73	CCM_SEC_SWITCH_MBUS_NONSEC \|
72	74	CCM_SEC_SWITCH_BUS_NONSEC \|
73	75	CCM_SEC_SWITCH_PLL_NONSEC);
	76	+ setbits_le32(&prcm->prcm_sec_switch,
	77	+ PRCM_SEC_SWITCH_APB0_CLK_NONSEC \|
	78	+ PRCM_SEC_SWITCH_PLL_CFG_NONSEC \|
	79	+ PRCM_SEC_SWITCH_PWR_GATE_NONSEC);
74	80	#endif
75	81	}
76	82
...	...	@@ -88,11 +88,21 @@
88	88	S: Maintained
89	89	F: configs/A20-OLinuXino-Lime2_defconfig
90	90
	91	+A20-OLINUXINO-LIME2-EMMC BOARD
	92	+M: Olliver Schinagl <oliver@schinagl.nl>
	93	+S: Maintained
	94	+F: configs/A20-OLinuXino-Lime2-eMMC_defconfig
	95	+
91	96	A33-OLINUXINO BOARD
92	97	M: Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
93	98	S: Maintained
94	99	F: configs/A33-OLinuXino_defconfig
95	100
	101	+A64-OLINUXINO BOARD
	102	+M: Jagan Teki <jagan@amarulasolutions.com>
	103	+S: Maintained
	104	+F: configs/a64-olinuxino_defconfig
	105	+
96	106	A80 OPTIMUS BOARD
97	107	M: Chen-Yu Tsai <wens@csie.org>
98	108	S: Maintained
...	...	@@ -266,6 +276,11 @@
266	276	M: Jelle van der Waa <jelle@vdwaa.nl>
267	277	S: Maintained
268	278	F: configs/nanopi_neo_air_defconfig
	279	+
	280	+NANOPI-A64 BOARD
	281	+M: Jagan Teki <jagan@amarulasolutions.com>
	282	+S: Maintained
	283	+F: configs/nanopi_a64_defconfig
269	284
270	285	NINTENDO NES CLASSIC EDITION BOARD
271	286	M: FUKAUMI Naoki <naobsd@gmail.com>
	1	+CONFIG_ARM=y
	2	+CONFIG_ARCH_SUNXI=y
	3	+CONFIG_MACH_SUN7I=y
	4	+CONFIG_DRAM_CLK=384
	5	+CONFIG_MMC0_CD_PIN="PH1"
	6	+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
	7	+CONFIG_USB0_VBUS_PIN="PC17"
	8	+CONFIG_USB0_VBUS_DET="PH5"
	9	+CONFIG_I2C1_ENABLE=y
	10	+CONFIG_SATAPWR="PC3"
	11	+CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2-emmc"
	12	+CONFIG_AHCI=y
	13	+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
	14	+CONFIG_SPL=y
	15	+CONFIG_SPL_I2C_SUPPORT=y
	16	+# CONFIG_CMD_IMLS is not set
	17	+# CONFIG_CMD_FLASH is not set
	18	+CONFIG_CMD_DFU=y
	19	+CONFIG_CMD_USB_MASS_STORAGE=y
	20	+# CONFIG_CMD_FPGA is not set
	21	+# CONFIG_SPL_DOS_PARTITION is not set
	22	+# CONFIG_SPL_ISO_PARTITION is not set
	23	+# CONFIG_SPL_PARTITION_UUIDS is not set
	24	+CONFIG_DFU_RAM=y
	25	+CONFIG_ETH_DESIGNWARE=y
	26	+CONFIG_RGMII=y
	27	+CONFIG_SUN7I_GMAC=y
	28	+CONFIG_AXP_ALDO3_VOLT=2800
	29	+CONFIG_AXP_ALDO4_VOLT=2800
	30	+CONFIG_SCSI=y
	31	+CONFIG_USB_EHCI_HCD=y
	32	+CONFIG_USB_MUSB_GADGET=y
	33	+CONFIG_USB_GADGET=y
	34	+CONFIG_USB_GADGET_DOWNLOAD=y
	35	+CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
	36	+CONFIG_G_DNL_VENDOR_NUM=0x1f3a
	37	+CONFIG_G_DNL_PRODUCT_NUM=0x1010
	1	+CONFIG_ARM=y
	2	+CONFIG_ARCH_SUNXI=y
	3	+CONFIG_MACH_SUN50I=y
	4	+CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
	5	+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino"
	6	+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
	7	+CONFIG_SPL=y
	8	+# CONFIG_CMD_IMLS is not set
	9	+# CONFIG_CMD_FLASH is not set
	10	+# CONFIG_CMD_FPGA is not set
	11	+# CONFIG_SPL_DOS_PARTITION is not set
	12	+# CONFIG_SPL_ISO_PARTITION is not set
	13	+# CONFIG_SPL_EFI_PARTITION is not set
	14	+CONFIG_SUN8I_EMAC=y
	15	+CONFIG_USB_EHCI_HCD=y
...	...	@@ -4,6 +4,7 @@
4	4	CONFIG_MACH_SUN50I_H5=y
5	5	CONFIG_DRAM_CLK=672
6	6	CONFIG_DRAM_ZQ=3881977
	7	+CONFIG_MACPWR="PD6"
7	8	CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2"
8	9	# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
9	10	CONFIG_SPL=y