Commit cf630f289f10f380bd0fb66289517021069c5079
Committed by
Tom Rini
1 parent
2a292a8df4
Exists in
v2017.01-smarct4x
and in
37 other branches
board/BuR/kwb: switch to board HW-Rev3
The board has been redesigned, therefore we need from now other I/O Pins to mux and handle. Older boards aren't supported from now anymore. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Showing 3 changed files with 89 additions and 63 deletions Side-by-side Diff
board/BuR/kwb/board.c
... | ... | @@ -26,14 +26,13 @@ |
26 | 26 | #include <i2c.h> |
27 | 27 | #include <power/tps65217.h> |
28 | 28 | #include "../common/bur_common.h" |
29 | +#include <lcd.h> | |
29 | 30 | |
30 | 31 | /* -------------------------------------------------------------------------*/ |
31 | 32 | /* -- defines for used GPIO Hardware -- */ |
32 | -#define KEY (0+4) | |
33 | -#define LCD_PWR (0+5) | |
34 | -#define PUSH_KEY (0+31) | |
35 | -#define USB2SD_NRST (32+29) | |
36 | -#define USB2SD_PWR (96+13) | |
33 | +#define ESC_KEY (0+19) | |
34 | +#define LCD_PWR (0+5) | |
35 | +#define PUSH_KEY (0+31) | |
37 | 36 | /* -------------------------------------------------------------------------*/ |
38 | 37 | /* -- PSOC Resetcontroller Register defines -- */ |
39 | 38 | |
... | ... | @@ -46,6 +45,7 @@ |
46 | 45 | |
47 | 46 | /* -- defines for RSTCTRL_CTRLREG -- */ |
48 | 47 | #define RSTCTRL_FORCE_PWR_NEN 0x0404 |
48 | +#define RSTCTRL_CAN_STB 0x4040 | |
49 | 49 | |
50 | 50 | #if defined(CONFIG_SPL_BUILD) |
51 | 51 | /* TODO: check ram-timing ! */ |
52 | 52 | |
... | ... | @@ -107,10 +107,13 @@ |
107 | 107 | &cmper->epwmss0clkctrl, |
108 | 108 | &cmper->epwmss1clkctrl, |
109 | 109 | &cmper->epwmss2clkctrl, |
110 | + &cmper->lcdclkctrl, | |
111 | + &cmper->lcdcclkstctrl, | |
110 | 112 | 0 |
111 | 113 | }; |
112 | 114 | do_enable_clocks(clk_domains, clk_modules_kwbspecific, 1); |
113 | - | |
115 | + /* setup LCD-Pixel Clock */ | |
116 | + writel(0x2, CM_DPLL + 0x34); | |
114 | 117 | /* power-OFF LCD-Display */ |
115 | 118 | gpio_direction_output(LCD_PWR, 0); |
116 | 119 | |
... | ... | @@ -121,7 +124,7 @@ |
121 | 124 | /* power-ON 3V3 via Resetcontroller */ |
122 | 125 | oldspeed = i2c_get_bus_speed(); |
123 | 126 | if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) { |
124 | - buf = RSTCTRL_FORCE_PWR_NEN; | |
127 | + buf = RSTCTRL_FORCE_PWR_NEN | RSTCTRL_CAN_STB; | |
125 | 128 | i2c_write(RSTCTRL_ADDR, RSTCTRL_CTRLREG, 1, |
126 | 129 | (uint8_t *)&buf, sizeof(buf)); |
127 | 130 | i2c_set_bus_speed(oldspeed); |
... | ... | @@ -129,15 +132,6 @@ |
129 | 132 | puts("ERROR: i2c_set_bus_speed failed! (turn on PWR_nEN)\n"); |
130 | 133 | } |
131 | 134 | |
132 | -#if defined(CONFIG_AM335X_USB0) | |
133 | - /* power on USB2SD Controller */ | |
134 | - gpio_direction_output(USB2SD_PWR, 1); | |
135 | - mdelay(1); | |
136 | - /* give a reset Pulse to USB2SD Controller */ | |
137 | - gpio_direction_output(USB2SD_NRST, 0); | |
138 | - mdelay(1); | |
139 | - gpio_set_value(USB2SD_NRST, 1); | |
140 | -#endif | |
141 | 135 | pmicsetup(0); |
142 | 136 | } |
143 | 137 | |
... | ... | @@ -166,7 +160,6 @@ |
166 | 160 | #ifdef CONFIG_BOARD_LATE_INIT |
167 | 161 | int board_late_init(void) |
168 | 162 | { |
169 | - const unsigned int ton = 250; | |
170 | 163 | const unsigned int toff = 1000; |
171 | 164 | unsigned int cnt = 3; |
172 | 165 | unsigned short buf = 0xAAAA; |
173 | 166 | |
174 | 167 | |
175 | 168 | |
176 | 169 | |
177 | 170 | |
178 | 171 | |
179 | 172 | |
180 | 173 | |
181 | 174 | |
182 | 175 | |
183 | 176 | |
184 | 177 | |
... | ... | @@ -175,50 +168,77 @@ |
175 | 168 | tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, |
176 | 169 | TPS65217_WLEDCTRL2, 0x32, 0xFF); /* 50% dimlevel */ |
177 | 170 | |
178 | - if (gpio_get_value(KEY)) { | |
171 | + if (gpio_get_value(ESC_KEY)) { | |
179 | 172 | do { |
180 | - /* turn on light */ | |
181 | - tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, | |
182 | - TPS65217_WLEDCTRL1, 0x09, 0xFF); | |
183 | - mdelay(ton); | |
184 | - /* turn off light */ | |
185 | - tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, | |
186 | - TPS65217_WLEDCTRL1, 0x01, 0xFF); | |
173 | + lcd_position_cursor(1, 8); | |
174 | + switch (cnt) { | |
175 | + case 3: | |
176 | + lcd_puts( | |
177 | + "release ESC-KEY to enter SERVICE-mode."); | |
178 | + break; | |
179 | + case 2: | |
180 | + lcd_puts( | |
181 | + "release ESC-KEY to enter DIAGNOSE-mode."); | |
182 | + break; | |
183 | + case 1: | |
184 | + lcd_puts( | |
185 | + "release ESC-KEY to enter BOOT-mode. "); | |
186 | + break; | |
187 | + } | |
187 | 188 | mdelay(toff); |
188 | 189 | cnt--; |
189 | - if (!gpio_get_value(KEY) && | |
190 | + if (!gpio_get_value(ESC_KEY) && | |
191 | + gpio_get_value(PUSH_KEY) && 2 == cnt) { | |
192 | + lcd_position_cursor(1, 8); | |
193 | + lcd_puts( | |
194 | + "switching to network-console ... "); | |
195 | + setenv("bootcmd", "run netconsole"); | |
196 | + cnt = 4; | |
197 | + break; | |
198 | + } else if (!gpio_get_value(ESC_KEY) && | |
190 | 199 | gpio_get_value(PUSH_KEY) && 1 == cnt) { |
191 | - puts("updating from USB ...\n"); | |
200 | + lcd_position_cursor(1, 8); | |
201 | + lcd_puts( | |
202 | + "updating U-BOOT from USB ... "); | |
192 | 203 | setenv("bootcmd", "run usbupdate"); |
204 | + cnt = 4; | |
193 | 205 | break; |
194 | - } else if (!gpio_get_value(KEY)) { | |
206 | + } else if ((!gpio_get_value(ESC_KEY) && | |
207 | + gpio_get_value(PUSH_KEY) && cnt == 0) || | |
208 | + (gpio_get_value(ESC_KEY) && | |
209 | + gpio_get_value(PUSH_KEY) && cnt == 0)) { | |
210 | + lcd_position_cursor(1, 8); | |
211 | + lcd_puts( | |
212 | + "starting script from network ... "); | |
213 | + setenv("bootcmd", "run netscript"); | |
214 | + cnt = 4; | |
195 | 215 | break; |
216 | + } else if (!gpio_get_value(ESC_KEY)) { | |
217 | + break; | |
196 | 218 | } |
197 | 219 | } while (cnt); |
198 | 220 | } |
199 | 221 | |
222 | + lcd_position_cursor(1, 8); | |
200 | 223 | switch (cnt) { |
201 | 224 | case 0: |
202 | - puts("3 blinks ... entering BOOT mode.\n"); | |
225 | + lcd_puts("entering BOOT-mode. "); | |
226 | + setenv("bootcmd", "run defaultAR"); | |
203 | 227 | buf = 0x0000; |
204 | 228 | break; |
205 | 229 | case 1: |
206 | - puts("2 blinks ... entering DIAGNOSE mode.\n"); | |
230 | + lcd_puts("entering DIAGNOSE-mode. "); | |
207 | 231 | buf = 0x0F0F; |
208 | 232 | break; |
209 | 233 | case 2: |
210 | - puts("1 blinks ... entering SERVICE mode.\n"); | |
234 | + lcd_puts("entering SERVICE mode. "); | |
211 | 235 | buf = 0xB4B4; |
212 | 236 | break; |
213 | 237 | case 3: |
214 | - puts("0 blinks ... entering RUN mode.\n"); | |
238 | + lcd_puts("loading OS... "); | |
215 | 239 | buf = 0x0404; |
216 | 240 | break; |
217 | 241 | } |
218 | - mdelay(ton); | |
219 | - /* turn on light */ | |
220 | - tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, | |
221 | - TPS65217_WLEDCTRL1, 0x09, 0xFF); | |
222 | 242 | /* write bootinfo into scratchregister of resetcontroller */ |
223 | 243 | oldspeed = i2c_get_bus_speed(); |
224 | 244 | if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) { |
board/BuR/kwb/mux.c
... | ... | @@ -16,23 +16,17 @@ |
16 | 16 | #include <asm/io.h> |
17 | 17 | #include <i2c.h> |
18 | 18 | |
19 | -static struct module_pin_mux usb0_pin_mux[] = { | |
20 | - {OFFSET(usb0_id), (MODE(0) | RXACTIVE)}, | |
21 | - /* USB0 DrvBus Receiver disable (from romcode 0x20) */ | |
22 | - {OFFSET(usb0_drvvbus), (MODE(0))}, | |
23 | - /* USB1 DrvBus as GPIO due to HW-Workaround */ | |
24 | - {OFFSET(usb1_drvvbus), (MODE(7))}, | |
25 | - {-1}, | |
26 | -}; | |
27 | -static struct module_pin_mux spi1_pin_mux[] = { | |
19 | +static struct module_pin_mux spi0_pin_mux[] = { | |
28 | 20 | /* SPI1_SCLK */ |
29 | - {OFFSET(mcasp0_aclkx), MODE(3) | PULLUDEN | RXACTIVE}, | |
21 | + {OFFSET(spi0_sclk), MODE(0) | PULLUDEN | RXACTIVE}, | |
30 | 22 | /* SPI1_D0 */ |
31 | - {OFFSET(mcasp0_fsx), MODE(3) | PULLUDEN | RXACTIVE}, | |
23 | + {OFFSET(spi0_d0), MODE(0) | PULLUDEN | RXACTIVE}, | |
32 | 24 | /* SPI1_D1 */ |
33 | - {OFFSET(mcasp0_axr0), MODE(3) | PULLUDEN | RXACTIVE}, | |
25 | + {OFFSET(spi0_d1), MODE(0) | PULLUDEN | RXACTIVE}, | |
34 | 26 | /* SPI1_CS0 */ |
35 | - {OFFSET(mcasp0_ahclkr), MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE}, | |
27 | + {OFFSET(spi0_cs0), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE}, | |
28 | + /* SPI1_CS1 */ | |
29 | + {OFFSET(spi0_cs1), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE}, | |
36 | 30 | {-1}, |
37 | 31 | }; |
38 | 32 | |
39 | 33 | |
40 | 34 | |
41 | 35 | |
... | ... | @@ -53,30 +47,34 @@ |
53 | 47 | }; |
54 | 48 | |
55 | 49 | static struct module_pin_mux gpios[] = { |
56 | - /* GPIO0_29 (RMII1_REFCLK) - eMMC nRST */ | |
57 | - {OFFSET(rmii1_refclk), (MODE(7) | PULLUDDIS)}, | |
58 | - /* GPIO0_4 (SPI D1) - TA602 */ | |
59 | - {OFFSET(spi0_d1), (MODE(7) | PULLUDDIS | RXACTIVE)}, | |
60 | - /* GPIO0_5 (SPI CS0) - DISPLAY_ON_OFF */ | |
61 | - {OFFSET(spi0_cs0), (MODE(7) | PULLUDDIS)}, | |
62 | 50 | /* GPIO0_7 (PWW0 OUT) - CAN TERM */ |
63 | 51 | {OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDDIS | RXACTIVE)}, |
64 | - /* GPIO0_19 (DMA_INTR0) - CLKOUT SYS */ | |
65 | - {OFFSET(xdma_event_intr0), (MODE(7) | RXACTIVE)}, | |
66 | - /* GPIO0_20 (DMA_INTR1) - SPI1 nCS1 */ | |
67 | - {OFFSET(xdma_event_intr1), (MODE(7) | PULLUDEN | PULLUP_EN)}, | |
52 | + /* GPIO0_19 (DMA_INTR0) - TA602 */ | |
53 | + {OFFSET(xdma_event_intr0), (MODE(7) | PULLUDDIS | RXACTIVE)}, | |
54 | + /* GPIO0_20 (DMA_INTR1) - SPI0 nCS1 */ | |
55 | + {OFFSET(xdma_event_intr1), (MODE(7) | PULLUDDIS | RXACTIVE)}, | |
56 | + /* GPIO0_29 (RMII1_REFCLK) - eMMC nRST */ | |
57 | + {OFFSET(rmii1_refclk), (MODE(7) | PULLUDDIS)}, | |
68 | 58 | /* GPIO0_30 (GPMC_WAIT0) - TA601 */ |
69 | 59 | {OFFSET(gpmc_wait0), (MODE(7) | PULLUDDIS | RXACTIVE)}, |
70 | 60 | /* GPIO0_31 (GPMC_nWP) - SW601 PushButton */ |
71 | 61 | {OFFSET(gpmc_wpn), (MODE(7) | PULLUDDIS | RXACTIVE)}, |
72 | 62 | /* GPIO1_28 (GPMC_nWE) - FRAM_nWP */ |
73 | 63 | {OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)}, |
64 | + /* GPIO1_29 (gpmc_csn0) - MMC nRST */ | |
65 | + {OFFSET(gpmc_csn0), (MODE(7) | PULLUDDIS)}, | |
74 | 66 | /* GPIO2_0 (GPMC_nCS3) - VBAT_OK */ |
75 | 67 | {OFFSET(gpmc_csn3), (MODE(7) | PULLUDDIS | RXACTIVE) }, |
76 | 68 | /* GPIO2_2 (GPMC_nADV_ALE) - DCOK */ |
77 | 69 | {OFFSET(gpmc_advn_ale), (MODE(7) | PULLUDDIS | RXACTIVE)}, |
78 | 70 | /* GPIO2_4 (GPMC_nWE) - TST_BAST */ |
79 | 71 | {OFFSET(gpmc_wen), (MODE(7) | PULLUDDIS)}, |
72 | + /* GPIO2_5 (gpmc_be0n_cle) - DISPLAY_ON_OFF */ | |
73 | + {OFFSET(gpmc_be0n_cle), (MODE(7) | PULLUDDIS)}, | |
74 | + /* GPIO3_16 (mcasp0_axr0) - ETH-LED green */ | |
75 | + {OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS | RXACTIVE)}, | |
76 | + /* GPIO3_17 (mcasp0_ahclkr) - CAN_STB */ | |
77 | + {OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS | RXACTIVE)}, | |
80 | 78 | /* GPIO3_18 (MCASP0_ACLKR) - SW601 CNTup, mapped to Counter eQEB0A_in */ |
81 | 79 | {OFFSET(mcasp0_aclkr), (MODE(1) | PULLUDDIS | RXACTIVE)}, |
82 | 80 | /* GPIO3_19 (MCASP0_FSR) - SW601 CNTdown, mapped to Counter eQEB0B_in */ |
... | ... | @@ -126,6 +124,10 @@ |
126 | 124 | }; |
127 | 125 | |
128 | 126 | static struct module_pin_mux mmc1_pin_mux[] = { |
127 | + {OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT7 */ | |
128 | + {OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT6 */ | |
129 | + {OFFSET(gpmc_ad5), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT5 */ | |
130 | + {OFFSET(gpmc_ad4), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT4 */ | |
129 | 131 | {OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT3 */ |
130 | 132 | {OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT2 */ |
131 | 133 | {OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT1 */ |
... | ... | @@ -187,8 +189,7 @@ |
187 | 189 | { |
188 | 190 | configure_module_pin_mux(i2c0_pin_mux); |
189 | 191 | configure_module_pin_mux(mii1_pin_mux); |
190 | - configure_module_pin_mux(usb0_pin_mux); | |
191 | - configure_module_pin_mux(spi1_pin_mux); | |
192 | + configure_module_pin_mux(spi0_pin_mux); | |
192 | 193 | configure_module_pin_mux(dcan0_pin_mux); |
193 | 194 | configure_module_pin_mux(dcan1_pin_mux); |
194 | 195 | configure_module_pin_mux(mmc1_pin_mux); |
include/configs/kwb.h
... | ... | @@ -14,6 +14,11 @@ |
14 | 14 | |
15 | 15 | #include <configs/bur_am335x_common.h> |
16 | 16 | /* ------------------------------------------------------------------------- */ |
17 | +#define CONFIG_AM335X_LCD | |
18 | +#define CONFIG_LCD | |
19 | +#define CONFIG_LCD_NOSTDOUT | |
20 | +#define CONFIG_SYS_WHITE_ON_BLACK | |
21 | +#define LCD_BPP LCD_COLOR32 | |
17 | 22 | /* Clock Defines */ |
18 | 23 | #define V_OSCK 26000000 /* Clock output from T2 */ |
19 | 24 | #define V_SCLK (V_OSCK) |
... | ... | @@ -87,8 +92,6 @@ |
87 | 92 | #undef CONFIG_BOOTM_NETBSD |
88 | 93 | #undef CONFIG_BOOTM_PLAN9 |
89 | 94 | #undef CONFIG_BOOTM_RTEMS |
90 | -#undef CONFIG_GZIP | |
91 | -#undef CONFIG_ZLIB | |
92 | 95 | |
93 | 96 | /* USB configuration */ |
94 | 97 | #define CONFIG_USB_MUSB_DSPS |
... | ... | @@ -100,6 +103,8 @@ |
100 | 103 | #define CONFIG_MUSB_HOST |
101 | 104 | #define CONFIG_AM335X_USB0 |
102 | 105 | #define CONFIG_AM335X_USB0_MODE MUSB_HOST |
106 | +#define CONFIG_AM335X_USB1 | |
107 | +#define CONFIG_AM335X_USB1_MODE MUSB_HOST | |
103 | 108 | |
104 | 109 | #ifdef CONFIG_MUSB_HOST |
105 | 110 | #define CONFIG_CMD_USB |