Commit cfd701b5f3eefc98cf699143d34e8a8b737b90a5

Authored by Alison Wang
Committed by Stefano Babic
1 parent 8c4983779e

arm: vf610: Add IOMUX support for Vybrid VF610

This patch adds the IOMUX support for Vybrid VF610 platform.

There is a little difference for IOMUXC module between VF610 and i.MX
platform, the muxmode and pad configuration share one 32bit register on
VF610, but they are two independent registers on I.MX platform. A
CONFIG_IOMUX_SHARE_CONFIG_REG was introduced to fit this difference.

Signed-off-by: Alison Wang <b18965@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>

Showing 3 changed files with 25 additions and 1 deletions Side-by-side Diff

arch/arm/imx-common/Makefile
... ... @@ -27,7 +27,7 @@
27 27  
28 28 LIB = $(obj)libimx-common.o
29 29  
30   -ifeq ($(SOC),$(filter $(SOC),mx25 mx35 mx5 mx6))
  30 +ifeq ($(SOC),$(filter $(SOC),mx25 mx35 mx5 mx6 vf610))
31 31 COBJS-y = iomux-v3.o
32 32 endif
33 33 ifeq ($(SOC),$(filter $(SOC),mx5 mx6))
arch/arm/imx-common/iomux-v3.c
... ... @@ -48,8 +48,14 @@
48 48 if (sel_input_ofs)
49 49 __raw_writel(sel_input, base + sel_input_ofs);
50 50  
  51 +#ifdef CONFIG_IOMUX_SHARE_CONF_REG
  52 + if (!(pad_ctrl & NO_PAD_CTRL))
  53 + __raw_writel((mux_mode << PAD_MUX_MODE_SHIFT) | pad_ctrl,
  54 + base + pad_ctrl_ofs);
  55 +#else
51 56 if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
52 57 __raw_writel(pad_ctrl, base + pad_ctrl_ofs);
  58 +#endif
53 59 }
54 60  
55 61 void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
arch/arm/include/asm/imx-common/iomux-v3.h
... ... @@ -121,6 +121,24 @@
121 121 #define PAD_CTL_DSE_40ohm (6 << 3)
122 122 #define PAD_CTL_DSE_34ohm (7 << 3)
123 123  
  124 +#elif defined(CONFIG_VF610)
  125 +
  126 +#define PAD_MUX_MODE_SHIFT 20
  127 +
  128 +#define PAD_CTL_SPEED_MED (1 << 12)
  129 +#define PAD_CTL_SPEED_HIGH (3 << 12)
  130 +
  131 +#define PAD_CTL_DSE_50ohm (3 << 6)
  132 +#define PAD_CTL_DSE_25ohm (6 << 6)
  133 +#define PAD_CTL_DSE_20ohm (7 << 6)
  134 +
  135 +#define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE)
  136 +#define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE)
  137 +#define PAD_CTL_PKE (1 << 3)
  138 +#define PAD_CTL_PUE (1 << 2 | PAD_CTL_PKE)
  139 +
  140 +#define PAD_CTL_OBE_IBE_ENABLE (3 << 0)
  141 +
124 142 #else
125 143  
126 144 #define PAD_CTL_DVS (1 << 13)