EXYNOS5: FDT : Decode peripheral id

Api is added to decode peripheral id based on the interrupt number of the peripheral. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

EXYNOS5: FDT : Decode peripheral id
Api is added to decode peripheral id based on the interrupt number of the peripheral. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Rajeshwari Shinde · Minkyu Kang
1 parent c34253d1fc
Showing 3 changed files with 57 additions and 13 deletions Side-by-side Diff
arch/arm/cpu/armv7/exynos/pinmux.c
arch/arm/include/asm/arch-exynos/periph.h
arch/arm/include/asm/arch-exynos/pinmux.h
@@ -22,6 +22,7 @@
  */
  
 #include <common.h>
+#include <fdtdec.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/sromc.h>
@@ -447,4 +448,32 @@
 		return -1;
 	}
 }
+
+#ifdef CONFIG_OF_CONTROL
+static int exynos5_pinmux_decode_periph_id(const void *blob, int node)
+{
+	int err;
+	u32 cell[3];
+
+	err = fdtdec_get_int_array(blob, node, "interrupts", cell,
+					ARRAY_SIZE(cell));
+	if (err)
+		return PERIPH_ID_NONE;
+
+	/* check for invalid peripheral id */
+	if ((PERIPH_ID_SDMMC4 > cell[1]) || (cell[1] < PERIPH_ID_UART0))
+		return cell[1];
+
+	debug(" invalid peripheral id\n");
+	return PERIPH_ID_NONE;
+}
+
+int pinmux_decode_periph_id(const void *blob, int node)
+{
+	if (cpu_is_exynos5())
+		return  exynos5_pinmux_decode_periph_id(blob, node);
+	else
+		return PERIPH_ID_NONE;
+}
+#endif
@@ -25,12 +25,17 @@
 #define __ASM_ARM_ARCH_PERIPH_H
  
 /*
- * Peripherals requiring clock/pinmux configuration. List will
+ * Peripherals required for pinmux configuration. List will
  * grow with support for more devices getting added.
+ * Numbering based on interrupt table.
  *
  */
 enum periph_id {
-	PERIPH_ID_I2C0,
+	PERIPH_ID_UART0 = 51,
+	PERIPH_ID_UART1,
+	PERIPH_ID_UART2,
+	PERIPH_ID_UART3,
+	PERIPH_ID_I2C0 = 56,
 	PERIPH_ID_I2C1,
 	PERIPH_ID_I2C2,
 	PERIPH_ID_I2C3,
  
  
@@ -38,22 +43,24 @@
 	PERIPH_ID_I2C5,
 	PERIPH_ID_I2C6,
 	PERIPH_ID_I2C7,
-	PERIPH_ID_I2S1,
-	PERIPH_ID_SDMMC0,
+	PERIPH_ID_SPI0 = 68,
+	PERIPH_ID_SPI1,
+	PERIPH_ID_SPI2,
+	PERIPH_ID_SDMMC0 = 75,
 	PERIPH_ID_SDMMC1,
 	PERIPH_ID_SDMMC2,
 	PERIPH_ID_SDMMC3,
-	PERIPH_ID_SDMMC4,
-	PERIPH_ID_SROMC,
-	PERIPH_ID_SPI0,
-	PERIPH_ID_SPI1,
-	PERIPH_ID_SPI2,
+	PERIPH_ID_I2S1 = 99,
+
+	/* Since following peripherals do
+	 * not have shared peripheral interrupts (SPIs)
+	 * they are numbered arbitiraly after the maximum
+	 * SPIs Exynos has (128)
+	 */
+	PERIPH_ID_SROMC = 128,
 	PERIPH_ID_SPI3,
 	PERIPH_ID_SPI4,
-	PERIPH_ID_UART0,
-	PERIPH_ID_UART1,
-	PERIPH_ID_UART2,
-	PERIPH_ID_UART3,
+	PERIPH_ID_SDMMC4,
  
 	PERIPH_ID_COUNT,
 	PERIPH_ID_NONE = -1,
@@ -55,5 +55,13 @@
  */
 int exynos_pinmux_config(int peripheral, int flags);
  
+/**
+ * Decode the peripheral id using the interrpt numbers.
+ *
+ * @param blob  Device tree blob
+ * @param node  FDT I2C node to find
+ * @return peripheral id if ok, PERIPH_ID_NONE on error
+ */
+int pinmux_decode_periph_id(const void *blob, int node);
 #endif
...	...	@@ -22,6 +22,7 @@
22	22	*/
23	23
24	24	#include <common.h>
	25	+#include <fdtdec.h>
25	26	#include <asm/arch/gpio.h>
26	27	#include <asm/arch/pinmux.h>
27	28	#include <asm/arch/sromc.h>
...	...	@@ -447,4 +448,32 @@
447	448	return -1;
448	449	}
449	450	}
	451	+
	452	+#ifdef CONFIG_OF_CONTROL
	453	+static int exynos5_pinmux_decode_periph_id(const void *blob, int node)
	454	+{
	455	+ int err;
	456	+ u32 cell[3];
	457	+
	458	+ err = fdtdec_get_int_array(blob, node, "interrupts", cell,
	459	+ ARRAY_SIZE(cell));
	460	+ if (err)
	461	+ return PERIPH_ID_NONE;
	462	+
	463	+ /* check for invalid peripheral id */
	464	+ if ((PERIPH_ID_SDMMC4 > cell[1]) \|\| (cell[1] < PERIPH_ID_UART0))
	465	+ return cell[1];
	466	+
	467	+ debug(" invalid peripheral id\n");
	468	+ return PERIPH_ID_NONE;
	469	+}
	470	+
	471	+int pinmux_decode_periph_id(const void *blob, int node)
	472	+{
	473	+ if (cpu_is_exynos5())
	474	+ return exynos5_pinmux_decode_periph_id(blob, node);
	475	+ else
	476	+ return PERIPH_ID_NONE;
	477	+}
	478	+#endif
...	...	@@ -25,12 +25,17 @@
25	25	#define __ASM_ARM_ARCH_PERIPH_H
26	26
27	27	/*
28		- * Peripherals requiring clock/pinmux configuration. List will
	28	+ * Peripherals required for pinmux configuration. List will
29	29	* grow with support for more devices getting added.
	30	+ * Numbering based on interrupt table.
30	31	*
31	32	*/
32	33	enum periph_id {
33		- PERIPH_ID_I2C0,
	34	+ PERIPH_ID_UART0 = 51,
	35	+ PERIPH_ID_UART1,
	36	+ PERIPH_ID_UART2,
	37	+ PERIPH_ID_UART3,
	38	+ PERIPH_ID_I2C0 = 56,
34	39	PERIPH_ID_I2C1,
35	40	PERIPH_ID_I2C2,
36	41	PERIPH_ID_I2C3,
37	42
38	43
...	...	@@ -38,22 +43,24 @@
38	43	PERIPH_ID_I2C5,
39	44	PERIPH_ID_I2C6,
40	45	PERIPH_ID_I2C7,
41		- PERIPH_ID_I2S1,
42		- PERIPH_ID_SDMMC0,
	46	+ PERIPH_ID_SPI0 = 68,
	47	+ PERIPH_ID_SPI1,
	48	+ PERIPH_ID_SPI2,
	49	+ PERIPH_ID_SDMMC0 = 75,
43	50	PERIPH_ID_SDMMC1,
44	51	PERIPH_ID_SDMMC2,
45	52	PERIPH_ID_SDMMC3,
46		- PERIPH_ID_SDMMC4,
47		- PERIPH_ID_SROMC,
48		- PERIPH_ID_SPI0,
49		- PERIPH_ID_SPI1,
50		- PERIPH_ID_SPI2,
	53	+ PERIPH_ID_I2S1 = 99,
	54	+
	55	+ /* Since following peripherals do
	56	+ * not have shared peripheral interrupts (SPIs)
	57	+ * they are numbered arbitiraly after the maximum
	58	+ * SPIs Exynos has (128)
	59	+ */
	60	+ PERIPH_ID_SROMC = 128,
51	61	PERIPH_ID_SPI3,
52	62	PERIPH_ID_SPI4,
53		- PERIPH_ID_UART0,
54		- PERIPH_ID_UART1,
55		- PERIPH_ID_UART2,
56		- PERIPH_ID_UART3,
	63	+ PERIPH_ID_SDMMC4,
57	64
58	65	PERIPH_ID_COUNT,
59	66	PERIPH_ID_NONE = -1,
...	...	@@ -55,5 +55,13 @@
55	55	*/
56	56	int exynos_pinmux_config(int peripheral, int flags);
57	57
	58	+/**
	59	+ * Decode the peripheral id using the interrpt numbers.
	60	+ *
	61	+ * @param blob Device tree blob
	62	+ * @param node FDT I2C node to find
	63	+ * @return peripheral id if ok, PERIPH_ID_NONE on error
	64	+ */
	65	+int pinmux_decode_periph_id(const void *blob, int node);
58	66	#endif