sf: Set quad enable bit support

This patch provides support to set the quad enable bit on flash. quad enable bit needs to set before performing any quad IO operations on respective SPI flashes. Currently added set quad enable bit for winbond and spansion flash devices. stmicro flash doesn't require to set as qeb is volatile. remaining flash devices support will add in future patches. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

sf: Set quad enable bit support
This patch provides support to set the quad enable bit on flash. quad enable bit needs to set before performing any quad IO operations on respective SPI flashes. Currently added set quad enable bit for winbond and spansion flash devices. stmicro flash doesn't require to set as qeb is volatile. remaining flash devices support will add in future patches. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Jagannadha Sutradharudu Teki
1 parent 6cba6fdf96
Showing 3 changed files with 62 additions and 2 deletions Side-by-side Diff
drivers/mtd/spi/sf_internal.h
drivers/mtd/spi/sf_ops.c
drivers/mtd/spi/sf_probe.c
@@ -12,6 +12,11 @@
  
 #define SPI_FLASH_16MB_BOUN		0x1000000
  
+/* CFI Manufacture ID's */
+#define SPI_FLASH_CFI_MFR_SPANSION	0x01
+#define SPI_FLASH_CFI_MFR_STMICRO	0x20
+#define SPI_FLASH_CFI_MFR_WINBOND	0xef
+
 /* SECT flags */
 #define SECT_4K				(1 << 1)
 #define SECT_32K			(1 << 2)
@@ -52,6 +57,7 @@
  
 /* Common status */
 #define STATUS_WIP			0x01
+#define STATUS_QEB_WINSPAN		(1 << 1)
 #define STATUS_PEC			0x80
  
 /* Flash timeout values */
@@ -93,8 +99,8 @@
 /* Program the status register */
 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
  
-/* Set quad enbale bit */
-int spi_flash_set_qeb(struct spi_flash *flash);
+/* Set quad enbale bit for winbond and spansion flashes */
+int spi_flash_set_qeb_winspan(struct spi_flash *flash);
  
 /* Enable writing on the SPI flash */
 static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
@@ -38,6 +38,7 @@
 	return 0;
 }
  
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
 static int spi_flash_cmd_write_config(struct spi_flash *flash, u8 cr)
 {
 	u8 data[2];
@@ -61,6 +62,31 @@
  
 	return 0;
 }
+
+int spi_flash_set_qeb_winspan(struct spi_flash *flash)
+{
+	u8 qeb_status;
+	u8 cmd;
+	int ret;
+
+	cmd = CMD_READ_CONFIG;
+	ret = spi_flash_read_common(flash, &cmd, 1, &qeb_status, 1);
+	if (ret < 0) {
+		debug("SF: fail to read config register\n");
+		return ret;
+	}
+
+	if (qeb_status & STATUS_QEB_WINSPAN) {
+		debug("SF: Quad enable bit is already set\n");
+	} else {
+		ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN);
+		if (ret < 0)
+			return ret;
+	}
+
+	return ret;
+}
+#endif
  
 #ifdef CONFIG_SPI_FLASH_BAR
 static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
@@ -165,6 +165,25 @@
 	CMD_READ_QUAD_OUTPUT_FAST,
 };
  
+static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0)
+{
+	switch (idcode0) {
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
+	case SPI_FLASH_CFI_MFR_SPANSION:
+	case SPI_FLASH_CFI_MFR_WINBOND:
+		return spi_flash_set_qeb_winspan(flash);
+#endif
+#ifdef CONFIG_SPI_FLASH_STMICRO
+	case SPI_FLASH_CFI_MFR_STMICRO:
+		debug("SF: QEB is volatile for %02x flash\n", idcode0);
+		return 0;
+#endif
+	default:
+		printf("SF: Need set QEB func for %02x flash\n", idcode0);
+		return -1;
+	}
+}
+
 static struct spi_flash *spi_flash_validate_params(struct spi_slave *spi,
 		u8 *idcode)
 {
@@ -249,6 +268,15 @@
 	else
 		/* Go for default supported write cmd */
 		flash->write_cmd = CMD_PAGE_PROGRAM;
+
+	/* Set the quad enable bit - only for quad commands */
+	if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
+	    (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
+		if (spi_flash_set_qeb(flash, idcode[0])) {
+			debug("SF: Fail to set QEB for %02x\n", idcode[0]);
+			return NULL;
+		}
+	}
  
 	/* Poll cmd seclection */
 	flash->poll_cmd = CMD_READ_STATUS;
...	...	@@ -12,6 +12,11 @@
12	12
13	13	#define SPI_FLASH_16MB_BOUN 0x1000000
14	14
	15	+/* CFI Manufacture ID's */
	16	+#define SPI_FLASH_CFI_MFR_SPANSION 0x01
	17	+#define SPI_FLASH_CFI_MFR_STMICRO 0x20
	18	+#define SPI_FLASH_CFI_MFR_WINBOND 0xef
	19	+
15	20	/* SECT flags */
16	21	#define SECT_4K (1 << 1)
17	22	#define SECT_32K (1 << 2)
...	...	@@ -52,6 +57,7 @@
52	57
53	58	/* Common status */
54	59	#define STATUS_WIP 0x01
	60	+#define STATUS_QEB_WINSPAN (1 << 1)
55	61	#define STATUS_PEC 0x80
56	62
57	63	/* Flash timeout values */
...	...	@@ -93,8 +99,8 @@
93	99	/* Program the status register */
94	100	int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
95	101
96		-/* Set quad enbale bit */
97		-int spi_flash_set_qeb(struct spi_flash *flash);
	102	+/* Set quad enbale bit for winbond and spansion flashes */
	103	+int spi_flash_set_qeb_winspan(struct spi_flash *flash);
98	104
99	105	/* Enable writing on the SPI flash */
100	106	static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
...	...	@@ -38,6 +38,7 @@
38	38	return 0;
39	39	}
40	40
	41	+#if defined(CONFIG_SPI_FLASH_SPANSION) \|\| defined(CONFIG_SPI_FLASH_WINBOND)
41	42	static int spi_flash_cmd_write_config(struct spi_flash *flash, u8 cr)
42	43	{
43	44	u8 data[2];
...	...	@@ -61,6 +62,31 @@
61	62
62	63	return 0;
63	64	}
	65	+
	66	+int spi_flash_set_qeb_winspan(struct spi_flash *flash)
	67	+{
	68	+ u8 qeb_status;
	69	+ u8 cmd;
	70	+ int ret;
	71	+
	72	+ cmd = CMD_READ_CONFIG;
	73	+ ret = spi_flash_read_common(flash, &cmd, 1, &qeb_status, 1);
	74	+ if (ret < 0) {
	75	+ debug("SF: fail to read config register\n");
	76	+ return ret;
	77	+ }
	78	+
	79	+ if (qeb_status & STATUS_QEB_WINSPAN) {
	80	+ debug("SF: Quad enable bit is already set\n");
	81	+ } else {
	82	+ ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN);
	83	+ if (ret < 0)
	84	+ return ret;
	85	+ }
	86	+
	87	+ return ret;
	88	+}
	89	+#endif
64	90
65	91	#ifdef CONFIG_SPI_FLASH_BAR
66	92	static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
...	...	@@ -165,6 +165,25 @@
165	165	CMD_READ_QUAD_OUTPUT_FAST,
166	166	};
167	167
	168	+static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0)
	169	+{
	170	+ switch (idcode0) {
	171	+#if defined(CONFIG_SPI_FLASH_SPANSION) \|\| defined(CONFIG_SPI_FLASH_WINBOND)
	172	+ case SPI_FLASH_CFI_MFR_SPANSION:
	173	+ case SPI_FLASH_CFI_MFR_WINBOND:
	174	+ return spi_flash_set_qeb_winspan(flash);
	175	+#endif
	176	+#ifdef CONFIG_SPI_FLASH_STMICRO
	177	+ case SPI_FLASH_CFI_MFR_STMICRO:
	178	+ debug("SF: QEB is volatile for %02x flash\n", idcode0);
	179	+ return 0;
	180	+#endif
	181	+ default:
	182	+ printf("SF: Need set QEB func for %02x flash\n", idcode0);
	183	+ return -1;
	184	+ }
	185	+}
	186	+
168	187	static struct spi_flash spi_flash_validate_params(struct spi_slave spi,
169	188	u8 *idcode)
170	189	{
...	...	@@ -249,6 +268,15 @@
249	268	else
250	269	/* Go for default supported write cmd */
251	270	flash->write_cmd = CMD_PAGE_PROGRAM;
	271	+
	272	+ /* Set the quad enable bit - only for quad commands */
	273	+ if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) \|\|
	274	+ (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
	275	+ if (spi_flash_set_qeb(flash, idcode[0])) {
	276	+ debug("SF: Fail to set QEB for %02x\n", idcode[0]);
	277	+ return NULL;
	278	+ }
	279	+ }
252	280
253	281	/* Poll cmd seclection */
254	282	flash->poll_cmd = CMD_READ_STATUS;