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Commit d21e77ff84019b17e180b27267b23f51e6d609fa

Authored by pekon gupta
Committed by Tom Rini
1 parent 0439d752c5
Exists in v2017.01-smarct4x and in 40 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

mtd: nand: omap_gpmc: remove unused members of 'struct nand_bch_priv' 

This patch prepares to refactor 'struct nand_bch_priv' -> 'struct omap_nand_info'
And thus performs following clean-ups:
 - remove nand_bch_priv.type: use nand_bch_priv.ecc_scheme instead
 - remove nand_bch_priv.mode: <unused>

Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>

Showing 1 changed file with 6 additions and 17 deletions Side-by-side Diff

drivers/mtd/nand/omap_gpmc.c
Diff comments   View file @ d21e77f
... ... @@ -151,17 +151,10 @@
151 151 * Generic BCH interface
152 152 */
153 153 struct nand_bch_priv {
154   - uint8_t mode;
155   - uint8_t type;
156 154 struct bch_control *control;
157 155 enum omap_ecc ecc_scheme;
158 156 };
159 157  
160   -/* bch types */
161   -#define ECC_BCH4 0
162   -#define ECC_BCH8 1
163   -#define ECC_BCH16 2
164   -
165 158 /*
166 159 * This can be a single instance cause all current users have only one NAND
167 160 * with nearly the same setup (BCH8, some with ELM and others with sw BCH
... ... @@ -169,7 +162,6 @@
169 162 * When some users with other BCH strength will exists this have to change!
170 163 */
171 164 static __maybe_unused struct nand_bch_priv bch_priv = {
172   - .type = ECC_BCH8,
173 165 .control = NULL
174 166 };
175 167  
... ... @@ -342,6 +334,7 @@
342 334 uint32_t eccbytes = chip->ecc.bytes;
343 335 uint32_t error_count = 0, error_max;
344 336 uint32_t error_loc[8];
  337 + enum bch_level bch_type;
345 338 uint32_t i, ecc_flag = 0;
346 339 uint8_t count, err = 0;
347 340 uint32_t byte_pos, bit_pos;
348 341  
349 342  
... ... @@ -369,22 +362,22 @@
369 362 */
370 363 switch (bch->ecc_scheme) {
371 364 case OMAP_ECC_BCH8_CODE_HW:
  365 + bch_type = BCH_8_BIT;
372 366 omap_reverse_list(calc_ecc, eccbytes - 1);
373 367 break;
374 368 default:
375 369 return -EINVAL;
376 370 }
377 371 /* use elm module to check for errors */
378   - elm_config((enum bch_level)(bch->type));
379   - if (elm_check_error(calc_ecc, (enum bch_level)bch->type,
380   - &error_count, error_loc)) {
  372 + elm_config(bch_type);
  373 + if (elm_check_error(calc_ecc, bch_type, &error_count, error_loc)) {
381 374 printf("nand: error: uncorrectable ECC errors\n");
382 375 return -EINVAL;
383 376 }
384 377 /* correct bch error */
385 378 for (count = 0; count < error_count; count++) {
386   - switch (bch->type) {
387   - case ECC_BCH8:
  379 + switch (bch->ecc_scheme) {
  380 + case OMAP_ECC_BCH8_CODE_HW:
388 381 /* 14th byte in ECC is reserved to match ROM layout */
389 382 error_max = SECTOR_BYTES + (eccbytes - 1);
390 383 break;
... ... @@ -562,7 +555,6 @@
562 555 /* For this ecc-scheme, ecc.bytes, ecc.layout, ... are
563 556 * initialized in nand_scan_tail(), so just set ecc.mode */
564 557 bch_priv.control = NULL;
565   - bch_priv.type = 0;
566 558 nand->ecc.mode = NAND_ECC_SOFT;
567 559 nand->ecc.layout = NULL;
568 560 nand->ecc.size = 0;
... ... @@ -578,7 +570,6 @@
578 570 return -EINVAL;
579 571 }
580 572 bch_priv.control = NULL;
581   - bch_priv.type = 0;
582 573 /* populate ecc specific fields */
583 574 memset(&nand->ecc, 0, sizeof(struct nand_ecc_ctrl));
584 575 nand->ecc.mode = NAND_ECC_HW;
... ... @@ -617,7 +608,6 @@
617 608 printf("nand: error: could not init_bch()\n");
618 609 return -ENODEV;
619 610 }
620   - bch_priv.type = ECC_BCH8;
621 611 /* populate ecc specific fields */
622 612 memset(&nand->ecc, 0, sizeof(struct nand_ecc_ctrl));
623 613 nand->ecc.mode = NAND_ECC_HW;
... ... @@ -659,7 +649,6 @@
659 649 }
660 650 /* intialize ELM for ECC error detection */
661 651 elm_init();
662   - bch_priv.type = ECC_BCH8;
663 652 /* populate ecc specific fields */
664 653 memset(&nand->ecc, 0, sizeof(struct nand_ecc_ctrl));
665 654 nand->ecc.mode = NAND_ECC_HW;