Eric Lee / smarc-uboot

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Commit d231182441d2e3f0fdf0fdadcb1f02466605d1c6

Authored by Tom Rini
2 parents 3b3ea2c56e a0fd381fc6
Exists in smarc_8mq_lf_v2020.04 and in 17 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

Merge git://git.denx.de/u-boot-net

Showing 7 changed files Side-by-side Diff

... ... @@ -14,7 +14,6 @@
14 14 #include <miiphy.h>
15 15 #include <phy.h>
16 16  
17   -
18 17 static char last_op[2];
19 18 static uint last_data;
20 19 static uint last_addr_lo;
21 20  
... ... @@ -243,13 +242,13 @@
243 242 case 'r':
244 243 if (pos > 1)
245 244 if (extract_reg_range(argv[pos--], &devadlo, &devadhi,
246   - &reglo, &reghi))
  245 + &reglo, &reghi))
247 246 return -1;
248 247  
249 248 default:
250 249 if (pos > 1)
251   - if (extract_phy_range(&(argv[2]), pos - 1, &bus,
252   - &phydev, &addrlo, &addrhi))
  250 + if (extract_phy_range(&argv[2], pos - 1, &bus,
  251 + &phydev, &addrlo, &addrhi))
253 252 return -1;
254 253  
255 254 break;
drivers/net/designware.c
Diff comments   View file @ d231182
... ... @@ -684,7 +684,7 @@
684 684 break;
685 685  
686 686 err = clk_enable(&priv->clocks[i]);
687   - if (err) {
  687 + if (err && err != -ENOSYS && err != -ENOTSUPP) {
688 688 pr_err("failed to enable clock %d\n", i);
689 689 clk_free(&priv->clocks[i]);
690 690 goto clk_err;
... ... @@ -1181,7 +1181,7 @@
1181 1181 return;
1182 1182  
1183 1183 swsm = E1000_READ_REG(hw, SWSM);
1184   - if (hw->mac_type == e1000_80003es2lan) {
  1184 + if (hw->mac_type == e1000_80003es2lan || hw->mac_type == e1000_igb) {
1185 1185 /* Release both semaphores. */
1186 1186 swsm &= ~(E1000_SWSM_SMBI | E1000_SWSM_SWESMBI);
1187 1187 } else
drivers/net/phy/marvell.c
Diff comments   View file @ d231182
... ... @@ -159,7 +159,7 @@
159 159 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1xxx_PHY_STATUS);
160 160  
161 161 if ((mii_reg & MIIM_88E1xxx_PHYSTAT_LINK) &&
162   - !(mii_reg & MIIM_88E1xxx_PHYSTAT_SPDDONE)) {
  162 + !(mii_reg & MIIM_88E1xxx_PHYSTAT_SPDDONE)) {
163 163 int i = 0;
164 164  
165 165 puts("Waiting for PHY realtime link");
166 166  
... ... @@ -175,10 +175,10 @@
175 175 putc('.');
176 176 udelay(1000);
177 177 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
178   - MIIM_88E1xxx_PHY_STATUS);
  178 + MIIM_88E1xxx_PHY_STATUS);
179 179 }
180 180 puts(" done\n");
181   - udelay(500000); /* another 500 ms (results in faster booting) */
  181 + mdelay(500); /* another 500 ms (results in faster booting) */
182 182 } else {
183 183 if (mii_reg & MIIM_88E1xxx_PHYSTAT_LINK)
184 184 phydev->link = 1;
185 185  
... ... @@ -226,9 +226,9 @@
226 226  
227 227 if (phy_interface_is_rgmii(phydev)) {
228 228 reg = phy_read(phydev,
229   - MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR);
  229 + MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR);
230 230 if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
231   - (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) {
  231 + (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) {
232 232 reg |= (MIIM_88E1111_RX_DELAY | MIIM_88E1111_TX_DELAY);
233 233 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
234 234 reg &= ~MIIM_88E1111_TX_DELAY;
235 235  
... ... @@ -239,10 +239,10 @@
239 239 }
240 240  
241 241 phy_write(phydev,
242   - MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg);
  242 + MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg);
243 243  
244 244 reg = phy_read(phydev,
245   - MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR);
  245 + MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR);
246 246  
247 247 reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK);
248 248  
249 249  
250 250  
251 251  
252 252  
253 253  
254 254  
255 255  
256 256  
257 257  
... ... @@ -252,47 +252,47 @@
252 252 reg |= MIIM_88E1111_HWCFG_MODE_COPPER_RGMII;
253 253  
254 254 phy_write(phydev,
255   - MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR, reg);
  255 + MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR, reg);
256 256 }
257 257  
258 258 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
259 259 reg = phy_read(phydev,
260   - MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR);
  260 + MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR);
261 261  
262 262 reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK);
263 263 reg |= MIIM_88E1111_HWCFG_MODE_SGMII_NO_CLK;
264 264 reg |= MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO;
265 265  
266 266 phy_write(phydev, MDIO_DEVAD_NONE,
267   - MIIM_88E1111_PHY_EXT_SR, reg);
  267 + MIIM_88E1111_PHY_EXT_SR, reg);
268 268 }
269 269  
270 270 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
271 271 reg = phy_read(phydev,
272   - MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR);
  272 + MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR);
273 273 reg |= (MIIM_88E1111_RX_DELAY | MIIM_88E1111_TX_DELAY);
274 274 phy_write(phydev,
275   - MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg);
  275 + MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg);
276 276  
277 277 reg = phy_read(phydev, MDIO_DEVAD_NONE,
278   - MIIM_88E1111_PHY_EXT_SR);
  278 + MIIM_88E1111_PHY_EXT_SR);
279 279 reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK |
280 280 MIIM_88E1111_HWCFG_FIBER_COPPER_RES);
281 281 reg |= 0x7 | MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO;
282 282 phy_write(phydev, MDIO_DEVAD_NONE,
283   - MIIM_88E1111_PHY_EXT_SR, reg);
  283 + MIIM_88E1111_PHY_EXT_SR, reg);
284 284  
285 285 /* soft reset */
286 286 phy_reset(phydev);
287 287  
288 288 reg = phy_read(phydev, MDIO_DEVAD_NONE,
289   - MIIM_88E1111_PHY_EXT_SR);
  289 + MIIM_88E1111_PHY_EXT_SR);
290 290 reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK |
291   - MIIM_88E1111_HWCFG_FIBER_COPPER_RES);
  291 + MIIM_88E1111_HWCFG_FIBER_COPPER_RES);
292 292 reg |= MIIM_88E1111_HWCFG_MODE_COPPER_RTBI |
293 293 MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO;
294 294 phy_write(phydev, MDIO_DEVAD_NONE,
295   - MIIM_88E1111_PHY_EXT_SR, reg);
  295 + MIIM_88E1111_PHY_EXT_SR, reg);
296 296 }
297 297  
298 298 /* soft reset */
... ... @@ -308,7 +308,7 @@
308 308 * m88e1518_phy_writebits - write bits to a register
309 309 */
310 310 void m88e1518_phy_writebits(struct phy_device *phydev,
311   - u8 reg_num, u16 offset, u16 len, u16 data)
  311 + u8 reg_num, u16 offset, u16 len, u16 data)
312 312 {
313 313 u16 reg, mask;
314 314  
... ... @@ -382,7 +382,8 @@
382 382  
383 383 reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E151x_PHY_MSCR);
384 384 reg &= ~MIIM_88E151x_RGMII_RXTX_DELAY;
385   - if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
  385 + if (phydev->interface == PHY_INTERFACE_MODE_RGMII ||
  386 + phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
386 387 reg |= MIIM_88E151x_RGMII_RXTX_DELAY;
387 388 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
388 389 reg |= MIIM_88E151x_RGMII_RX_DELAY;
389 390  
... ... @@ -471,10 +472,10 @@
471 472 /* Switch the page to access the led register */
472 473 pg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_PAGE);
473 474 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_PAGE,
474   - MIIM_88E1121_PHY_LED_PAGE);
  475 + MIIM_88E1121_PHY_LED_PAGE);
475 476 /* Configure leds */
476 477 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_LED_CTRL,
477   - MIIM_88E1121_PHY_LED_DEF);
  478 + MIIM_88E1121_PHY_LED_DEF);
478 479 /* Restore the page pointer */
479 480 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_PAGE, pg);
480 481  
... ... @@ -497,7 +498,7 @@
497 498 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1145_PHY_CAL_OV, 0xa2da);
498 499  
499 500 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1xxx_PHY_SCR,
500   - MIIM_88E1xxx_PHY_MDI_X_AUTO);
  501 + MIIM_88E1xxx_PHY_MDI_X_AUTO);
501 502  
502 503 reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1145_PHY_EXT_CR);
503 504 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
... ... @@ -524,7 +525,7 @@
524 525 return ret;
525 526  
526 527 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1145_PHY_LED_CONTROL,
527   - MIIM_88E1145_PHY_LED_DIRECT);
  528 + MIIM_88E1145_PHY_LED_DIRECT);
528 529 return m88e1xxx_parse_status(phydev);
529 530 }
530 531  
drivers/net/phy/phy.c
Diff comments   View file @ d231182
... ... @@ -27,7 +27,7 @@
27 27 /* Generic PHY support and helper functions */
28 28  
29 29 /**
30   - * genphy_config_advert - sanitize and advertise auto-negotation parameters
  30 + * genphy_config_advert - sanitize and advertise auto-negotiation parameters
31 31 * @phydev: target phy_device struct
32 32 *
33 33 * Description: Writes MII_ADVERTISE with the appropriate values,
... ... @@ -117,7 +117,6 @@
117 117 return changed;
118 118 }
119 119  
120   -
121 120 /**
122 121 * genphy_setup_forced - configures/forces speed/duplex from @phydev
123 122 * @phydev: target phy_device struct
124 123  
125 124  
126 125  
... ... @@ -130,14 +129,15 @@
130 129 int err;
131 130 int ctl = BMCR_ANRESTART;
132 131  
133   - phydev->pause = phydev->asym_pause = 0;
  132 + phydev->pause = 0;
  133 + phydev->asym_pause = 0;
134 134  
135   - if (SPEED_1000 == phydev->speed)
  135 + if (phydev->speed == SPEED_1000)
136 136 ctl |= BMCR_SPEED1000;
137   - else if (SPEED_100 == phydev->speed)
  137 + else if (phydev->speed == SPEED_100)
138 138 ctl |= BMCR_SPEED100;
139 139  
140   - if (DUPLEX_FULL == phydev->duplex)
  140 + if (phydev->duplex == DUPLEX_FULL)
141 141 ctl |= BMCR_FULLDPLX;
142 142  
143 143 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
... ... @@ -145,7 +145,6 @@
145 145 return err;
146 146 }
147 147  
148   -
149 148 /**
150 149 * genphy_restart_aneg - Enable and Restart Autonegotiation
151 150 * @phydev: target phy_device struct
... ... @@ -169,7 +168,6 @@
169 168 return ctl;
170 169 }
171 170  
172   -
173 171 /**
174 172 * genphy_config_aneg - restart auto-negotiation or write BMCR
175 173 * @phydev: target phy_device struct
... ... @@ -182,7 +180,7 @@
182 180 {
183 181 int result;
184 182  
185   - if (AUTONEG_ENABLE != phydev->autoneg)
  183 + if (phydev->autoneg != AUTONEG_ENABLE)
186 184 return genphy_setup_forced(phydev);
187 185  
188 186 result = genphy_config_advert(phydev);
... ... @@ -191,8 +189,10 @@
191 189 return result;
192 190  
193 191 if (result == 0) {
194   - /* Advertisment hasn't changed, but maybe aneg was never on to
195   - * begin with? Or maybe phy was isolated? */
  192 + /*
  193 + * Advertisment hasn't changed, but maybe aneg was never on to
  194 + * begin with? Or maybe phy was isolated?
  195 + */
196 196 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
197 197  
198 198 if (ctl < 0)
... ... @@ -202,8 +202,10 @@
202 202 result = 1; /* do restart aneg */
203 203 }
204 204  
205   - /* Only restart aneg if we are advertising something different
206   - * than we were before. */
  205 + /*
  206 + * Only restart aneg if we are advertising something different
  207 + * than we were before.
  208 + */
207 209 if (result > 0)
208 210 result = genphy_restart_aneg(phydev);
209 211  
... ... @@ -240,7 +242,7 @@
240 242 int i = 0;
241 243  
242 244 printf("%s Waiting for PHY auto negotiation to complete",
243   - phydev->dev->name);
  245 + phydev->dev->name);
244 246 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
245 247 /*
246 248 * Timeout reached ?
... ... @@ -305,7 +307,8 @@
305 307 */
306 308 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
307 309 if (gblpa < 0) {
308   - debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
  310 + debug("Could not read MII_STAT1000. ");
  311 + debug("Ignoring gigabit capability\n");
309 312 gblpa = 0;
310 313 }
311 314 gblpa &= phy_read(phydev,
312 315  
... ... @@ -338,8 +341,9 @@
338 341 if (lpa & LPA_100FULL)
339 342 phydev->duplex = DUPLEX_FULL;
340 343  
341   - } else if (lpa & LPA_10FULL)
  344 + } else if (lpa & LPA_10FULL) {
342 345 phydev->duplex = DUPLEX_FULL;
  346 + }
343 347  
344 348 /*
345 349 * Extended status may indicate that the PHY supports
... ... @@ -580,7 +584,9 @@
580 584 {
581 585 int err = 0;
582 586  
583   - phydev->advertising = phydev->supported = phydev->drv->features;
  587 + phydev->advertising = phydev->drv->features;
  588 + phydev->supported = phydev->drv->features;
  589 +
584 590 phydev->mmds = phydev->drv->mmds;
585 591  
586 592 if (phydev->drv->probe)
... ... @@ -600,7 +606,7 @@
600 606 }
601 607  
602 608 static struct phy_driver *get_phy_driver(struct phy_device *phydev,
603   - phy_interface_t interface)
  609 + phy_interface_t interface)
604 610 {
605 611 struct list_head *entry;
606 612 int phy_id = phydev->phy_id;
607 613  
... ... @@ -622,12 +628,14 @@
622 628 {
623 629 struct phy_device *dev;
624 630  
625   - /* We allocate the device, and initialize the
626   - * default values */
  631 + /*
  632 + * We allocate the device, and initialize the
  633 + * default values
  634 + */
627 635 dev = malloc(sizeof(*dev));
628 636 if (!dev) {
629 637 printf("Failed to allocate PHY device for %s:%d\n",
630   - bus->name, addr);
  638 + bus->name, addr);
631 639 return NULL;
632 640 }
633 641  
... ... @@ -665,8 +673,10 @@
665 673 {
666 674 int phy_reg;
667 675  
668   - /* Grab the bits from PHYIR1, and put them
669   - * in the upper half */
  676 + /*
  677 + * Grab the bits from PHYIR1, and put them
  678 + * in the upper half
  679 + */
670 680 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
671 681  
672 682 if (phy_reg < 0)
673 683  
... ... @@ -686,9 +696,11 @@
686 696 }
687 697  
688 698 static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
689   - unsigned phy_mask, int devad, phy_interface_t interface)
  699 + uint phy_mask, int devad,
  700 + phy_interface_t interface)
690 701 {
691 702 u32 phy_id = 0xffffffff;
  703 +
692 704 while (phy_mask) {
693 705 int addr = ffs(phy_mask) - 1;
694 706 int r = get_phy_id(bus, addr, devad, &phy_id);
695 707  
... ... @@ -701,11 +713,13 @@
701 713 }
702 714  
703 715 static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
704   - unsigned phy_mask, phy_interface_t interface)
  716 + uint phy_mask,
  717 + phy_interface_t interface)
705 718 {
706 719 /* If we have one, return the existing device, with new interface */
707 720 while (phy_mask) {
708 721 int addr = ffs(phy_mask) - 1;
  722 +
709 723 if (bus->phymap[addr]) {
710 724 bus->phymap[addr]->interface = interface;
711 725 return bus->phymap[addr];
... ... @@ -716,7 +730,8 @@
716 730 }
717 731  
718 732 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
719   - unsigned phy_mask, phy_interface_t interface)
  733 + uint phy_mask,
  734 + phy_interface_t interface)
720 735 {
721 736 int i;
722 737 struct phy_device *phydev;
... ... @@ -728,7 +743,7 @@
728 743 /* Otherwise we have to try Clause 45 */
729 744 for (i = 0; i < 5; i++) {
730 745 phydev = create_phy_by_mask(bus, phy_mask,
731   - i ? i : MDIO_DEVAD_NONE, interface);
  746 + i ? i : MDIO_DEVAD_NONE, interface);
732 747 if (IS_ERR(phydev))
733 748 return NULL;
734 749 if (phydev)
... ... @@ -738,6 +753,7 @@
738 753 debug("\n%s PHY: ", bus->name);
739 754 while (phy_mask) {
740 755 int addr = ffs(phy_mask) - 1;
  756 +
741 757 debug("%d ", addr);
742 758 phy_mask &= ~(1 << addr);
743 759 }
... ... @@ -747,7 +763,8 @@
747 763 }
748 764  
749 765 /**
750   - * get_phy_device - reads the specified PHY device and returns its @phy_device struct
  766 + * get_phy_device - reads the specified PHY device and returns its
  767 + * @phy_device struct
751 768 * @bus: the target MII bus
752 769 * @addr: PHY address on the MII bus
753 770 *
754 771  
... ... @@ -826,15 +843,15 @@
826 843 return phy_reset(phydev);
827 844 }
828 845  
829   -struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
830   - phy_interface_t interface)
  846 +struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
  847 + phy_interface_t interface)
831 848 {
832 849 /* Reset the bus */
833 850 if (bus->reset) {
834 851 bus->reset(bus);
835 852  
836 853 /* Wait 15ms to make sure the PHY has come out of hard reset */
837   - udelay(15000);
  854 + mdelay(15);
838 855 }
839 856  
840 857 return get_phy_device_by_mask(bus, phy_mask, interface);
... ... @@ -850,8 +867,8 @@
850 867 phy_reset(phydev);
851 868 if (phydev->dev && phydev->dev != dev) {
852 869 printf("%s:%d is connected to %s. Reconnecting to %s\n",
853   - phydev->bus->name, phydev->addr,
854   - phydev->dev->name, dev->name);
  870 + phydev->bus->name, phydev->addr,
  871 + phydev->dev->name, dev->name);
855 872 }
856 873 phydev->dev = dev;
857 874 debug("%s connected to %s\n", dev->name, phydev->drv->name);
858 875  
859 876  
860 877  
... ... @@ -859,20 +876,23 @@
859 876  
860 877 #ifdef CONFIG_DM_ETH
861 878 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
862   - struct udevice *dev, phy_interface_t interface)
  879 + struct udevice *dev,
  880 + phy_interface_t interface)
863 881 #else
864 882 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
865   - struct eth_device *dev, phy_interface_t interface)
  883 + struct eth_device *dev,
  884 + phy_interface_t interface)
866 885 #endif
867 886 {
868 887 struct phy_device *phydev = NULL;
869 888 #ifdef CONFIG_PHY_FIXED
870 889 int sn;
871 890 const char *name;
  891 +
872 892 sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
873 893 while (sn > 0) {
874 894 name = fdt_get_name(gd->fdt_blob, sn, NULL);
875   - if (name != NULL && strcmp(name, "fixed-link") == 0) {
  895 + if (name && strcmp(name, "fixed-link") == 0) {
876 896 phydev = phy_device_create(bus,
877 897 sn, PHY_FIXED_ID, interface);
878 898 break;
... ... @@ -880,7 +900,7 @@
880 900 sn = fdt_next_subnode(gd->fdt_blob, sn);
881 901 }
882 902 #endif
883   - if (phydev == NULL)
  903 + if (!phydev)
884 904 phydev = phy_find_by_mask(bus, 1 << addr, interface);
885 905  
886 906 if (phydev)
drivers/net/phy/smsc.c
Diff comments   View file @ d231182
... ... @@ -83,6 +83,16 @@
83 83 .shutdown = &genphy_shutdown,
84 84 };
85 85  
  86 +static struct phy_driver lan8741_driver = {
  87 + .name = "SMSC LAN8741",
  88 + .uid = 0x0007c120,
  89 + .mask = 0xffff0,
  90 + .features = PHY_BASIC_FEATURES,
  91 + .config = &genphy_config_aneg,
  92 + .startup = &genphy_startup,
  93 + .shutdown = &genphy_shutdown,
  94 +};
  95 +
86 96 static struct phy_driver lan8742_driver = {
87 97 .name = "SMSC LAN8742",
88 98 .uid = 0x0007c130,
... ... @@ -99,6 +109,7 @@
99 109 phy_register(&lan911x_driver);
100 110 phy_register(&lan8700_driver);
101 111 phy_register(&lan8740_driver);
  112 + phy_register(&lan8741_driver);
102 113 phy_register(&lan8742_driver);
103 114  
104 115 return 0;
... ... @@ -20,8 +20,6 @@
20 20 #include <asm/processor.h>
21 21 #include <asm/io.h>
22 22  
23   -DECLARE_GLOBAL_DATA_PTR;
24   -
25 23 #ifndef CONFIG_DM_ETH
26 24 /* Default initializations for TSEC controllers. */
27 25  
28 26  
29 27  
... ... @@ -74,11 +72,11 @@
74 72 * to the register offset used for external PHY accesses
75 73 */
76 74 tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa),
77   - 0, TBI_ANA, TBIANA_SETTINGS);
  75 + 0, TBI_ANA, TBIANA_SETTINGS);
78 76 tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa),
79   - 0, TBI_TBICON, TBICON_CLK_SELECT);
  77 + 0, TBI_TBICON, TBICON_CLK_SELECT);
80 78 tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa),
81   - 0, TBI_CR, CONFIG_TSEC_TBICR_SETTINGS);
  79 + 0, TBI_CR, CONFIG_TSEC_TBICR_SETTINGS);
82 80 }
83 81  
84 82 #ifdef CONFIG_MCAST_TFTP
... ... @@ -116,7 +114,7 @@
116 114 whichbit = (result >> 24) & 0x1f; /* the 5 LSB = which bit to set */
117 115 whichreg = result >> 29; /* the 3 MSB = which reg to set it in */
118 116  
119   - value = 1 << (31-whichbit);
  117 + value = BIT(31 - whichbit);
120 118  
121 119 if (set)
122 120 setbits_be32(&regs->hash.gaddr0 + whichreg, value);
... ... @@ -171,7 +169,6 @@
171 169  
172 170 out_be32(&regs->attr, ATTR_INIT_SETTINGS);
173 171 out_be32(&regs->attreli, ATTRELI_INIT_SETTINGS);
174   -
175 172 }
176 173  
177 174 /*
... ... @@ -222,8 +219,8 @@
222 219 out_be32(&regs->maccfg2, maccfg2);
223 220  
224 221 printf("Speed: %d, %s duplex%s\n", phydev->speed,
225   - (phydev->duplex) ? "full" : "half",
226   - (phydev->port == PORT_FIBRE) ? ", fiber mode" : "");
  222 + (phydev->duplex) ? "full" : "half",
  223 + (phydev->port == PORT_FIBRE) ? ", fiber mode" : "");
227 224 }
228 225  
229 226 /*
... ... @@ -240,7 +237,7 @@
240 237 {
241 238 struct tsec_private *priv = (struct tsec_private *)dev->priv;
242 239 struct tsec __iomem *regs = priv->regs;
243   - uint16_t status;
  240 + u16 status;
244 241 int result = 0;
245 242 int i;
246 243  
... ... @@ -287,7 +284,7 @@
287 284  
288 285 while (!(in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY)) {
289 286 int length = in_be16(&priv->rxbd[priv->rx_idx].length);
290   - uint16_t status = in_be16(&priv->rxbd[priv->rx_idx].status);
  287 + u16 status = in_be16(&priv->rxbd[priv->rx_idx].status);
291 288 uchar *packet = net_rx_packets[priv->rx_idx];
292 289  
293 290 /* Send the packet up if there were no errors */
... ... @@ -323,8 +320,8 @@
323 320  
324 321 if (!(in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY)) {
325 322 int length = in_be16(&priv->rxbd[priv->rx_idx].length);
326   - uint16_t status = in_be16(&priv->rxbd[priv->rx_idx].status);
327   - uint32_t buf;
  323 + u16 status = in_be16(&priv->rxbd[priv->rx_idx].status);
  324 + u32 buf;
328 325  
329 326 /* Send the packet up if there were no errors */
330 327 if (!(status & RXBD_STATS)) {
... ... @@ -347,7 +344,7 @@
347 344 static int tsec_free_pkt(struct udevice *dev, uchar *packet, int length)
348 345 {
349 346 struct tsec_private *priv = (struct tsec_private *)dev->priv;
350   - uint16_t status;
  347 + u16 status;
351 348  
352 349 out_be16(&priv->rxbd[priv->rx_idx].length, 0);
353 350  
... ... @@ -427,7 +424,8 @@
427 424 clrbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
428 425  
429 426 do {
430   - uint16_t status;
  427 + u16 status;
  428 +
431 429 tsec_send(priv->dev, (void *)pkt, sizeof(pkt));
432 430  
433 431 /* Wait for buffer to be received */
... ... @@ -478,7 +476,7 @@
478 476 static void startup_tsec(struct tsec_private *priv)
479 477 {
480 478 struct tsec __iomem *regs = priv->regs;
481   - uint16_t status;
  479 + u16 status;
482 480 int i;
483 481  
484 482 /* reset the indices to zero */
... ... @@ -532,7 +530,7 @@
532 530 * This allows U-Boot to find the first active controller.
533 531 */
534 532 #ifndef CONFIG_DM_ETH
535   -static int tsec_init(struct eth_device *dev, bd_t * bd)
  533 +static int tsec_init(struct eth_device *dev, bd_t *bd)
536 534 #else
537 535 static int tsec_init(struct udevice *dev)
538 536 #endif
539 537  
540 538  
541 539  
... ... @@ -616,22 +614,23 @@
616 614 }
617 615  
618 616 if (ecntrl & ECNTRL_REDUCED_MODE) {
  617 + phy_interface_t interface;
  618 +
619 619 if (ecntrl & ECNTRL_REDUCED_MII_MODE)
620 620 return PHY_INTERFACE_MODE_RMII;
621   - else {
622   - phy_interface_t interface = priv->interface;
623 621  
624   - /*
625   - * This isn't autodetected, so it must
626   - * be set by the platform code.
627   - */
628   - if ((interface == PHY_INTERFACE_MODE_RGMII_ID) ||
629   - (interface == PHY_INTERFACE_MODE_RGMII_TXID) ||
630   - (interface == PHY_INTERFACE_MODE_RGMII_RXID))
631   - return interface;
  622 + interface = priv->interface;
632 623  
633   - return PHY_INTERFACE_MODE_RGMII;
634   - }
  624 + /*
  625 + * This isn't autodetected, so it must
  626 + * be set by the platform code.
  627 + */
  628 + if (interface == PHY_INTERFACE_MODE_RGMII_ID ||
  629 + interface == PHY_INTERFACE_MODE_RGMII_TXID ||
  630 + interface == PHY_INTERFACE_MODE_RGMII_RXID)
  631 + return interface;
  632 +
  633 + return PHY_INTERFACE_MODE_RGMII;
635 634 }
636 635  
637 636 if (priv->flags & TSEC_GIGABIT)
638 637  
639 638  
640 639  
641 640  
... ... @@ -691,17 +690,19 @@
691 690 int i;
692 691 struct tsec_private *priv;
693 692  
694   - dev = (struct eth_device *)malloc(sizeof *dev);
  693 + dev = (struct eth_device *)malloc(sizeof(*dev));
695 694  
696   - if (NULL == dev)
  695 + if (!dev)
697 696 return 0;
698 697  
699   - memset(dev, 0, sizeof *dev);
  698 + memset(dev, 0, sizeof(*dev));
700 699  
701 700 priv = (struct tsec_private *)malloc(sizeof(*priv));
702 701  
703   - if (NULL == priv)
  702 + if (!priv) {
  703 + free(dev);
704 704 return 0;
  705 + }
705 706  
706 707 priv->regs = tsec_info->regs;
707 708 priv->phyregs_sgmii = tsec_info->miiregs_sgmii;
708 709  
... ... @@ -747,10 +748,11 @@
747 748 int tsec_eth_init(bd_t *bis, struct tsec_info_struct *tsecs, int num)
748 749 {
749 750 int i;
750   - int ret, count = 0;
  751 + int count = 0;
751 752  
752 753 for (i = 0; i < num; i++) {
753   - ret = tsec_initialize(bis, &tsecs[i]);
  754 + int ret = tsec_initialize(bis, &tsecs[i]);
  755 +
754 756 if (ret > 0)
755 757 count += ret;
756 758 }
757 759  
758 760  
759 761  
760 762  
761 763  
762 764  
763 765  
... ... @@ -775,45 +777,43 @@
775 777 struct tsec_private *priv = dev_get_priv(dev);
776 778 struct eth_pdata *pdata = dev_get_platdata(dev);
777 779 struct fsl_pq_mdio_info mdio_info;
778   - int offset = 0;
779   - int reg;
  780 + struct ofnode_phandle_args phandle_args;
  781 + ofnode parent;
780 782 const char *phy_mode;
781 783 int ret;
782 784  
783   - pdata->iobase = (phys_addr_t)devfdt_get_addr(dev);
  785 + pdata->iobase = (phys_addr_t)dev_read_addr(dev);
784 786 priv->regs = (struct tsec *)pdata->iobase;
785 787  
786   - offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev),
787   - "phy-handle");
788   - if (offset > 0) {
789   - reg = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0);
790   - priv->phyaddr = reg;
791   - } else {
  788 + if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
  789 + &phandle_args)) {
792 790 debug("phy-handle does not exist under tsec %s\n", dev->name);
793 791 return -ENOENT;
  792 + } else {
  793 + int reg = ofnode_read_u32_default(phandle_args.node, "reg", 0);
  794 +
  795 + priv->phyaddr = reg;
794 796 }
795 797  
796   - offset = fdt_parent_offset(gd->fdt_blob, offset);
797   - if (offset > 0) {
798   - reg = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0);
  798 + parent = ofnode_get_parent(phandle_args.node);
  799 + if (ofnode_valid(parent)) {
  800 + int reg = ofnode_read_u32_default(parent, "reg", 0);
799 801 priv->phyregs_sgmii = (struct tsec_mii_mng *)(reg + 0x520);
800 802 } else {
801 803 debug("No parent node for PHY?\n");
802 804 return -ENOENT;
803 805 }
804 806  
805   - offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev),
806   - "tbi-handle");
807   - if (offset > 0) {
808   - reg = fdtdec_get_int(gd->fdt_blob, offset, "reg",
809   - CONFIG_SYS_TBIPA_VALUE);
810   - priv->tbiaddr = reg;
811   - } else {
  807 + if (dev_read_phandle_with_args(dev, "tbi-handle", NULL, 0, 0,
  808 + &phandle_args)) {
812 809 priv->tbiaddr = CONFIG_SYS_TBIPA_VALUE;
  810 + } else {
  811 + int reg = ofnode_read_u32_default(phandle_args.node, "reg",
  812 + CONFIG_SYS_TBIPA_VALUE);
  813 + priv->tbiaddr = reg;
813 814 }
814 815  
815   - phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
816   - "phy-connection-type", NULL);
  816 + phy_mode = dev_read_prop(dev, "phy-connection-type", NULL);
817 817 if (phy_mode)
818 818 pdata->phy_interface = phy_get_interface_by_name(phy_mode);
819 819 if (pdata->phy_interface == -1) {