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Commit d3f8752ed60cbd18022aee0afb7784754c125170

Authored by Allen Martin
Committed by Tom Warren
1 parent d08b9e9c7e
Exists in master and in 53 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

tegra: fdt: remove clocks nodes 

These nodes are unused.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

Showing 12 changed files with 0 additions and 147 deletions Side-by-side Diff

arch/arm/dts/tegra20.dtsi
Diff comments   View file @ d3f8752
... ... @@ -10,16 +10,6 @@
10 10 #clock-cells = <1>;
11 11 };
12 12  
13   - clocks {
14   - #address-cells = <1>;
15   - #size-cells = <0>;
16   -
17   - osc: clock {
18   - compatible = "fixed-clock";
19   - #clock-cells = <0>;
20   - };
21   - };
22   -
23 13 intc: interrupt-controller@50041000 {
24 14 compatible = "nvidia,tegra20-gic";
25 15 interrupt-controller;
arch/arm/dts/tegra30.dtsi
Diff comments   View file @ d3f8752
... ... @@ -9,16 +9,6 @@
9 9 #clock-cells = <1>;
10 10 };
11 11  
12   - clocks {
13   - #address-cells = <1>;
14   - #size-cells = <0>;
15   -
16   - osc: clock {
17   - compatible = "fixed-clock";
18   - #clock-cells = <0>;
19   - };
20   - };
21   -
22 12 i2c@7000c000 {
23 13 #address-cells = <1>;
24 14 #size-cells = <0>;
board/avionic-design/dts/tegra20-medcom-wide.dts
Diff comments   View file @ d3f8752
... ... @@ -14,16 +14,6 @@
14 14 reg = <0x00000000 0x20000000>;
15 15 };
16 16  
17   - clocks {
18   - clk_32k: clk_32k {
19   - clock-frequency = <32000>;
20   - };
21   -
22   - osc {
23   - clock-frequency = <12000000>;
24   - };
25   - };
26   -
27 17 host1x {
28 18 status = "okay";
29 19  
... ... @@ -35,10 +25,6 @@
35 25 status = "okay";
36 26 };
37 27 };
38   - };
39   -
40   - clock@60006000 {
41   - clocks = <&clk_32k &osc>;
42 28 };
43 29  
44 30 serial@70006300 {
board/avionic-design/dts/tegra20-plutux.dts
Diff comments   View file @ d3f8752
... ... @@ -14,20 +14,6 @@
14 14 reg = <0x00000000 0x20000000>;
15 15 };
16 16  
17   - clocks {
18   - clk_32k: clk_32k {
19   - clock-frequency = <32000>;
20   - };
21   -
22   - osc {
23   - clock-frequency = <12000000>;
24   - };
25   - };
26   -
27   - clock@60006000 {
28   - clocks = <&clk_32k &osc>;
29   - };
30   -
31 17 serial@70006300 {
32 18 clock-frequency = <216000000>;
33 19 };
board/avionic-design/dts/tegra20-tec.dts
Diff comments   View file @ d3f8752
... ... @@ -14,16 +14,6 @@
14 14 reg = <0x00000000 0x20000000>;
15 15 };
16 16  
17   - clocks {
18   - clk_32k: clk_32k {
19   - clock-frequency = <32000>;
20   - };
21   -
22   - osc {
23   - clock-frequency = <12000000>;
24   - };
25   - };
26   -
27 17 host1x {
28 18 status = "okay";
29 19  
... ... @@ -35,10 +25,6 @@
35 25 status = "okay";
36 26 };
37 27 };
38   - };
39   -
40   - clock@60006000 {
41   - clocks = <&clk_32k &osc>;
42 28 };
43 29  
44 30 serial@70006300 {
board/compal/dts/tegra20-paz00.dts
Diff comments   View file @ d3f8752
... ... @@ -14,19 +14,6 @@
14 14 reg = <0x00000000 0x20000000>;
15 15 };
16 16  
17   - clocks {
18   - clk_32k: clk_32k {
19   - clock-frequency = <32000>;
20   - };
21   - osc {
22   - clock-frequency = <12000000>;
23   - };
24   - };
25   -
26   - clock@60006000 {
27   - clocks = <&clk_32k &osc>;
28   - };
29   -
30 17 serial@70006000 {
31 18 clock-frequency = < 216000000 >;
32 19 };
board/compulab/dts/tegra20-trimslice.dts
Diff comments   View file @ d3f8752
... ... @@ -15,19 +15,6 @@
15 15 reg = <0x00000000 0x40000000>;
16 16 };
17 17  
18   - clocks {
19   - clk_32k: clk_32k {
20   - clock-frequency = <32000>;
21   - };
22   - osc {
23   - clock-frequency = <12000000>;
24   - };
25   - };
26   -
27   - clock@60006000 {
28   - clocks = <&clk_32k &osc>;
29   - };
30   -
31 18 serial@70006000 {
32 19 clock-frequency = <216000000>;
33 20 };
board/nvidia/dts/tegra20-harmony.dts
Diff comments   View file @ d3f8752
... ... @@ -15,19 +15,6 @@
15 15 reg = <0x00000000 0x40000000>;
16 16 };
17 17  
18   - clocks {
19   - clk_32k: clk_32k {
20   - clock-frequency = <32000>;
21   - };
22   - osc {
23   - clock-frequency = <12000000>;
24   - };
25   - };
26   -
27   - clock@60006000 {
28   - clocks = <&clk_32k &osc>;
29   - };
30   -
31 18 serial@70006300 {
32 19 clock-frequency = < 216000000 >;
33 20 };
board/nvidia/dts/tegra20-seaboard.dts
Diff comments   View file @ d3f8752
... ... @@ -45,16 +45,6 @@
45 45 };
46 46 };
47 47  
48   - clocks {
49   - osc {
50   - clock-frequency = <12000000>;
51   - };
52   - };
53   -
54   - clock@60006000 {
55   - clocks = <&clk_32k &osc>;
56   - };
57   -
58 48 serial@70006300 {
59 49 clock-frequency = < 216000000 >;
60 50 };
board/nvidia/dts/tegra20-ventana.dts
Diff comments   View file @ d3f8752
... ... @@ -14,19 +14,6 @@
14 14 reg = <0x00000000 0x40000000>;
15 15 };
16 16  
17   - clocks {
18   - clk_32k: clk_32k {
19   - clock-frequency = <32000>;
20   - };
21   - osc {
22   - clock-frequency = <12000000>;
23   - };
24   - };
25   -
26   - clock@60006000 {
27   - clocks = <&clk_32k &osc>;
28   - };
29   -
30 17 serial@70006300 {
31 18 clock-frequency = < 216000000 >;
32 19 };
board/nvidia/dts/tegra20-whistler.dts
Diff comments   View file @ d3f8752
... ... @@ -16,16 +16,6 @@
16 16 reg = < 0x00000000 0x20000000 >;
17 17 };
18 18  
19   - clocks {
20   - osc {
21   - clock-frequency = <12000000>;
22   - };
23   - };
24   -
25   - clock@60006000 {
26   - clocks = <&clk_32k &osc>;
27   - };
28   -
29 19 serial@70006000 {
30 20 clock-frequency = < 216000000 >;
31 21 };
board/nvidia/dts/tegra30-cardhu.dts
Diff comments   View file @ d3f8752
... ... @@ -20,19 +20,6 @@
20 20 reg = <0x80000000 0x40000000>;
21 21 };
22 22  
23   - clocks {
24   - clk_32k: clk_32K {
25   - clock-frequency = <32768>;
26   - };
27   - osc {
28   - clock-frequency = <12000000>;
29   - };
30   - };
31   -
32   - clock@60006000 {
33   - clocks = <&clk_32k &osc>;
34   - };
35   -
36 23 i2c@7000c000 {
37 24 clock-frequency = <100000>;
38 25 };