Eric Lee / smarc-uboot

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Commit d5254f149da9e6cd649d887b042ce577ef3ba78d

Authored by Alessandro Rubini
Committed by Jean-Christophe PLAGNIOL-VILLARD
1 parent 7d264c1ef2
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

Initial support for Nomadik 8815 development board 

The NMDK8815 board is distributed by ST Microelectornics.
Other (proprietary) code must be run to unlock the CPU before
U-Boot runs. doc/README.nmdk8815 outlines the boot sequence.

This is the initial port, with basic infrastructure and
a working serial port.

Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Showing 13 changed files with 1026 additions and 0 deletions Side-by-side Diff

... ... @@ -590,6 +590,11 @@
590 590 pdnb3 xscale
591 591 scpu xscale
592 592  
  593 +Alessandro Rubini <rubini@unipv.it>
  594 +Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>
  595 +
  596 + nmdk8815 ARM926EJS (Nomadik 8815 Soc)
  597 +
593 598 Robert Schwebel <r.schwebel@pengutronix.de>
594 599  
595 600 csb226 xscale
... ... @@ -501,6 +501,7 @@
501 501 mx1ads \
502 502 mx1fs2 \
503 503 netstar \
  504 + nmdk8815 \
504 505 omap1510inn \
505 506 omap1610h2 \
506 507 omap1610inn \
... ... @@ -2752,6 +2752,18 @@
2752 2752 netstar_config: unconfig
2753 2753 @$(MKCONFIG) $(@:_config=) arm arm925t netstar
2754 2754  
  2755 +nmdk8815_config \
  2756 +nmdk8815_onenand_config: unconfig
  2757 + @mkdir -p $(obj)include
  2758 + @ > $(obj)include/config.h
  2759 + @if [ "$(findstring _onenand, $@)" ] ; then \
  2760 + echo "#define CONFIG_BOOT_ONENAND" >> $(obj)include/config.h; \
  2761 + $(XECHO) "... configured for OneNand Flash"; \
  2762 + else \
  2763 + $(XECHO) "... configured for Nand Flash"; \
  2764 + fi
  2765 + @$(MKCONFIG) -a nmdk8815 arm arm926ejs nmdk8815 st nomadik
  2766 +
2755 2767 omap1510inn_config : unconfig
2756 2768 @$(MKCONFIG) $(@:_config=) arm arm925t omap1510inn
2757 2769  
board/st/nmdk8815/Makefile
Diff comments   View file @ d5254f1
  1 +#
  2 +# (C) Copyright 2000-2004
  3 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4 +#
  5 +# (C) Copyright 2004
  6 +# ARM Ltd.
  7 +# Philippe Robin, <philippe.robin@arm.com>
  8 +#
  9 +# See file CREDITS for list of people who contributed to this
  10 +# project.
  11 +#
  12 +# This program is free software; you can redistribute it and/or
  13 +# modify it under the terms of the GNU General Public License as
  14 +# published by the Free Software Foundation; either version 2 of
  15 +# the License, or (at your option) any later version.
  16 +#
  17 +# This program is distributed in the hope that it will be useful,
  18 +# but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20 +# GNU General Public License for more details.
  21 +#
  22 +# You should have received a copy of the GNU General Public License
  23 +# along with this program; if not, write to the Free Software
  24 +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25 +# MA 02111-1307 USA
  26 +#
  27 +
  28 +include $(TOPDIR)/config.mk
  29 +
  30 +LIB = $(obj)lib$(BOARD).a
  31 +
  32 +COBJS := nmdk8815.o
  33 +SOBJS := platform.o
  34 +
  35 +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
  36 +OBJS := $(addprefix $(obj),$(COBJS))
  37 +SOBJS := $(addprefix $(obj),$(SOBJS))
  38 +
  39 +$(LIB): $(obj).depend $(OBJS) $(SOBJS)
  40 + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
  41 +
  42 +clean:
  43 + rm -f $(SOBJS) $(OBJS)
  44 +
  45 +distclean: clean
  46 + rm -f $(LIB) core *.bak $(obj).depend
  47 +
  48 +#########################################################################
  49 +
  50 +# defines $(obj).depend target
  51 +include $(SRCTREE)/rules.mk
  52 +
  53 +sinclude $(obj).depend
  54 +
  55 +#########################################################################
board/st/nmdk8815/config.mk
Diff comments   View file @ d5254f1
  1 +# (C) Copyright 2007
  2 +# STMicroelectronics, <www.st.com>
  3 +#
  4 +# See file CREDITS for list of people who contributed to this
  5 +# project.
  6 +#
  7 +# This program is free software; you can redistribute it and/or
  8 +# modify it under the terms of the GNU General Public License as
  9 +# published by the Free Software Foundation; either version 2 of
  10 +# the License, or (at your option) any later version.
  11 +#
  12 +# This program is distributed in the hope that it will be useful,
  13 +# but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15 +# GNU General Public License for more details.
  16 +#
  17 +# You should have received a copy of the GNU General Public License
  18 +# along with this program; if not, write to the Free Software
  19 +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20 +# MA 02111-1307 USA
  21 +#
  22 +#
  23 +# image should be loaded at 0x01000000
  24 +#
  25 +
  26 +TEXT_BASE = 0x03F80000
board/st/nmdk8815/nmdk8815.c
Diff comments   View file @ d5254f1
  1 +/*
  2 + * (C) Copyright 2005
  3 + * STMicrolelctronics, <www.st.com>
  4 + *
  5 + * (C) Copyright 2004
  6 + * ARM Ltd.
  7 + * Philippe Robin, <philippe.robin@arm.com>
  8 + *
  9 + * See file CREDITS for list of people who contributed to this
  10 + * project.
  11 + *
  12 + * This program is free software; you can redistribute it and/or
  13 + * modify it under the terms of the GNU General Public License as
  14 + * published by the Free Software Foundation; either version 2 of
  15 + * the License, or (at your option) any later version.
  16 + *
  17 + * This program is distributed in the hope that it will be useful,
  18 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20 + * GNU General Public License for more details.
  21 + *
  22 + * You should have received a copy of the GNU General Public License
  23 + * along with this program; if not, write to the Free Software
  24 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25 + * MA 02111-1307 USA
  26 + */
  27 +
  28 +#include <common.h>
  29 +#include <asm/io.h>
  30 +
  31 +DECLARE_GLOBAL_DATA_PTR;
  32 +
  33 +#ifdef CONFIG_SHOW_BOOT_PROGRESS
  34 +void show_boot_progress(int progress)
  35 +{
  36 + printf("%i\n", progress);
  37 +}
  38 +#endif
  39 +
  40 +/*
  41 + * Miscellaneous platform dependent initialisations
  42 + */
  43 +int board_init(void)
  44 +{
  45 + gd->bd->bi_arch_number = MACH_TYPE_NOMADIK;
  46 + gd->bd->bi_boot_params = 0x00000100;
  47 + writel(0xC37800F0, NOMADIK_GPIO1_BASE + 0x20);
  48 + writel(0x00000000, NOMADIK_GPIO1_BASE + 0x24);
  49 + writel(0x00000000, NOMADIK_GPIO1_BASE + 0x28);
  50 + writel(readl(NOMADIK_SRC_BASE) | 0x8000, NOMADIK_SRC_BASE);
  51 +
  52 + icache_enable();
  53 +
  54 + return 0;
  55 +}
  56 +
  57 +int misc_init_r(void)
  58 +{
  59 + setenv("verify", "n");
  60 + return 0;
  61 +}
  62 +
  63 +int dram_init(void)
  64 +{
  65 + /* set dram bank start addr and size */
  66 + gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  67 + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  68 +
  69 + gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
  70 + gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
  71 + return 0;
  72 +}
board/st/nmdk8815/platform.S
Diff comments   View file @ d5254f1
  1 +/*
  2 + * Board specific setup info
  3 + *
  4 + * (C) Copyright 2005
  5 + * STMicrolelctronics, <www.st.com>
  6 + *
  7 + * (C) Copyright 2004, ARM Ltd.
  8 + * Philippe Robin, <philippe.robin@arm.com>
  9 + *
  10 + * See file CREDITS for list of people who contributed to this
  11 + * project.
  12 + *
  13 + * This program is free software; you can redistribute it and/or
  14 + * modify it under the terms of the GNU General Public License as
  15 + * published by the Free Software Foundation; either version 2 of
  16 + * the License, or (at your option) any later version.
  17 + *
  18 + * This program is distributed in the hope that it will be useful,
  19 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21 + * GNU General Public License for more details.
  22 + *
  23 + * You should have received a copy of the GNU General Public License
  24 + * along with this program; if not, write to the Free Software
  25 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26 + * MA 02111-1307 USA
  27 + */
  28 +
  29 +#include <config.h>
  30 +#include <version.h>
  31 +
  32 +.globl lowlevel_init
  33 +lowlevel_init:
  34 + /* Jump to the flash address */
  35 + ldr r0, =CFG_ONENAND_BASE
  36 +
  37 + /*
  38 + * Make it independent whether we boot from 0x0 or 0x30000000.
  39 + * Non-portable: it relies on the knowledge that ip has to be updated
  40 + */
  41 + orr ip, ip, r0 /* adjust return address of cpu_init_crit */
  42 + orr lr, lr, r0 /* adjust return address */
  43 + orr pc, pc, r0 /* jump to the normal address */
  44 + nop
  45 +
  46 + /* Initialize PLL, Remap clear, FSMC, MPMC here! */
  47 + /* What about GPIO, CLCD and UART */
  48 +
  49 + /* PLL Initialization */
  50 + /* Prog the PLL1 @ 266 MHz ==> SDRAM Clock = 100.8 MHz */
  51 + ldr r0, =NOMADIK_SRC_BASE
  52 +
  53 + ldr r1, =0x2B013502
  54 +
  55 + str r1, [r0, #0x14]
  56 +
  57 + /* Used to set all the timers clock to 2.4MHZ */
  58 + ldr r1, =0x2AAAA004
  59 + str r1, [r0]
  60 +
  61 + ldr r1, =0x10000000
  62 + str r1, [r0, #0x10]
  63 +
  64 + /* FSMC setup ---- */
  65 + ldr r0, =NOMADIK_FSMC_BASE
  66 +
  67 + ldr r1, =0x10DB /* For 16-bit NOR flash */
  68 + str r1, [r0, #0x08]
  69 +
  70 + ldr r1, =0x03333333 /* For 16-bit NOR flash */
  71 + str r1, [r0, #0xc]
  72 +
  73 + /* oneNAND setting */
  74 + ldr r1, =0x0000105B /* BCR0 Prog control register */
  75 + str r1, [r0]
  76 +
  77 + ldr r1, =0x0A200551 /* BTR0 Prog timing register */
  78 + str r1, [r0, #0x04]
  79 +
  80 + /* preload the instructions into icache */
  81 + add r0, pc, #0x1F
  82 + bic r0, r0, #0x1F
  83 + mcr p15, 0, r0, c7, c13, 1
  84 + add r0, r0, #0x20
  85 + mcr p15, 0, r0, c7, c13, 1
  86 +
  87 + /* Now Clear Remap */
  88 + ldr r0, =NOMADIK_SRC_BASE
  89 +
  90 + ldr r1, =0x2004
  91 + str r1, [r0]
  92 +
  93 + ldr r1, =0x10000000
  94 + str r1, [r0, #0x10]
  95 +
  96 + ldr r0, =0x101E9000
  97 + ldr r1, =0x2004
  98 + str r1, [r0]
  99 +
  100 + ldr r0, =NOMADIK_SRC_BASE
  101 + ldr r1, =0x2104
  102 + str r1, [r0]
  103 +
  104 + /* FSMC setup -- */
  105 + mov r0, #(NOMADIK_FSMC_BASE & 0x10000000)
  106 + orr r0, r0, #(NOMADIK_FSMC_BASE & 0x0FFFFFFF)
  107 +
  108 + ldr r1, =0x10DB /* For 16-bit NOR flash */
  109 + str r1, [r0, #0x8]
  110 +
  111 + ldr r1, =0x03333333 /* For 16-bit NOR flash */
  112 + str r1, [r0, #0xc]
  113 +
  114 + /* MPMC Setup */
  115 + ldr r0, =NOMADIK_MPMC_BASE
  116 +
  117 + ldr r1, =0xF00003
  118 + str r1, [r0] /* Enable the MPMC and the DLL */
  119 +
  120 + ldr r1, =0x183
  121 + str r1, [r0, #0x20]
  122 +
  123 + ldr r2, =NOMADIK_PMU_BASE
  124 +
  125 + ldr r1, =0x1111
  126 + str r1, [r2]
  127 +
  128 + ldr r1, =0x1111 /* Prog the, mand delay strategy */
  129 + str r1, [r0, #0x28]
  130 +
  131 + ldr r1, =0x103 /* NOP ,mand */
  132 + str r1, [r0, #0x20]
  133 +
  134 + /* FIXME -- Wait required here */
  135 +
  136 + ldr r1, =0x103 /* PALL ,mand*/
  137 + str r1, [r0, #0x20]
  138 +
  139 + ldr r1, =0x1
  140 + str r1, [r0, #0x24] /* To do at least two auto-refresh */
  141 +
  142 + /* FIXME -- Wait required here */
  143 +
  144 + /* Auto-refresh period = 7.8us @ SDRAM Clock = 100.8 MHz */
  145 + ldr r1, =0x31
  146 + str r1, [r0, #0x24]
  147 +
  148 + /* Prog Little Endian, Not defined in 8800 board */
  149 + ldr r1, =0x0
  150 + str r1, [r0, #0x8]
  151 +
  152 +
  153 + ldr r1, =0x2
  154 + str r1, [r0, #0x30] /* Prog tRP timing */
  155 +
  156 + ldr r1, =0x4 /* Change for 8815 */
  157 + str r1, [r0, #0x34] /* Prog tRAS timing */
  158 +
  159 + ldr r1, =0xB
  160 + str r1, [r0, #0x38] /* Prog tSREX timing */
  161 +
  162 +
  163 + ldr r1, =0x1
  164 + str r1, [r0, #0x44] /* Prog tWR timing */
  165 +
  166 + ldr r1, =0x8
  167 + str r1, [r0, #0x48] /* Prog tRC timing */
  168 +
  169 + ldr r1, =0xA
  170 + str r1, [r0, #0x4C] /* Prog tRFC timing */
  171 +
  172 + ldr r1, =0xB
  173 + str r1, [r0, #0x50] /* Prog tXSR timing */
  174 +
  175 + ldr r1, =0x1
  176 + str r1, [r0, #0x54] /* Prog tRRD timing */
  177 +
  178 + ldr r1, =0x1
  179 + str r1, [r0, #0x58] /* Prog tMRD timing */
  180 +
  181 + ldr r1, =0x1
  182 + str r1, [r0, #0x5C] /* Prog tCDLR timing */
  183 +
  184 + /* DDR-SDRAM MEMORY IS ON BANK0 8815 */
  185 + ldr r1, =0x304 /* Prog RAS and CAS for CS 0 */
  186 + str r1, [r0, #0x104]
  187 +
  188 + /* SDR-SDRAM MEMORY IS ON BANK1 8815 */
  189 + ldr r1, =0x304 /* Prog RAS and CAS for CS 1 */
  190 + str r1, [r0, #0x124]
  191 + /* THE DATA BUS WIDE IS PROGRAM FOR 16-BITS */
  192 + /* DDR-SDRAM MEMORY IS ON BANK0*/
  193 +
  194 + ldr r1, =0x884 /* 8815 : config reg in BRC for CS0 */
  195 + str r1, [r0, #0x100]
  196 +
  197 + /*SDR-SDRAM MEMORY IS ON BANK1*/
  198 +
  199 + ldr r1, =0x884 /* 8815 : config reg in BRC for CS1 */
  200 + str r1, [r0, #0x120]
  201 +
  202 + ldr r1, =0x83 /*MODE Mand*/
  203 + str r1, [r0, #0x20]
  204 +
  205 + /* LOAD MODE REGISTER FOR 2 bursts of 16b, with DDR mem ON BANK0 */
  206 +
  207 + ldr r1, =0x62000 /*Data in*/
  208 + ldr r1, [r1]
  209 +
  210 + /* LOAD MODE REGISTER FOR 2 bursts of 16b, with DDR mem ON BANK1 */
  211 +
  212 + ldr r1, =0x8062000
  213 + ldr r1, [r1]
  214 +
  215 + ldr r1, =0x003
  216 + str r1, [r0, #0x20]
  217 +
  218 + /* ENABLE ALL THE BUFFER FOR EACH AHB PORT*/
  219 +
  220 + ldr r1, =0x01 /* Enable buffer 0 */
  221 + str r1, [r0, #0x400]
  222 +
  223 + ldr r1, =0x01 /* Enable buffer 1 */
  224 + str r1, [r0, #0x420]
  225 +
  226 + ldr r1, =0x01 /* Enable buffer 2 */
  227 + str r1, [r0, #0x440]
  228 +
  229 + ldr r1, =0x01 /* Enable buffer 3 */
  230 + str r1, [r0, #0x460]
  231 +
  232 + ldr r1, =0x01 /* Enable buffer 4 */
  233 + str r1, [r0, #0x480]
  234 +
  235 + ldr r1, =0x01 /* Enable buffer 5 */
  236 + str r1, [r0, #0x4A0]
  237 +
  238 + /* GPIO settings */
  239 +
  240 + ldr r0, =NOMADIK_GPIO1_BASE
  241 +
  242 + ldr r1, =0xC0600000
  243 + str r1, [r0, #0x20]
  244 +
  245 + ldr r1, =0x3F9FFFFF /* ABHI change this for uart1 */
  246 + str r1, [r0, #0x24]
  247 +
  248 + ldr r1, =0x3F9FFFFF /* ABHI change this for uart1 */
  249 + str r1, [r0, #0x28]
  250 +
  251 + ldr r0, =NOMADIK_GPIO0_BASE
  252 +
  253 + ldr r1, =0xFFFFFFFF
  254 + str r1, [r0, #0x20]
  255 +
  256 + ldr r1, =0x00
  257 + str r1, [r0, #0x24]
  258 +
  259 + ldr r1, =0x00
  260 + str r1, [r0, #0x28]
  261 +
  262 + /* Configure CPLD_CTRL register for enabling MUX logic for UART0/UART2 */
  263 +
  264 + ldr r0, =NOMADIK_FSMC_BASE
  265 +
  266 + ldr r1, =0x10DB /* INIT FSMC bank 0 */
  267 + str r1, [r0, #0x00]
  268 +
  269 + ldr r1, =0x0FFFFFFF
  270 + str r1, [r0, #0x04]
  271 +
  272 + ldr r1, =0x010DB /* INIT FSMC bank 1 */
  273 + str r1, [r0, #0x08]
  274 +
  275 + ldr r1, =0x00FFFFFFF
  276 + str r1, [r0, #0x0C]
  277 +
  278 + ldr r0, =NOMADIK_UART0_BASE
  279 +
  280 + ldr r1, =0x00000000
  281 + str r1, [r0, #0x30]
  282 +
  283 + ldr r1, =0x0000004e
  284 + str r1, [r0, #0x24]
  285 +
  286 + ldr r1, =0x00000008
  287 + str r1, [r0, #0x28]
  288 +
  289 + ldr r1, =0x00000060
  290 + str r1, [r0, #0x2C]
  291 +
  292 + ldr r1, =0x00000301
  293 + str r1, [r0, #0x30]
  294 +
  295 + ldr r1, =0x00000066
  296 + str r1, [r0]
  297 +
  298 + ldr r0, =NOMADIK_UART1_BASE
  299 +
  300 + ldr r1, =0x00000000
  301 + str r1, [r0, #0x30]
  302 +
  303 + ldr r1, =0x0000004e
  304 + str r1, [r0, #0x24]
  305 +
  306 + ldr r1, =0x00000008
  307 + str r1, [r0, #0x28]
  308 +
  309 + ldr r1, =0x00000060
  310 + str r1, [r0, #0x2C]
  311 +
  312 + ldr r1, =0x00000301
  313 + str r1, [r0, #0x30]
  314 +
  315 + ldr r1, =0x00000066
  316 + str r1, [r0]
  317 +
  318 + ldr r0, =NOMADIK_UART2_BASE
  319 +
  320 + ldr r1, =0x00000000
  321 + str r1, [r0, #0x30]
  322 +
  323 + ldr r1, =0x0000004e
  324 + str r1, [r0, #0x24]
  325 +
  326 + ldr r1, =0x00000008
  327 + str r1, [r0, #0x28]
  328 +
  329 + ldr r1, =0x00000060
  330 + str r1, [r0, #0x2C]
  331 +
  332 + ldr r1, =0x00000301
  333 + str r1, [r0, #0x30]
  334 +
  335 + ldr r1, =0x00000066
  336 + str r1, [r0]
  337 +
  338 + /* Configure CPLD to enable UART0 */
  339 +
  340 + mov pc, lr
board/st/nmdk8815/u-boot.lds
Diff comments   View file @ d5254f1
  1 +/*
  2 + * (C) Copyright 2002
  3 + * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  4 + *
  5 + * See file CREDITS for list of people who contributed to this
  6 + * project.
  7 + *
  8 + * This program is free software; you can redistribute it and/or
  9 + * modify it under the terms of the GNU General Public License as
  10 + * published by the Free Software Foundation; either version 2 of
  11 + * the License, or (at your option) any later version.
  12 + *
  13 + * This program is distributed in the hope that it will be useful,
  14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16 + * GNU General Public License for more details.
  17 + *
  18 + * You should have received a copy of the GNU General Public License
  19 + * along with this program; if not, write to the Free Software
  20 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 + * MA 02111-1307 USA
  22 + */
  23 +
  24 +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
  25 +OUTPUT_ARCH(arm)
  26 +ENTRY(_start)
  27 +SECTIONS
  28 +{
  29 + . = 0x00000000;
  30 + . = ALIGN(4);
  31 + .text :
  32 + {
  33 + cpu/arm926ejs/start.o (.text)
  34 + *(.text)
  35 + }
  36 + . = ALIGN(4);
  37 + .rodata : { *(.rodata) }
  38 + . = ALIGN(4);
  39 + .data : { *(.data) }
  40 + . = ALIGN(4);
  41 + .got : { *(.got) }
  42 +
  43 + __u_boot_cmd_start = .;
  44 + .u_boot_cmd : { *(.u_boot_cmd) }
  45 + __u_boot_cmd_end = .;
  46 +
  47 + . = ALIGN(4);
  48 + __bss_start = .;
  49 + .bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
  50 + _end = .;
  51 +}
cpu/arm926ejs/nomadik/Makefile
Diff comments   View file @ d5254f1
  1 +#
  2 +# (C) Copyright 2000-2006
  3 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4 +#
  5 +# See file CREDITS for list of people who contributed to this
  6 +# project.
  7 +#
  8 +# This program is free software; you can redistribute it and/or
  9 +# modify it under the terms of the GNU General Public License as
  10 +# published by the Free Software Foundation; either version 2 of
  11 +# the License, or (at your option) any later version.
  12 +#
  13 +# This program is distributed in the hope that it will be useful,
  14 +# but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16 +# GNU General Public License for more details.
  17 +#
  18 +# You should have received a copy of the GNU General Public License
  19 +# along with this program; if not, write to the Free Software
  20 +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 +# MA 02111-1307 USA
  22 +#
  23 +
  24 +include $(TOPDIR)/config.mk
  25 +
  26 +LIB = $(obj)lib$(SOC).a
  27 +
  28 +COBJS = timer.o
  29 +SOBJS = reset.o
  30 +
  31 +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
  32 +OBJS := $(addprefix $(obj),$(COBJS)) $(addprefix $(obj),$(SOBJS))
  33 +
  34 +all: $(obj).depend $(LIB)
  35 +
  36 +$(LIB): $(OBJS)
  37 + $(AR) $(ARFLAGS) $@ $(OBJS)
  38 +
  39 +#########################################################################
  40 +
  41 +# defines $(obj).depend target
  42 +include $(SRCTREE)/rules.mk
  43 +
  44 +sinclude $(obj).depend
  45 +
  46 +#########################################################################
cpu/arm926ejs/nomadik/reset.S
Diff comments   View file @ d5254f1
  1 +#include <config.h>
  2 +/*
  3 + * Processor reset for Nomadik
  4 + */
  5 +
  6 + .align 5
  7 +.globl reset_cpu
  8 +reset_cpu:
  9 +#if defined CONFIG_NOMADIK_8815
  10 + ldr r0, =NOMADIK_SRC_BASE
  11 + ldr r1, =0x1
  12 + str r1, [r0, #0x18]
  13 +#else
  14 + ldr r1, rstctl1 /* get clkm1 reset ctl */
  15 + mov r3, #0x0
  16 + strh r3, [r1] /* clear it */
  17 + mov r3, #0x8
  18 + strh r3, [r1] /* force dsp+arm reset */
  19 +#endif
  20 +
  21 +_loop_forever:
  22 + b _loop_forever
  23 +
  24 +rstctl1:
  25 + .word 0xfffece10
cpu/arm926ejs/nomadik/timer.c
Diff comments   View file @ d5254f1
  1 +/*
  2 + * (C) Copyright 2003
  3 + * Texas Instruments <www.ti.com>
  4 + *
  5 + * (C) Copyright 2002
  6 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  7 + * Marius Groeger <mgroeger@sysgo.de>
  8 + *
  9 + * (C) Copyright 2002
  10 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  11 + * Alex Zuepke <azu@sysgo.de>
  12 + *
  13 + * (C) Copyright 2002-2004
  14 + * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  15 + *
  16 + * (C) Copyright 2004
  17 + * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
  18 + *
  19 + * See file CREDITS for list of people who contributed to this
  20 + * project.
  21 + *
  22 + * This program is free software; you can redistribute it and/or
  23 + * modify it under the terms of the GNU General Public License as
  24 + * published by the Free Software Foundation; either version 2 of
  25 + * the License, or (at your option) any later version.
  26 + *
  27 + * This program is distributed in the hope that it will be useful,
  28 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  29 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  30 + * GNU General Public License for more details.
  31 + *
  32 + * You should have received a copy of the GNU General Public License
  33 + * along with this program; if not, write to the Free Software
  34 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  35 + * MA 02111-1307 USA
  36 + */
  37 +
  38 +#include <common.h>
  39 +#include <asm/io.h>
  40 +#include <arm926ejs.h>
  41 +
  42 +#define TIMER_LOAD_VAL 0xffffffff
  43 +
  44 +/* macro to read the 32 bit timer */
  45 +#define READ_TIMER readl(CONFIG_SYS_TIMERBASE + 20)
  46 +
  47 +static ulong timestamp;
  48 +static ulong lastdec;
  49 +
  50 +/* nothing really to do with interrupts, just starts up a counter. */
  51 +int timer_init(void)
  52 +{
  53 + /* Load timer with initial value */
  54 + writel(TIMER_LOAD_VAL, CONFIG_SYS_TIMERBASE + 16);
  55 +
  56 + /*
  57 + * Set timer to be enabled, free-running, no interrupts, 256 divider,
  58 + * 32-bit, wrap-mode
  59 + */
  60 + writel(0x8a, CONFIG_SYS_TIMERBASE + 24);
  61 +
  62 + /* init the timestamp and lastdec value */
  63 + reset_timer_masked();
  64 +
  65 + return 0;
  66 +}
  67 +
  68 +/*
  69 + * timer without interrupts
  70 + */
  71 +void reset_timer(void)
  72 +{
  73 + reset_timer_masked();
  74 +}
  75 +
  76 +ulong get_timer(ulong base)
  77 +{
  78 + return get_timer_masked() - base;
  79 +}
  80 +
  81 +void set_timer(ulong t)
  82 +{
  83 + timestamp = t;
  84 +}
  85 +
  86 +/* delay x useconds AND perserve advance timstamp value */
  87 +void udelay(unsigned long usec)
  88 +{
  89 + ulong tmo, tmp;
  90 +
  91 + if (usec >= 1000) {
  92 + /* if "big" number, spread normalization to seconds */
  93 + tmo = usec / 1000; /* start to normalize */
  94 + tmo *= CONFIG_SYS_HZ; /* find number of "ticks" */
  95 + tmo /= 1000; /* finish normalize. */
  96 + } else {
  97 + /* small number, don't kill it prior to HZ multiply */
  98 + tmo = usec * CONFIG_SYS_HZ;
  99 + tmo /= (1000 * 1000);
  100 + }
  101 +
  102 + tmp = get_timer(0); /* get current timestamp */
  103 + if ((tmo + tmp + 1) < tmp) /* will roll time stamp? */
  104 + reset_timer_masked(); /* reset to 0, set lastdec value */
  105 + else
  106 + tmo += tmp;
  107 +
  108 + while (get_timer_masked() < tmo)
  109 + /* nothing */ ;
  110 +}
  111 +
  112 +void reset_timer_masked(void)
  113 +{
  114 + /* reset time */
  115 + lastdec = READ_TIMER; /* capure current decrementer value time */
  116 + timestamp = 0; /* start "advancing" time stamp from 0 */
  117 +}
  118 +
  119 +ulong get_timer_masked(void)
  120 +{
  121 + ulong now = READ_TIMER; /* current tick value */
  122 +
  123 + if (lastdec >= now) { /* normal mode (non roll) */
  124 + /* move stamp fordward */
  125 + timestamp += lastdec - now;
  126 + } else {
  127 + /*
  128 + * An overflow is expected.
  129 + * nts = ts + ld + (TLV - now)
  130 + * ts=old stamp, ld=time that passed before passing through -1
  131 + * (TLV-now) amount of time after passing though -1
  132 + * nts = new "advancing time stamp"...it could also roll
  133 + */
  134 + timestamp += lastdec + TIMER_LOAD_VAL - now;
  135 + }
  136 + lastdec = now;
  137 +
  138 + return timestamp;
  139 +}
  140 +
  141 +/* waits specified delay value and resets timestamp */
  142 +void udelay_masked(unsigned long usec)
  143 +{
  144 + ulong tmo;
  145 +
  146 + if (usec >= 1000) {
  147 + /* if "big" number, spread normalization to seconds */
  148 + tmo = usec / 1000; /* start to normalize */
  149 + tmo *= CONFIG_SYS_HZ; /* find number of "ticks" */
  150 + tmo /= 1000; /* finish normalize. */
  151 + } else {
  152 + /* else small number, don't kill it prior to HZ multiply */
  153 + tmo = usec * CONFIG_SYS_HZ;
  154 + tmo /= (1000*1000);
  155 + }
  156 +
  157 + reset_timer_masked();
  158 + /* set "advancing" timestamp to 0, set lastdec vaule */
  159 +
  160 + while (get_timer_masked() < tmo)
  161 + /* nothing */ ;
  162 +}
  163 +
  164 +/*
  165 + * This function is derived from PowerPC code (read timebase as long long).
  166 + * On ARM it just returns the timer value.
  167 + */
  168 +unsigned long long get_ticks(void)
  169 +{
  170 + return get_timer(0);
  171 +}
  172 +
  173 +/*
  174 + * This function is derived from PowerPC code (timebase clock frequency).
  175 + * On ARM it returns the number of timer ticks per second.
  176 + */
  177 +ulong get_tbclk(void)
  178 +{
  179 + ulong tbclk;
  180 +
  181 + tbclk = CONFIG_SYS_HZ;
  182 + return tbclk;
  183 +}
  1 +
  2 +The Nomadik 8815 CPU has a "secure" boot mode where no external access
  3 +(not even JTAG) is allowed. The "remap" bits in the evaluation board
  4 +are configured in order to boot from the internal ROM memory (in
  5 +secure mode).
  6 +
  7 +The boot process as defined by the manufacturer executes external code
  8 +(loaded from NAND or OneNAND) that that disables such "security" in
  9 +order to run u-boot and later the kernel without constraints. Such
  10 +code is a proprietary initial boot loader, called "X-Loader" (in case
  11 +anyone wonders, it has no relations with other loaders with the same
  12 +name and there is no GPL code inside the ST X-Loader).
  13 +
  14 +SDRAM configuration, PLL setup and initial loading from NAND is
  15 +implemented in the X-Loader, so U-Boot is already running in SDRAM
  16 +when control is handed over to it.
  17 +
  18 +
  19 +On www.st.com/nomadik and on www.stnwireless.com there are documents,
  20 +summary data and white papers on Nomadik. The full datasheet for
  21 +STn8815 is not currently available on line but under specific request
  22 +to the local ST sales offices.
include/configs/nmdk8815.h
Diff comments   View file @ d5254f1
  1 +/*
  2 + * (C) Copyright 2005
  3 + * STMicroelectronics.
  4 + * Configuration settings for the STn8815 nomadik board.
  5 + *
  6 + * See file CREDITS for list of people who contributed to this
  7 + * project.
  8 + *
  9 + * This program is free software; you can redistribute it and/or
  10 + * modify it under the terms of the GNU General Public License as
  11 + * published by the Free Software Foundation; either version 2 of
  12 + * the License, or (at your option) any later version.
  13 + *
  14 + * This program is distributed in the hope that it will be useful,
  15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17 + * GNU General Public License for more details.
  18 + *
  19 + * You should have received a copy of the GNU General Public License
  20 + * along with this program; if not, write to the Free Software
  21 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22 + * MA 02111-1307 USA
  23 + */
  24 +
  25 +#ifndef __CONFIG_H
  26 +#define __CONFIG_H
  27 +
  28 +#define CONFIG_ARM926EJS
  29 +#define CONFIG_NOMADIK
  30 +#define CONFIG_NOMADIK_8815
  31 +#define CONFIG_NOMADIK_NDK15
  32 +#define CONFIG_NOMADIK_NHK15
  33 +
  34 +#define CONFIG_SKIP_LOWLEVEL_INIT /* we have already been loaded to RAM */
  35 +
  36 +/* commands */
  37 +#include <config_cmd_default.h>
  38 +#define CONFIG_CMD_PING
  39 +#define CONFIG_CMD_DHCP
  40 +/* At this point there is no flash driver, so remove some commands */
  41 +#undef CONFIG_CMD_ENV
  42 +#undef CONFIG_CMD_FLASH
  43 +#undef CONFIG_CMD_IMLS
  44 +
  45 +/* user interface */
  46 +#define CONFIG_SYS_LONGHELP
  47 +#define CONFIG_SYS_HUSH_PARSER
  48 +#define CONFIG_SYS_PROMPT "Nomadik> "
  49 +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  50 +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  51 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
  52 + + sizeof(CONFIG_SYS_PROMPT) + 16)
  53 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
  54 +#define CONFIG_SYS_MAXARGS 16
  55 +#define CONFIG_SYS_LOAD_ADDR 0x800000 /* default load address */
  56 +#define CONFIG_SYS_LOADS_BAUD_CHANGE
  57 +
  58 +/* boot config */
  59 +#define CONFIG_SETUP_MEMORY_TAGS
  60 +#define CONFIG_INITRD_TAG
  61 +#define CONFIG_CMDLINE_TAG
  62 +#define CONFIG_BOOTDELAY 1
  63 +#define CONFIG_BOOTARGS "root=/dev/ram0 console=ttyAMA1,115200n8 init=linuxrc"
  64 +#define CONFIG_BOOTCOMMAND "fsload 0x100000 kernel.uimg;" \
  65 + " fsload 0x800000 initrd.gz.uimg;" \
  66 + " bootm 0x100000 0x800000"
  67 +
  68 +/* memory-related information */
  69 +#define CONFIG_NR_DRAM_BANKS 2
  70 +#define PHYS_SDRAM_1 0x00000000 /* DDR-SDRAM Bank #1 */
  71 +#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
  72 +#define PHYS_SDRAM_2 0x08000000 /* SDR-SDRAM BANK #2*/
  73 +#define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
  74 +
  75 +#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
  76 +#ifdef CONFIG_USE_IRQ
  77 +# define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */
  78 +# define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */
  79 +#endif
  80 +
  81 +#define CONFIG_SYS_MEMTEST_START 0x00000000
  82 +#define CONFIG_SYS_MEMTEST_END 0x0FFFFFFF
  83 +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256 * 1024)
  84 +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */
  85 +
  86 +#define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
  87 +
  88 +/* timing informazion */
  89 +#define CONFIG_SYS_HZ (2400000 / 256) /* Timer0: 2.4Mhz + divider */
  90 +#define CONFIG_SYS_TIMERBASE 0x101E2000
  91 +#undef CONFIG_SYS_CLKS_IN_HZ
  92 +
  93 +/* serial port (PL011) configuration */
  94 +#define CONFIG_PL011_SERIAL
  95 +#define CONFIG_CONS_INDEX 1
  96 +#define CONFIG_BAUDRATE 115200
  97 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  98 +#define CFG_SERIAL0 0x101FD000
  99 +#define CFG_SERIAL1 0x101FB000
  100 +
  101 +#define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1 }
  102 +#define CONFIG_PL011_CLOCK 48000000
  103 +
  104 +/* Ethernet */
  105 +#define PCI_MEMORY_VADDR 0xe8000000
  106 +#define PCI_IO_VADDR 0xee000000
  107 +#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a)))
  108 +#define __mem_isa(a) ((a) + PCI_MEMORY_VADDR)
  109 +
  110 +#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111*/
  111 +#define CONFIG_SMC91111_BASE 0x34000300
  112 +#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
  113 +#define CONFIG_SMC_USE_32_BIT
  114 +#define CONFIG_BOOTFILE "uImage"
  115 +
  116 +/* flash memory and filesystem information */
  117 +#define CONFIG_DOS_PARTITION
  118 +#define CONFIG_MTD_ONENAND_VERIFY_WRITE
  119 +#define CONFIG_SYS_ONENAND_BASE 0x30000000
  120 +#define CONFIG_SYS_MAX_NAND_DEVICE 1
  121 +#define CONFIG_SYS_NAND_BASE 0x40000000
  122 +
  123 +#define CONFIG_SYS_NO_FLASH
  124 +
  125 +#ifdef CONFIG_BOOT_ONENAND
  126 +
  127 +# undef CONFIG_CMD_NAND /* Temporary: nand and onenand can't coexist */
  128 + /* Partition Size Start
  129 + * XloaderTOC + X-Loader 256KB 0x00000000
  130 + * Memory init function 256KB 0x00040000
  131 + * U-Boot 2MB 0x00080000
  132 + * Sysimage (kernel + ramdisk) 4MB 0x00280000
  133 + * JFFS2 Root filesystem 22MB 0x00680000
  134 + * JFFS2 User Data 227.5MB 0x01C80000
  135 + */
  136 +# define CONFIG_JFFS2_PART_SIZE 0x400000
  137 +# define CONFIG_JFFS2_PART_OFFSET 0x280000
  138 +
  139 +# define CONFIG_ENV_IS_IN_ONENAND
  140 +# define CONFIG_ENV_SIZE (256 * 1024)
  141 +# define CONFIG_ENV_ADDR 0x30300000
  142 +
  143 +#else /* ! CONFIG_BOOT_ONENAND */
  144 +
  145 +# undef CONFIG_CMD_ONENAND /* Temporary: nand and onenand can't coexist */
  146 +
  147 +# define CONFIG_JFFS2_DEV "nand0"
  148 +# define CONFIG_JFFS2_NAND 1 /* For the jffs2 support*/
  149 +# define CONFIG_JFFS2_PART_SIZE 0x00300000
  150 +# define CONFIG_JFFS2_PART_OFFSET 0x00280000
  151 +
  152 +# define CONFIG_ENV_IS_IN_NAND
  153 +# define CONFIG_ENV_SIZE 0x20000 /*128 Kb*/
  154 +# define CONFIG_ENV_OFFSET (0x8000000 - CONFIG_ENV_SIZE)
  155 +
  156 +#endif /* CONFIG_BOOT_ONENAND */
  157 +
  158 +/* Temporarily, until we have no driver, env is not in nand */
  159 +#undef CONFIG_ENV_IS_IN_NAND
  160 +#define CONFIG_ENV_IS_NOWHERE
  161 +
  162 +/* this is needed to make hello_world.c and other stuff happy */
  163 +#define CONFIG_SYS_MAX_FLASH_SECT 512
  164 +#define CONFIG_SYS_MAX_FLASH_BANKS 1
  165 +
  166 +/* base addresses of our peripherals */
  167 +#define NOMADIK_SRC_BASE 0x101E0000 /* System and Reset Cnt */
  168 +#define NOMADIK_PMU_BASE 0x101E9000 /* Power Management Unit */
  169 +#define NOMADIK_MPMC_BASE 0x10110000 /* SDRAM Controller */
  170 +#define NOMADIK_FSMC_BASE 0x10100000 /* FSMC Controller */
  171 +#define NOMADIK_1NAND_BASE 0x30000000
  172 +#define NOMADIK_GPIO0_BASE 0x101E4000
  173 +#define NOMADIK_GPIO1_BASE 0x101E5000
  174 +#define NOMADIK_GPIO2_BASE 0x101E6000
  175 +#define NOMADIK_GPIO3_BASE 0x101E7000
  176 +#define NOMADIK_CPLD_BASE 0x36000000
  177 +#define NOMADIK_UART0_BASE 0x101FD000
  178 +#define NOMADIK_UART1_BASE 0x101FB000
  179 +#define NOMADIK_UART2_BASE 0x101F2000
  180 +
  181 +#define NOMADIK_I2C1_BASE 0x101F7000 /* I2C1 interface */
  182 +#define NOMADIK_I2C0_BASE 0x101F8000 /* I2C0 interface */
  183 +
  184 +#define NOMADIK_RTC_BASE 0x101E8000
  185 +#define NOMADIK_ETH0_BASE 0x36800300
  186 +#define NOMADIK_CPLD_UART_BASE 0x36480000
  187 +
  188 +#endif /* __CONFIG_H */